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([188.163.112.76]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-afdef1d34f8sm175905166b.83.2025.08.20.08.13.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Aug 2025 08:13:54 -0700 (PDT) From: Svyatoslav Ryhel To: Krzysztof Kozlowski , Rob Herring , Conor Dooley , Thierry Reding , Thierry Reding , Jonathan Hunter , Prashant Gaikwad , Mikko Perttunen , Michael Turquette , Stephen Boyd , Svyatoslav Ryhel , Jonathan Cameron , Dmitry Osipenko Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v2 9/9] ARM: tegra: Add EMC OPP and ICC properties to Tegra114 EMC and ACTMON device-tree nodes Date: Wed, 20 Aug 2025 18:13:23 +0300 Message-ID: <20250820151323.167772-10-clamor95@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250820151323.167772-1-clamor95@gmail.com> References: <20250820151323.167772-1-clamor95@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add EMC OPP tables and interconnect paths that will be used for dynamic memory bandwidth scaling based on memory utilization statistics. Signed-off-by: Svyatoslav Ryhel --- .../dts/nvidia/tegra114-peripherals-opp.dtsi | 151 ++++++++++++++++++ arch/arm/boot/dts/nvidia/tegra114.dtsi | 9 ++ 2 files changed, 160 insertions(+) create mode 100644 arch/arm/boot/dts/nvidia/tegra114-peripherals-opp.dtsi diff --git a/arch/arm/boot/dts/nvidia/tegra114-peripherals-opp.dtsi b/arch/= arm/boot/dts/nvidia/tegra114-peripherals-opp.dtsi new file mode 100644 index 000000000000..1a0e68f22039 --- /dev/null +++ b/arch/arm/boot/dts/nvidia/tegra114-peripherals-opp.dtsi @@ -0,0 +1,151 @@ +// SPDX-License-Identifier: GPL-2.0 + +/ { + emc_icc_dvfs_opp_table: opp-table-emc { + compatible =3D "operating-points-v2"; + + opp-12750000-900 { + opp-microvolt =3D <900000 900000 1390000>; + opp-hz =3D /bits/ 64 <12750000>; + opp-supported-hw =3D <0x000F>; + }; + + opp-20400000-900 { + opp-microvolt =3D <900000 900000 1390000>; + opp-hz =3D /bits/ 64 <20400000>; + opp-supported-hw =3D <0x000F>; + }; + + opp-40800000-900 { + opp-microvolt =3D <900000 900000 1390000>; + opp-hz =3D /bits/ 64 <40800000>; + opp-supported-hw =3D <0x000F>; + }; + + opp-68000000-900 { + opp-microvolt =3D <900000 900000 1390000>; + opp-hz =3D /bits/ 64 <68000000>; + opp-supported-hw =3D <0x000F>; + }; + + opp-102000000-900 { + opp-microvolt =3D <900000 900000 1390000>; + opp-hz =3D /bits/ 64 <102000000>; + opp-supported-hw =3D <0x000F>; + }; + + opp-204000000-900 { + opp-microvolt =3D <900000 900000 1390000>; + opp-hz =3D /bits/ 64 <204000000>; + opp-supported-hw =3D <0x000F>; + opp-suspend; + }; + + opp-312000000-1000 { + opp-microvolt =3D <1000000 1000000 1390000>; + opp-hz =3D /bits/ 64 <312000000>; + opp-supported-hw =3D <0x000F>; + }; + + opp-408000000-1000 { + opp-microvolt =3D <1000000 1000000 1390000>; + opp-hz =3D /bits/ 64 <408000000>; + opp-supported-hw =3D <0x000F>; + }; + + opp-528000000-1050 { + opp-microvolt =3D <1050000 1050000 1390000>; + opp-hz =3D /bits/ 64 <528000000>; + opp-supported-hw =3D <0x000E>; + }; + + opp-528000000-1100 { + opp-microvolt =3D <1100000 1100000 1390000>; + opp-hz =3D /bits/ 64 <528000000>; + opp-supported-hw =3D <0x0001>; + }; + + opp-624000000-1100 { + opp-microvolt =3D <1100000 1100000 1390000>; + opp-hz =3D /bits/ 64 <624000000>; + opp-supported-hw =3D <0x000F>; + }; + + opp-792000000-1100 { + opp-microvolt =3D <1100000 1100000 1390000>; + opp-hz =3D /bits/ 64 <792000000>; + opp-supported-hw =3D <0x000F>; + }; + }; + + emc_bw_dfs_opp_table: opp-table-actmon { + compatible =3D "operating-points-v2"; + + opp-12750000 { + opp-hz =3D /bits/ 64 <12750000>; + opp-supported-hw =3D <0x000F>; + opp-peak-kBps =3D <204000>; + }; + + opp-20400000 { + opp-hz =3D /bits/ 64 <20400000>; + opp-supported-hw =3D <0x000F>; + opp-peak-kBps =3D <326400>; + }; + + opp-40800000 { + opp-hz =3D /bits/ 64 <40800000>; + opp-supported-hw =3D <0x000F>; + opp-peak-kBps =3D <652800>; + }; + + opp-68000000 { + opp-hz =3D /bits/ 64 <68000000>; + opp-supported-hw =3D <0x000F>; + opp-peak-kBps =3D <1088000>; + }; + + opp-102000000 { + opp-hz =3D /bits/ 64 <102000000>; + opp-supported-hw =3D <0x000F>; + opp-peak-kBps =3D <1632000>; + }; + + opp-204000000 { + opp-hz =3D /bits/ 64 <204000000>; + opp-supported-hw =3D <0x000F>; + opp-peak-kBps =3D <3264000>; + opp-suspend; + }; + + opp-312000000 { + opp-hz =3D /bits/ 64 <312000000>; + opp-supported-hw =3D <0x000F>; + opp-peak-kBps =3D <4992000>; + }; + + opp-408000000 { + opp-hz =3D /bits/ 64 <408000000>; + opp-supported-hw =3D <0x000F>; + opp-peak-kBps =3D <6528000>; + }; + + opp-528000000 { + opp-hz =3D /bits/ 64 <528000000>; + opp-supported-hw =3D <0x000F>; + opp-peak-kBps =3D <8448000>; + }; + + opp-624000000 { + opp-hz =3D /bits/ 64 <624000000>; + opp-supported-hw =3D <0x000F>; + opp-peak-kBps =3D <9984000>; + }; + + opp-792000000 { + opp-hz =3D /bits/ 64 <792000000>; + opp-supported-hw =3D <0x000F>; + opp-peak-kBps =3D <12672000>; + }; + }; +}; diff --git a/arch/arm/boot/dts/nvidia/tegra114.dtsi b/arch/arm/boot/dts/nvi= dia/tegra114.dtsi index 97f5ddc197a0..ebac1886e079 100644 --- a/arch/arm/boot/dts/nvidia/tegra114.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra114.dtsi @@ -8,6 +8,8 @@ #include #include =20 +#include "tegra114-peripherals-opp.dtsi" + / { compatible =3D "nvidia,tegra114"; interrupt-parent =3D <&lic>; @@ -259,6 +261,9 @@ actmon: actmon@6000c800 { clock-names =3D "actmon", "emc"; resets =3D <&tegra_car TEGRA114_CLK_ACTMON>; reset-names =3D "actmon"; + operating-points-v2 =3D <&emc_bw_dfs_opp_table>; + interconnects =3D <&mc TEGRA114_MC_MPCORER &emc>; + interconnect-names =3D "cpu-read"; #cooling-cells =3D <2>; }; =20 @@ -591,6 +596,7 @@ mc: memory-controller@70019000 { =20 #reset-cells =3D <1>; #iommu-cells =3D <1>; + #interconnect-cells =3D <1>; }; =20 emc: external-memory-controller@7001b000 { @@ -601,6 +607,9 @@ emc: external-memory-controller@7001b000 { clock-names =3D "emc"; =20 nvidia,memory-controller =3D <&mc>; + operating-points-v2 =3D <&emc_icc_dvfs_opp_table>; + + #interconnect-cells =3D <0>; }; =20 hda@70030000 { --=20 2.48.1