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charset="utf-8" The spinand driver do 3 type of dirmap requests: * read/write whole flash page without oob (offs =3D 0, len =3D page_size) * read/write whole flash page including oob (offs =3D 0, len =3D page_size + oob_size) * read/write oob area only (offs =3D page_size, len =3D oob_size) The trick is: * read/write a single "sector" * set a custom sector size equal to offs + len. It's a bit safer to rounded up "sector size" value 64. * set the transfer length equal to custom sector size And it works! Thus we can remove a dirty hack that reads flash page settings from SNFI registers during driver startup. Also airoha_snand_adjust_op_size() function becomes unnecessary. Signed-off-by: Mikhail Kshevetskiy --- drivers/spi/spi-airoha-snfi.c | 136 ++++++---------------------------- 1 file changed, 21 insertions(+), 115 deletions(-) diff --git a/drivers/spi/spi-airoha-snfi.c b/drivers/spi/spi-airoha-snfi.c index a02dc6de5406..4974608423b7 100644 --- a/drivers/spi/spi-airoha-snfi.c +++ b/drivers/spi/spi-airoha-snfi.c @@ -223,13 +223,6 @@ struct airoha_snand_ctrl { struct regmap *regmap_ctrl; struct regmap *regmap_nfi; struct clk *spi_clk; - - struct { - size_t page_size; - size_t sec_size; - u8 sec_num; - u8 spare_size; - } nfi_cfg; }; =20 static int airoha_snand_set_fifo_op(struct airoha_snand_ctrl *as_ctrl, @@ -488,56 +481,6 @@ static int airoha_snand_nfi_init(struct airoha_snand_c= trl *as_ctrl) SPI_NFI_ALL_IRQ_EN, SPI_NFI_AHB_DONE_EN); } =20 -static int airoha_snand_nfi_config(struct airoha_snand_ctrl *as_ctrl) -{ - int err; - u32 val; - - err =3D regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_CON, - SPI_NFI_FIFO_FLUSH | SPI_NFI_RST); - if (err) - return err; - - /* auto FDM */ - err =3D regmap_clear_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CNFG, - SPI_NFI_AUTO_FDM_EN); - if (err) - return err; - - /* HW ECC */ - err =3D regmap_clear_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CNFG, - SPI_NFI_HW_ECC_EN); - if (err) - return err; - - /* DMA Burst */ - err =3D regmap_set_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CNFG, - SPI_NFI_DMA_BURST_EN); - if (err) - return err; - - /* sec num */ - val =3D FIELD_PREP(SPI_NFI_SEC_NUM, as_ctrl->nfi_cfg.sec_num); - err =3D regmap_update_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CON, - SPI_NFI_SEC_NUM, val); - if (err) - return err; - - /* enable cust sec size */ - err =3D regmap_set_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_SECCUS_SIZE, - SPI_NFI_CUS_SEC_SIZE_EN); - if (err) - return err; - - /* set cust sec size */ - val =3D FIELD_PREP(SPI_NFI_CUS_SEC_SIZE, - as_ctrl->nfi_cfg.sec_size + - as_ctrl->nfi_cfg.spare_size); - return regmap_update_bits(as_ctrl->regmap_nfi, - REG_SPI_NFI_SECCUS_SIZE, - SPI_NFI_CUS_SEC_SIZE, val); -} - static bool airoha_snand_is_page_ops(const struct spi_mem_op *op) { if (op->addr.nbytes !=3D 2) @@ -570,26 +513,6 @@ static bool airoha_snand_is_page_ops(const struct spi_= mem_op *op) } } =20 -static int airoha_snand_adjust_op_size(struct spi_mem *mem, - struct spi_mem_op *op) -{ - size_t max_len; - - if (airoha_snand_is_page_ops(op)) { - struct airoha_snand_ctrl *as_ctrl; - - as_ctrl =3D spi_controller_get_devdata(mem->spi->controller); - max_len =3D as_ctrl->nfi_cfg.sec_size; - max_len +=3D as_ctrl->nfi_cfg.spare_size; - max_len *=3D as_ctrl->nfi_cfg.sec_num; - - if (op->data.nbytes > max_len) - op->data.nbytes =3D max_len; - } - - return 0; -} - static bool airoha_snand_supports_op(struct spi_mem *mem, const struct spi_mem_op *op) { @@ -640,8 +563,8 @@ static ssize_t airoha_snand_dirmap_read(struct spi_mem_= dirmap_desc *desc, =20 as_ctrl =3D spi_controller_get_devdata(spi->controller); =20 - bytes =3D as_ctrl->nfi_cfg.sec_num * - (as_ctrl->nfi_cfg.sec_size + as_ctrl->nfi_cfg.spare_size); + /* minimum oob size is 64 */ + bytes =3D round_up(offs + len, 64); =20 /* * DUALIO and QUADIO opcodes are not supported by the spi controller, @@ -727,7 +650,14 @@ static ssize_t airoha_snand_dirmap_read(struct spi_mem= _dirmap_desc *desc, if (err) goto error_dma_unmap; =20 - /* number of bytes to read via dma (whole flash page + oob) */ + /* + * Setup transfer length + * --------------------- + * The following rule MUST be met: + * transfer_length =3D + * =3D NFI_SNF_MISC_CTL2.read_data_byte_number =3D + * =3D NFI_CON.sector_number * NFI_SECCUS.custom_sector_size + */ err =3D regmap_update_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_SNF_MISC_CTL2, SPI_NFI_READ_DATA_BYTE_NUM, @@ -825,8 +755,8 @@ static ssize_t airoha_snand_dirmap_write(struct spi_mem= _dirmap_desc *desc, =20 as_ctrl =3D spi_controller_get_devdata(spi->controller); =20 - bytes =3D as_ctrl->nfi_cfg.sec_num * - (as_ctrl->nfi_cfg.sec_size + as_ctrl->nfi_cfg.spare_size); + /* minimum oob size is 64 */ + bytes =3D round_up(offs + len, 64); =20 opcode =3D desc->info.op_tmpl.cmd.opcode; switch (opcode) { @@ -906,7 +836,14 @@ static ssize_t airoha_snand_dirmap_write(struct spi_me= m_dirmap_desc *desc, if (err) goto error_dma_unmap; =20 - /* number of bytes to write via dma (whole flash page + oob) */ + /* + * Setup transfer length + * --------------------- + * The following rule MUST be met: + * transfer_length =3D + * =3D NFI_SNF_MISC_CTL2.write_data_byte_number =3D + * =3D NFI_CON.sector_number * NFI_SECCUS.custom_sector_size + */ err =3D regmap_update_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_SNF_MISC_CTL2, SPI_NFI_PROG_LOAD_BYTE_NUM, @@ -1062,7 +999,6 @@ static int airoha_snand_exec_op(struct spi_mem *mem, } =20 static const struct spi_controller_mem_ops airoha_snand_mem_ops =3D { - .adjust_op_size =3D airoha_snand_adjust_op_size, .supports_op =3D airoha_snand_supports_op, .exec_op =3D airoha_snand_exec_op, .dirmap_create =3D airoha_snand_dirmap_create, @@ -1087,36 +1023,6 @@ static int airoha_snand_setup(struct spi_device *spi) return 0; } =20 -static int airoha_snand_nfi_setup(struct airoha_snand_ctrl *as_ctrl) -{ - u32 val, sec_size, sec_num; - int err; - - err =3D regmap_read(as_ctrl->regmap_nfi, REG_SPI_NFI_CON, &val); - if (err) - return err; - - sec_num =3D FIELD_GET(SPI_NFI_SEC_NUM, val); - - err =3D regmap_read(as_ctrl->regmap_nfi, REG_SPI_NFI_SECCUS_SIZE, &val); - if (err) - return err; - - sec_size =3D FIELD_GET(SPI_NFI_CUS_SEC_SIZE, val); - - /* init default value */ - as_ctrl->nfi_cfg.sec_size =3D sec_size; - as_ctrl->nfi_cfg.sec_num =3D sec_num; - as_ctrl->nfi_cfg.page_size =3D round_down(sec_size * sec_num, 1024); - as_ctrl->nfi_cfg.spare_size =3D 16; - - err =3D airoha_snand_nfi_init(as_ctrl); - if (err) - return err; - - return airoha_snand_nfi_config(as_ctrl); -} - static const struct regmap_config spi_ctrl_regmap_config =3D { .name =3D "ctrl", .reg_bits =3D 32, @@ -1190,7 +1096,7 @@ static int airoha_snand_probe(struct platform_device = *pdev) ctrl->setup =3D airoha_snand_setup; device_set_node(&ctrl->dev, dev_fwnode(dev)); =20 - err =3D airoha_snand_nfi_setup(as_ctrl); + err =3D airoha_snand_nfi_init(as_ctrl); if (err) return err; =20 --=20 2.50.1