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charset="utf-8" Allow callers to write Class::STORAGE_SCSI instead of bindings::PCI_CLASS_STORAGE_SCSI, for example. New APIs: Class::STORAGE_SCSI, Class::NETWORK_ETHERNET, etc. Class::as_raw() Class: TryFrom for Class ClassMask: Full, ClassSubclass DeviceId::from_class_and_vendor() Device::pci_class() Cc: Danilo Krummrich Cc: Alexandre Courbot Signed-off-by: John Hubbard --- rust/kernel/pci.rs | 28 +++++ rust/kernel/pci/id.rs | 247 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 275 insertions(+) create mode 100644 rust/kernel/pci/id.rs diff --git a/rust/kernel/pci.rs b/rust/kernel/pci.rs index 887ee611b553..ee887d616320 100644 --- a/rust/kernel/pci.rs +++ b/rust/kernel/pci.rs @@ -23,6 +23,10 @@ }; use kernel::prelude::*; =20 +mod id; + +pub use self::id::{Class, ClassMask}; + /// An adapter for the registration of PCI drivers. pub struct Adapter(T); =20 @@ -157,6 +161,23 @@ pub const fn from_class(class: u32, class_mask: u32) -= > Self { override_only: 0, }) } + + /// Create a new `pci::DeviceId` from a class number, mask, and specif= ic vendor. + /// + /// This is more targeted than [`DeviceId::from_class`]: in addition t= o matching by Vendor, it + /// also matches the PCI Class (up to the entire 24 bits, depending on= the mask). + pub const fn from_class_and_vendor(class: Class, class_mask: ClassMask= , vendor: u32) -> Self { + Self(bindings::pci_device_id { + vendor, + device: DeviceId::PCI_ANY_ID, + subvendor: DeviceId::PCI_ANY_ID, + subdevice: DeviceId::PCI_ANY_ID, + class: class.as_raw(), + class_mask: class_mask.as_raw(), + driver_data: 0, + override_only: 0, + }) + } } =20 // SAFETY: `DeviceId` is a `#[repr(transparent)]` wrapper of `pci_device_i= d` and does not add @@ -410,6 +431,13 @@ pub fn resource_len(&self, bar: u32) -> Result { // - by its type invariant `self.as_raw` is always a valid pointer= to a `struct pci_dev`. Ok(unsafe { bindings::pci_resource_len(self.as_raw(), bar.try_into= ()?) }) } + + /// Returns the PCI class as a `Class` struct. + /// Returns an error if the class code is not recognized. + pub fn pci_class(&self) -> Result { + // SAFETY: `self.as_raw` is a valid pointer to a `struct pci_dev`. + Class::new(unsafe { (*self.as_raw()).class }) + } } =20 impl Device { diff --git a/rust/kernel/pci/id.rs b/rust/kernel/pci/id.rs new file mode 100644 index 000000000000..ed241af07dee --- /dev/null +++ b/rust/kernel/pci/id.rs @@ -0,0 +1,247 @@ +// SPDX-License-Identifier: GPL-2.0 + +//! PCI device identifiers and related types. +//! +//! This module contains PCI class codes and supporting types. + +use crate::{ + bindings, + error::code::{EINVAL, ENODEV}, + error::Error, + prelude::*, +}; +use core::fmt; + +/// PCI device class codes. Each entry contains the full 24-bit PCI +/// class code (base class in bits 23-16, subclass in bits 15-8, +/// programming interface in bits 7-0). +/// +/// # Examples +/// +/// ``` +/// # use kernel::{device::Core, pci::{self, Class}, prelude::*}; +/// fn probe_device(pdev: &pci::Device) -> Result<()> { +/// // Get the PCI class for this device +/// let pci_class =3D pdev.pci_class()?; +/// dev_info!( +/// pdev.as_ref(), +/// "Detected PCI class: {}\n", +/// pci_class +/// ); +/// Ok(()) +/// } +/// ``` +#[derive(Debug, Clone, Copy, PartialEq, Eq)] +#[repr(transparent)] +pub struct Class(u32); + +/// PCI class mask constants for matching class codes. +#[repr(u32)] +#[derive(Debug, Clone, Copy, PartialEq, Eq)] +pub enum ClassMask { + /// Match the full 24-bit class code. + Full =3D 0xffffff, + /// Match the upper 16 bits of the class code (base class and subclass= only) + ClassSubclass =3D 0xffff00, +} + +macro_rules! define_all_pci_classes { + ( + $($variant:ident =3D $binding:expr,)+ + ) =3D> { + + impl Class { + $( + #[allow(missing_docs)] + pub const $variant: Self =3D Self(Self::to_24bit_class($bi= nding)); + )+ + } + + /// Try to convert a raw 24-bit class code value to a `Class` enum. + /// Returns `ENODEV` if the value doesn't match any known class. + impl TryFrom for Class { + type Error =3D Error; + + fn try_from(value: u32) -> Result { + match value { + $(x if x =3D=3D Self::$variant.0 =3D> Ok(Self::$varian= t),)+ + _ =3D> Err(ENODEV), + } + } + } + }; +} + +/// Once constructed, a `Class` contains a valid PCI Class code. +impl Class { + /// Create a new Class from a raw 24-bit class code. + /// Returns an error if the class code is not recognized. + pub fn new(class_code: u32) -> Result { + Self::try_from(class_code) + } + + /// Get the raw 24-bit class code value. + pub const fn as_raw(self) -> u32 { + self.0 + } + + // Converts a PCI class constant to 24-bit format. + // + // Many device drivers use only the upper 16 bits (base class and subc= lass), but some + // use the full 24 bits. In order to support both cases, store the cla= ss code as a 24-bit + // value, where 16-bit values are shifted up 8 bits. + const fn to_24bit_class(val: u32) -> u32 { + if val > 0xFFFF { + val + } else { + val << 8 + } + } +} + +impl fmt::Display for Class { + fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { + write!(f, "0x{:06x}", self.0) + } +} + +impl ClassMask { + /// Get the raw mask value. + pub const fn as_raw(self) -> u32 { + self as u32 + } +} + +impl TryFrom for ClassMask { + type Error =3D Error; + + fn try_from(value: u32) -> Result { + match value { + 0xffffff =3D> Ok(ClassMask::Full), + 0xffff00 =3D> Ok(ClassMask::ClassSubclass), + _ =3D> Err(EINVAL), + } + } +} + +define_all_pci_classes! { + NOT_DEFINED =3D bindings::PCI_CLASS_NOT_DEFINED, = // 0x000000 + NOT_DEFINED_VGA =3D bindings::PCI_CLASS_NOT_DEFINED_VGA, = // 0x000100 + + STORAGE_SCSI =3D bindings::PCI_CLASS_STORAGE_SCSI, = // 0x010000 + STORAGE_IDE =3D bindings::PCI_CLASS_STORAGE_IDE, = // 0x010100 + STORAGE_FLOPPY =3D bindings::PCI_CLASS_STORAGE_FLOPPY, = // 0x010200 + STORAGE_IPI =3D bindings::PCI_CLASS_STORAGE_IPI, = // 0x010300 + STORAGE_RAID =3D bindings::PCI_CLASS_STORAGE_RAID, = // 0x010400 + STORAGE_SATA =3D bindings::PCI_CLASS_STORAGE_SATA, = // 0x010600 + STORAGE_SATA_AHCI =3D bindings::PCI_CLASS_STORAGE_SATA_AHCI, = // 0x010601 + STORAGE_SAS =3D bindings::PCI_CLASS_STORAGE_SAS, = // 0x010700 + STORAGE_EXPRESS =3D bindings::PCI_CLASS_STORAGE_EXPRESS, = // 0x010802 + STORAGE_OTHER =3D bindings::PCI_CLASS_STORAGE_OTHER, = // 0x018000 + + NETWORK_ETHERNET =3D bindings::PCI_CLASS_NETWORK_ETHERNET, = // 0x020000 + NETWORK_TOKEN_RING =3D bindings::PCI_CLASS_NETWORK_TOKEN_RING,= // 0x020100 + NETWORK_FDDI =3D bindings::PCI_CLASS_NETWORK_FDDI, = // 0x020200 + NETWORK_ATM =3D bindings::PCI_CLASS_NETWORK_ATM, = // 0x020300 + NETWORK_OTHER =3D bindings::PCI_CLASS_NETWORK_OTHER, = // 0x028000 + + DISPLAY_VGA =3D bindings::PCI_CLASS_DISPLAY_VGA, = // 0x030000 + DISPLAY_XGA =3D bindings::PCI_CLASS_DISPLAY_XGA, = // 0x030100 + DISPLAY_3D =3D bindings::PCI_CLASS_DISPLAY_3D, = // 0x030200 + DISPLAY_OTHER =3D bindings::PCI_CLASS_DISPLAY_OTHER, = // 0x038000 + + MULTIMEDIA_VIDEO =3D bindings::PCI_CLASS_MULTIMEDIA_VIDEO, = // 0x040000 + MULTIMEDIA_AUDIO =3D bindings::PCI_CLASS_MULTIMEDIA_AUDIO, = // 0x040100 + MULTIMEDIA_PHONE =3D bindings::PCI_CLASS_MULTIMEDIA_PHONE, = // 0x040200 + MULTIMEDIA_HD_AUDIO =3D bindings::PCI_CLASS_MULTIMEDIA_HD_AUDIO= , // 0x040300 + MULTIMEDIA_OTHER =3D bindings::PCI_CLASS_MULTIMEDIA_OTHER, = // 0x048000 + + MEMORY_RAM =3D bindings::PCI_CLASS_MEMORY_RAM, = // 0x050000 + MEMORY_FLASH =3D bindings::PCI_CLASS_MEMORY_FLASH, = // 0x050100 + MEMORY_CXL =3D bindings::PCI_CLASS_MEMORY_CXL, = // 0x050200 + MEMORY_OTHER =3D bindings::PCI_CLASS_MEMORY_OTHER, = // 0x058000 + + BRIDGE_HOST =3D bindings::PCI_CLASS_BRIDGE_HOST, = // 0x060000 + BRIDGE_ISA =3D bindings::PCI_CLASS_BRIDGE_ISA, = // 0x060100 + BRIDGE_EISA =3D bindings::PCI_CLASS_BRIDGE_EISA, = // 0x060200 + BRIDGE_MC =3D bindings::PCI_CLASS_BRIDGE_MC, = // 0x060300 + BRIDGE_PCI_NORMAL =3D bindings::PCI_CLASS_BRIDGE_PCI_NORMAL, = // 0x060400 + BRIDGE_PCI_SUBTRACTIVE =3D bindings::PCI_CLASS_BRIDGE_PCI_SUBTRACT= IVE, // 0x060401 + BRIDGE_PCMCIA =3D bindings::PCI_CLASS_BRIDGE_PCMCIA, = // 0x060500 + BRIDGE_NUBUS =3D bindings::PCI_CLASS_BRIDGE_NUBUS, = // 0x060600 + BRIDGE_CARDBUS =3D bindings::PCI_CLASS_BRIDGE_CARDBUS, = // 0x060700 + BRIDGE_RACEWAY =3D bindings::PCI_CLASS_BRIDGE_RACEWAY, = // 0x060800 + BRIDGE_OTHER =3D bindings::PCI_CLASS_BRIDGE_OTHER, = // 0x068000 + + COMMUNICATION_SERIAL =3D bindings::PCI_CLASS_COMMUNICATION_SERIA= L, // 0x070000 + COMMUNICATION_PARALLEL =3D bindings::PCI_CLASS_COMMUNICATION_PARAL= LEL, // 0x070100 + COMMUNICATION_MULTISERIAL =3D bindings::PCI_CLASS_COMMUNICATION_MULTI= SERIAL, // 0x070200 + COMMUNICATION_MODEM =3D bindings::PCI_CLASS_COMMUNICATION_MODEM= , // 0x070300 + COMMUNICATION_OTHER =3D bindings::PCI_CLASS_COMMUNICATION_OTHER= , // 0x078000 + + SYSTEM_PIC =3D bindings::PCI_CLASS_SYSTEM_PIC, = // 0x080000 + SYSTEM_PIC_IOAPIC =3D bindings::PCI_CLASS_SYSTEM_PIC_IOAPIC, = // 0x080010 + SYSTEM_PIC_IOXAPIC =3D bindings::PCI_CLASS_SYSTEM_PIC_IOXAPIC,= // 0x080020 + SYSTEM_DMA =3D bindings::PCI_CLASS_SYSTEM_DMA, = // 0x080100 + SYSTEM_TIMER =3D bindings::PCI_CLASS_SYSTEM_TIMER, = // 0x080200 + SYSTEM_RTC =3D bindings::PCI_CLASS_SYSTEM_RTC, = // 0x080300 + SYSTEM_PCI_HOTPLUG =3D bindings::PCI_CLASS_SYSTEM_PCI_HOTPLUG,= // 0x080400 + SYSTEM_SDHCI =3D bindings::PCI_CLASS_SYSTEM_SDHCI, = // 0x080500 + SYSTEM_RCEC =3D bindings::PCI_CLASS_SYSTEM_RCEC, = // 0x080700 + SYSTEM_OTHER =3D bindings::PCI_CLASS_SYSTEM_OTHER, = // 0x088000 + + INPUT_KEYBOARD =3D bindings::PCI_CLASS_INPUT_KEYBOARD, = // 0x090000 + INPUT_PEN =3D bindings::PCI_CLASS_INPUT_PEN, = // 0x090100 + INPUT_MOUSE =3D bindings::PCI_CLASS_INPUT_MOUSE, = // 0x090200 + INPUT_SCANNER =3D bindings::PCI_CLASS_INPUT_SCANNER, = // 0x090300 + INPUT_GAMEPORT =3D bindings::PCI_CLASS_INPUT_GAMEPORT, = // 0x090400 + INPUT_OTHER =3D bindings::PCI_CLASS_INPUT_OTHER, = // 0x098000 + + DOCKING_GENERIC =3D bindings::PCI_CLASS_DOCKING_GENERIC, = // 0x0a0000 + DOCKING_OTHER =3D bindings::PCI_CLASS_DOCKING_OTHER, = // 0x0a8000 + + PROCESSOR_386 =3D bindings::PCI_CLASS_PROCESSOR_386, = // 0x0b0000 + PROCESSOR_486 =3D bindings::PCI_CLASS_PROCESSOR_486, = // 0x0b0100 + PROCESSOR_PENTIUM =3D bindings::PCI_CLASS_PROCESSOR_PENTIUM, = // 0x0b0200 + PROCESSOR_ALPHA =3D bindings::PCI_CLASS_PROCESSOR_ALPHA, = // 0x0b1000 + PROCESSOR_POWERPC =3D bindings::PCI_CLASS_PROCESSOR_POWERPC, = // 0x0b2000 + PROCESSOR_MIPS =3D bindings::PCI_CLASS_PROCESSOR_MIPS, = // 0x0b3000 + PROCESSOR_CO =3D bindings::PCI_CLASS_PROCESSOR_CO, = // 0x0b4000 + + SERIAL_FIREWIRE =3D bindings::PCI_CLASS_SERIAL_FIREWIRE, = // 0x0c0000 + SERIAL_FIREWIRE_OHCI =3D bindings::PCI_CLASS_SERIAL_FIREWIRE_OHC= I, // 0x0c0010 + SERIAL_ACCESS =3D bindings::PCI_CLASS_SERIAL_ACCESS, = // 0x0c0100 + SERIAL_SSA =3D bindings::PCI_CLASS_SERIAL_SSA, = // 0x0c0200 + SERIAL_USB_UHCI =3D bindings::PCI_CLASS_SERIAL_USB_UHCI, = // 0x0c0300 + SERIAL_USB_OHCI =3D bindings::PCI_CLASS_SERIAL_USB_OHCI, = // 0x0c0310 + SERIAL_USB_EHCI =3D bindings::PCI_CLASS_SERIAL_USB_EHCI, = // 0x0c0320 + SERIAL_USB_XHCI =3D bindings::PCI_CLASS_SERIAL_USB_XHCI, = // 0x0c0330 + SERIAL_USB_CDNS =3D bindings::PCI_CLASS_SERIAL_USB_CDNS, = // 0x0c0380 + SERIAL_USB_DEVICE =3D bindings::PCI_CLASS_SERIAL_USB_DEVICE, = // 0x0c03fe + SERIAL_FIBER =3D bindings::PCI_CLASS_SERIAL_FIBER, = // 0x0c0400 + SERIAL_SMBUS =3D bindings::PCI_CLASS_SERIAL_SMBUS, = // 0x0c0500 + SERIAL_IPMI_SMIC =3D bindings::PCI_CLASS_SERIAL_IPMI_SMIC, = // 0x0c0700 + SERIAL_IPMI_KCS =3D bindings::PCI_CLASS_SERIAL_IPMI_KCS, = // 0x0c0701 + SERIAL_IPMI_BT =3D bindings::PCI_CLASS_SERIAL_IPMI_BT, = // 0x0c0702 + + WIRELESS_RF_CONTROLLER =3D bindings::PCI_CLASS_WIRELESS_RF_CONTROL= LER, // 0x0d1000 + WIRELESS_WHCI =3D bindings::PCI_CLASS_WIRELESS_WHCI, = // 0x0d1010 + + INTELLIGENT_I2O =3D bindings::PCI_CLASS_INTELLIGENT_I2O, = // 0x0e0000 + + SATELLITE_TV =3D bindings::PCI_CLASS_SATELLITE_TV, = // 0x0f0000 + SATELLITE_AUDIO =3D bindings::PCI_CLASS_SATELLITE_AUDIO, = // 0x0f0100 + SATELLITE_VOICE =3D bindings::PCI_CLASS_SATELLITE_VOICE, = // 0x0f0300 + SATELLITE_DATA =3D bindings::PCI_CLASS_SATELLITE_DATA, = // 0x0f0400 + + CRYPT_NETWORK =3D bindings::PCI_CLASS_CRYPT_NETWORK, = // 0x100000 + CRYPT_ENTERTAINMENT =3D bindings::PCI_CLASS_CRYPT_ENTERTAINMENT= , // 0x100100 + CRYPT_OTHER =3D bindings::PCI_CLASS_CRYPT_OTHER, = // 0x108000 + + SP_DPIO =3D bindings::PCI_CLASS_SP_DPIO, = // 0x110000 + SP_OTHER =3D bindings::PCI_CLASS_SP_OTHER, = // 0x118000 + + ACCELERATOR_PROCESSING =3D bindings::PCI_CLASS_ACCELERATOR_PROCESS= ING, // 0x120000 + + OTHERS =3D bindings::PCI_CLASS_OTHERS, = // 0xff0000 +} --=20 2.50.1 From nobody Sat Oct 4 05:01:27 2025 Received: from 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X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Aug 2025 03:09:05.9281 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Gm1HpbVPNpzQhplVDdlUeczBMhvpvGfc5uOfQbvDFIGJjlf6FTEH+BAqDCJm0qTxkmTGiYLmpu6Ke905GwUv7Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7174 Content-Type: text/plain; charset="utf-8" NovaCore has so far been too imprecise about figuring out if .probe() has found a supported PCI PF (Physical Function). By that I mean: .probe() sets up BAR0 (which involves a lot of very careful devres and Device details behind the scenes). And then if it is dealing with a non-supported device such as the .1 audio PF on many GPUs, it fails out due to an unexpected BAR0 size. We have been fortunate that the BAR0 sizes are different. Really, we should be filtering on PCI class ID instead. These days I think we can confidently pick out Nova's supported PF's via PCI class ID. And if not, then we'll revisit. The approach here is to filter on "Display VGA" or "Display 3D", which is how PCI class IDs express "this is a modern GPU's PF". Cc: Danilo Krummrich Cc: Alexandre Courbot Signed-off-by: John Hubbard --- drivers/gpu/nova-core/driver.rs | 28 +++++++++++++++++++++++----- 1 file changed, 23 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/nova-core/driver.rs b/drivers/gpu/nova-core/driver= .rs index 274989ea1fb4..b60c9defa9d1 100644 --- a/drivers/gpu/nova-core/driver.rs +++ b/drivers/gpu/nova-core/driver.rs @@ -1,6 +1,9 @@ // SPDX-License-Identifier: GPL-2.0 =20 -use kernel::{auxiliary, bindings, c_str, device::Core, pci, prelude::*, si= zes::SZ_16M, sync::Arc}; +use kernel::{ + auxiliary, bindings, c_str, device::Core, pci, pci::Class, pci::ClassM= ask, prelude::*, + sizes::SZ_16M, sync::Arc, +}; =20 use crate::gpu::Gpu; =20 @@ -18,10 +21,25 @@ pub(crate) struct NovaCore { PCI_TABLE, MODULE_PCI_TABLE, ::IdInfo, - [( - pci::DeviceId::from_id(bindings::PCI_VENDOR_ID_NVIDIA, bindings::P= CI_ANY_ID as u32), - () - )] + [ + // Modern NVIDIA GPUs will show up as either VGA or 3D controllers. + ( + pci::DeviceId::from_class_and_vendor( + Class::DISPLAY_VGA, + ClassMask::ClassSubclass, + bindings::PCI_VENDOR_ID_NVIDIA + ), + () + ), + ( + pci::DeviceId::from_class_and_vendor( + Class::DISPLAY_3D, + ClassMask::ClassSubclass, + bindings::PCI_VENDOR_ID_NVIDIA + ), + () + ), + ] ); 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charset="utf-8" This allows callers to write Vendor::SOME_COMPANY instead of bindings::PCI_VENDOR_ID_SOME_COMPANY. It also allows removing "use kernel::bindings" entirely from most of the affected files here. Apply this to the various Rust for Linux callers who were previously using bindings::PCI_VENDOR_ID_*. New APIs: Vendor::SOME_COMPANY Vendor::as_raw() Vendor: TryFrom for Vendor DeviceId::from_class_and_vendor() now takes Vendor type Cc: Danilo Krummrich Cc: Alexandre Courbot Signed-off-by: John Hubbard --- drivers/gpu/nova-core/driver.rs | 13 +- rust/kernel/pci.rs | 26 +- rust/kernel/pci/id.rs | 357 +++++++++++++++++++++++++- samples/rust/rust_dma.rs | 6 +- samples/rust/rust_driver_auxiliary.rs | 12 +- samples/rust/rust_driver_pci.rs | 9 +- 6 files changed, 392 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/nova-core/driver.rs b/drivers/gpu/nova-core/driver= .rs index b60c9defa9d1..5d23a91f51dd 100644 --- a/drivers/gpu/nova-core/driver.rs +++ b/drivers/gpu/nova-core/driver.rs @@ -1,8 +1,13 @@ // SPDX-License-Identifier: GPL-2.0 =20 use kernel::{ - auxiliary, bindings, c_str, device::Core, pci, pci::Class, pci::ClassM= ask, prelude::*, - sizes::SZ_16M, sync::Arc, + auxiliary, c_str, + device::Core, + pci, + pci::{Class, ClassMask, Vendor}, + prelude::*, + sizes::SZ_16M, + sync::Arc, }; =20 use crate::gpu::Gpu; @@ -27,7 +32,7 @@ pub(crate) struct NovaCore { pci::DeviceId::from_class_and_vendor( Class::DISPLAY_VGA, ClassMask::ClassSubclass, - bindings::PCI_VENDOR_ID_NVIDIA + Vendor::NVIDIA ), () ), @@ -35,7 +40,7 @@ pub(crate) struct NovaCore { pci::DeviceId::from_class_and_vendor( Class::DISPLAY_3D, ClassMask::ClassSubclass, - bindings::PCI_VENDOR_ID_NVIDIA + Vendor::NVIDIA ), () ), diff --git a/rust/kernel/pci.rs b/rust/kernel/pci.rs index ee887d616320..c677e7f2c4c9 100644 --- a/rust/kernel/pci.rs +++ b/rust/kernel/pci.rs @@ -25,7 +25,7 @@ =20 mod id; =20 -pub use self::id::{Class, ClassMask}; +pub use self::id::{Class, ClassMask, Vendor}; =20 /// An adapter for the registration of PCI drivers. pub struct Adapter(T); @@ -132,10 +132,10 @@ impl DeviceId { =20 /// Equivalent to C's `PCI_DEVICE` macro. /// - /// Create a new `pci::DeviceId` from a vendor and device ID number. - pub const fn from_id(vendor: u32, device: u32) -> Self { + /// Create a new `pci::DeviceId` from a vendor and device ID. + pub const fn from_id(vendor: Vendor, device: u32) -> Self { Self(bindings::pci_device_id { - vendor, + vendor: vendor.as_raw(), device, subvendor: DeviceId::PCI_ANY_ID, subdevice: DeviceId::PCI_ANY_ID, @@ -166,9 +166,13 @@ pub const fn from_class(class: u32, class_mask: u32) -= > Self { /// /// This is more targeted than [`DeviceId::from_class`]: in addition t= o matching by Vendor, it /// also matches the PCI Class (up to the entire 24 bits, depending on= the mask). - pub const fn from_class_and_vendor(class: Class, class_mask: ClassMask= , vendor: u32) -> Self { + pub const fn from_class_and_vendor( + class: Class, + class_mask: ClassMask, + vendor: Vendor, + ) -> Self { Self(bindings::pci_device_id { - vendor, + vendor: vendor.as_raw(), device: DeviceId::PCI_ANY_ID, subvendor: DeviceId::PCI_ANY_ID, subdevice: DeviceId::PCI_ANY_ID, @@ -227,7 +231,7 @@ macro_rules! pci_device_table { /// ::IdInfo, /// [ /// ( -/// pci::DeviceId::from_id(bindings::PCI_VENDOR_ID_REDHAT, bin= dings::PCI_ANY_ID as u32), +/// pci::DeviceId::from_id(pci::Vendor::REDHAT, bindings::PCI_= ANY_ID as u32), /// (), /// ) /// ] @@ -408,10 +412,12 @@ fn as_raw(&self) -> *mut bindings::pci_dev { } =20 impl Device { - /// Returns the PCI vendor ID. - pub fn vendor_id(&self) -> u16 { + /// Returns the PCI vendor ID as a validated Vendor. + /// Returns an error if the vendor ID is not recognized. + pub fn vendor_id(&self) -> Result { // SAFETY: `self.as_raw` is a valid pointer to a `struct pci_dev`. - unsafe { (*self.as_raw()).vendor } + let vendor_id =3D unsafe { (*self.as_raw()).vendor }; + Vendor::try_from(vendor_id as u32) } =20 /// Returns the PCI device ID. diff --git a/rust/kernel/pci/id.rs b/rust/kernel/pci/id.rs index ed241af07dee..6288d1441a70 100644 --- a/rust/kernel/pci/id.rs +++ b/rust/kernel/pci/id.rs @@ -2,7 +2,7 @@ =20 //! PCI device identifiers and related types. //! -//! This module contains PCI class codes and supporting types. +//! This module contains PCI class codes, Vendor IDs, and supporting types. =20 use crate::{ bindings, @@ -124,6 +124,77 @@ fn try_from(value: u32) -> Result { } } =20 +/// PCI vendor IDs. +/// +/// Each entry contains the 16-bit PCI vendor ID as assigned by the PCI SI= G. +/// +/// # Examples +/// +/// ``` +/// # use kernel::{device::Core, pci::{self, Vendor}, prelude::*}; +/// fn log_device_info(pdev: &pci::Device) -> Result<()> { +/// // Get the validated PCI vendor ID +/// let vendor =3D pdev.vendor_id()?; +/// dev_info!( +/// pdev.as_ref(), +/// "Device: Vendor=3D{}, Device=3D0x{:x}\n", +/// vendor, +/// pdev.device_id() +/// ); +/// Ok(()) +/// } +/// ``` +#[derive(Debug, Clone, Copy, PartialEq, Eq)] +#[repr(transparent)] +pub struct Vendor(u32); + +macro_rules! define_all_pci_vendors { + ( + $($variant:ident =3D $binding:expr,)+ + ) =3D> { + + impl Vendor { + $( + #[allow(missing_docs)] + pub const $variant: Self =3D Self($binding as u32); + )+ + } + + /// Try to convert a raw 16-bit vendor ID to a `Vendor`. + /// Returns `ENODEV` if the value doesn't match any known vendor. + impl TryFrom for Vendor { + type Error =3D Error; + + fn try_from(value: u32) -> Result { + match value { + $(x if x =3D=3D Self::$variant.0 =3D> Ok(Self::$varian= t),)+ + _ =3D> Err(ENODEV), + } + } + } + }; +} + +/// Once constructed, a `Vendor` contains a valid PCI Vendor ID. +impl Vendor { + /// Create a new Vendor from a raw 16-bit vendor ID. + /// Returns an error if the vendor ID is not recognized. + pub fn new(vendor_id: u32) -> Result { + Self::try_from(vendor_id) + } + + /// Get the raw 16-bit vendor ID value. + pub const fn as_raw(self) -> u32 { + self.0 + } +} + +impl fmt::Display for Vendor { + fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { + write!(f, "0x{:04x}", self.0) + } +} + define_all_pci_classes! { NOT_DEFINED =3D bindings::PCI_CLASS_NOT_DEFINED, = // 0x000000 NOT_DEFINED_VGA =3D bindings::PCI_CLASS_NOT_DEFINED_VGA, = // 0x000100 @@ -245,3 +316,287 @@ fn try_from(value: u32) -> Result { =20 OTHERS =3D bindings::PCI_CLASS_OTHERS, = // 0xff0000 } + +define_all_pci_vendors! { + PCI_SIG =3D bindings::PCI_VENDOR_ID_PCI_SIG, = // 0x0001 + LOONGSON =3D bindings::PCI_VENDOR_ID_LOONGSON, = // 0x0014 + SOLIDIGM =3D bindings::PCI_VENDOR_ID_SOLIDIGM, = // 0x025e + TTTECH =3D bindings::PCI_VENDOR_ID_TTTECH, = // 0x0357 + DYNALINK =3D bindings::PCI_VENDOR_ID_DYNALINK, = // 0x0675 + UBIQUITI =3D bindings::PCI_VENDOR_ID_UBIQUITI, = // 0x0777 + BERKOM =3D bindings::PCI_VENDOR_ID_BERKOM, = // 0x0871 + ITTIM =3D bindings::PCI_VENDOR_ID_ITTIM, = // 0x0b48 + COMPAQ =3D bindings::PCI_VENDOR_ID_COMPAQ, = // 0x0e11 + LSI_LOGIC =3D bindings::PCI_VENDOR_ID_LSI_LOGIC, = // 0x1000 + ATI =3D bindings::PCI_VENDOR_ID_ATI, = // 0x1002 + VLSI =3D bindings::PCI_VENDOR_ID_VLSI, = // 0x1004 + ADL =3D bindings::PCI_VENDOR_ID_ADL, = // 0x1005 + NS =3D bindings::PCI_VENDOR_ID_NS, = // 0x100b + TSENG =3D bindings::PCI_VENDOR_ID_TSENG, = // 0x100c + WEITEK =3D bindings::PCI_VENDOR_ID_WEITEK, = // 0x100e + DEC =3D bindings::PCI_VENDOR_ID_DEC, = // 0x1011 + CIRRUS =3D bindings::PCI_VENDOR_ID_CIRRUS, = // 0x1013 + IBM =3D bindings::PCI_VENDOR_ID_IBM, = // 0x1014 + UNISYS =3D bindings::PCI_VENDOR_ID_UNISYS, = // 0x1018 + COMPEX2 =3D bindings::PCI_VENDOR_ID_COMPEX2, = // 0x101a + WD =3D bindings::PCI_VENDOR_ID_WD, = // 0x101c + AMI =3D bindings::PCI_VENDOR_ID_AMI, = // 0x101e + AMD =3D bindings::PCI_VENDOR_ID_AMD, = // 0x1022 + TRIDENT =3D bindings::PCI_VENDOR_ID_TRIDENT, = // 0x1023 + AI =3D bindings::PCI_VENDOR_ID_AI, = // 0x1025 + DELL =3D bindings::PCI_VENDOR_ID_DELL, = // 0x1028 + MATROX =3D bindings::PCI_VENDOR_ID_MATROX, = // 0x102B + MOBILITY_ELECTRONICS =3D bindings::PCI_VENDOR_ID_MOBILITY_ELECTRON= ICS, // 0x14f2 + CT =3D bindings::PCI_VENDOR_ID_CT, = // 0x102c + MIRO =3D bindings::PCI_VENDOR_ID_MIRO, = // 0x1031 + NEC =3D bindings::PCI_VENDOR_ID_NEC, = // 0x1033 + FD =3D bindings::PCI_VENDOR_ID_FD, = // 0x1036 + SI =3D bindings::PCI_VENDOR_ID_SI, = // 0x1039 + HP =3D bindings::PCI_VENDOR_ID_HP, = // 0x103c + HP_3PAR =3D bindings::PCI_VENDOR_ID_HP_3PAR, = // 0x1590 + PCTECH =3D bindings::PCI_VENDOR_ID_PCTECH, = // 0x1042 + ASUSTEK =3D bindings::PCI_VENDOR_ID_ASUSTEK, = // 0x1043 + DPT =3D bindings::PCI_VENDOR_ID_DPT, = // 0x1044 + OPTI =3D bindings::PCI_VENDOR_ID_OPTI, = // 0x1045 + ELSA =3D bindings::PCI_VENDOR_ID_ELSA, = // 0x1048 + STMICRO =3D bindings::PCI_VENDOR_ID_STMICRO, = // 0x104A + BUSLOGIC =3D bindings::PCI_VENDOR_ID_BUSLOGIC, = // 0x104B + TI =3D bindings::PCI_VENDOR_ID_TI, = // 0x104c + SONY =3D bindings::PCI_VENDOR_ID_SONY, = // 0x104d + WINBOND2 =3D bindings::PCI_VENDOR_ID_WINBOND2, = // 0x1050 + ANIGMA =3D bindings::PCI_VENDOR_ID_ANIGMA, = // 0x1051 + EFAR =3D bindings::PCI_VENDOR_ID_EFAR, = // 0x1055 + MOTOROLA =3D bindings::PCI_VENDOR_ID_MOTOROLA, = // 0x1057 + PROMISE =3D bindings::PCI_VENDOR_ID_PROMISE, = // 0x105a + FOXCONN =3D bindings::PCI_VENDOR_ID_FOXCONN, = // 0x105b + UMC =3D bindings::PCI_VENDOR_ID_UMC, = // 0x1060 + PICOPOWER =3D bindings::PCI_VENDOR_ID_PICOPOWER, = // 0x1066 + MYLEX =3D bindings::PCI_VENDOR_ID_MYLEX, = // 0x1069 + APPLE =3D bindings::PCI_VENDOR_ID_APPLE, = // 0x106b + YAMAHA =3D bindings::PCI_VENDOR_ID_YAMAHA, = // 0x1073 + QLOGIC =3D bindings::PCI_VENDOR_ID_QLOGIC, = // 0x1077 + CYRIX =3D bindings::PCI_VENDOR_ID_CYRIX, = // 0x1078 + CONTAQ =3D bindings::PCI_VENDOR_ID_CONTAQ, = // 0x1080 + OLICOM =3D bindings::PCI_VENDOR_ID_OLICOM, = // 0x108d + SUN =3D bindings::PCI_VENDOR_ID_SUN, = // 0x108e + NI =3D bindings::PCI_VENDOR_ID_NI, = // 0x1093 + CMD =3D bindings::PCI_VENDOR_ID_CMD, = // 0x1095 + BROOKTREE =3D bindings::PCI_VENDOR_ID_BROOKTREE, = // 0x109e + SGI =3D bindings::PCI_VENDOR_ID_SGI, = // 0x10a9 + WINBOND =3D bindings::PCI_VENDOR_ID_WINBOND, = // 0x10ad + PLX =3D bindings::PCI_VENDOR_ID_PLX, = // 0x10b5 + MADGE =3D bindings::PCI_VENDOR_ID_MADGE, = // 0x10b6 + THREECOM =3D bindings::PCI_VENDOR_ID_3COM, = // 0x10b7 + AL =3D bindings::PCI_VENDOR_ID_AL, = // 0x10b9 + NEOMAGIC =3D bindings::PCI_VENDOR_ID_NEOMAGIC, = // 0x10c8 + TCONRAD =3D bindings::PCI_VENDOR_ID_TCONRAD, = // 0x10da + ROHM =3D bindings::PCI_VENDOR_ID_ROHM, = // 0x10db + NVIDIA =3D bindings::PCI_VENDOR_ID_NVIDIA, = // 0x10de + IMS =3D bindings::PCI_VENDOR_ID_IMS, = // 0x10e0 + AMCC =3D bindings::PCI_VENDOR_ID_AMCC, = // 0x10e8 + AMPERE =3D bindings::PCI_VENDOR_ID_AMPERE, = // 0x1def + INTERG =3D bindings::PCI_VENDOR_ID_INTERG, = // 0x10ea + REALTEK =3D bindings::PCI_VENDOR_ID_REALTEK, = // 0x10ec + XILINX =3D bindings::PCI_VENDOR_ID_XILINX, = // 0x10ee + INIT =3D bindings::PCI_VENDOR_ID_INIT, = // 0x1101 + CREATIVE =3D bindings::PCI_VENDOR_ID_CREATIVE, = // 0x1102 + TTI =3D bindings::PCI_VENDOR_ID_TTI, = // 0x1103 + SIGMA =3D bindings::PCI_VENDOR_ID_SIGMA, = // 0x1105 + VIA =3D bindings::PCI_VENDOR_ID_VIA, = // 0x1106 + SIEMENS =3D bindings::PCI_VENDOR_ID_SIEMENS, = // 0x110A + VORTEX =3D bindings::PCI_VENDOR_ID_VORTEX, = // 0x1119 + EF =3D bindings::PCI_VENDOR_ID_EF, = // 0x111a + IDT =3D bindings::PCI_VENDOR_ID_IDT, = // 0x111d + FORE =3D bindings::PCI_VENDOR_ID_FORE, = // 0x1127 + PHILIPS =3D bindings::PCI_VENDOR_ID_PHILIPS, = // 0x1131 + EICON =3D bindings::PCI_VENDOR_ID_EICON, = // 0x1133 + CISCO =3D bindings::PCI_VENDOR_ID_CISCO, = // 0x1137 + ZIATECH =3D bindings::PCI_VENDOR_ID_ZIATECH, = // 0x1138 + SYSKONNECT =3D bindings::PCI_VENDOR_ID_SYSKONNECT, = // 0x1148 + DIGI =3D bindings::PCI_VENDOR_ID_DIGI, = // 0x114f + XIRCOM =3D bindings::PCI_VENDOR_ID_XIRCOM, = // 0x115d + SERVERWORKS =3D bindings::PCI_VENDOR_ID_SERVERWORKS, = // 0x1166 + ALTERA =3D bindings::PCI_VENDOR_ID_ALTERA, = // 0x1172 + SBE =3D bindings::PCI_VENDOR_ID_SBE, = // 0x1176 + TOSHIBA =3D bindings::PCI_VENDOR_ID_TOSHIBA, = // 0x1179 + TOSHIBA_2 =3D bindings::PCI_VENDOR_ID_TOSHIBA_2, = // 0x102f + ATTO =3D bindings::PCI_VENDOR_ID_ATTO, = // 0x117c + RICOH =3D bindings::PCI_VENDOR_ID_RICOH, = // 0x1180 + DLINK =3D bindings::PCI_VENDOR_ID_DLINK, = // 0x1186 + ARTOP =3D bindings::PCI_VENDOR_ID_ARTOP, = // 0x1191 + ZEITNET =3D bindings::PCI_VENDOR_ID_ZEITNET, = // 0x1193 + FUJITSU_ME =3D bindings::PCI_VENDOR_ID_FUJITSU_ME, = // 0x119e + MARVELL =3D bindings::PCI_VENDOR_ID_MARVELL, = // 0x11ab + MARVELL_EXT =3D bindings::PCI_VENDOR_ID_MARVELL_EXT, = // 0x1b4b + V3 =3D bindings::PCI_VENDOR_ID_V3, = // 0x11b0 + ATT =3D bindings::PCI_VENDOR_ID_ATT, = // 0x11c1 + SPECIALIX =3D bindings::PCI_VENDOR_ID_SPECIALIX, = // 0x11cb + ANALOG_DEVICES =3D bindings::PCI_VENDOR_ID_ANALOG_DEVICES, = // 0x11d4 + ZORAN =3D bindings::PCI_VENDOR_ID_ZORAN, = // 0x11de + COMPEX =3D bindings::PCI_VENDOR_ID_COMPEX, = // 0x11f6 + MICROSEMI =3D bindings::PCI_VENDOR_ID_MICROSEMI, = // 0x11f8 + RP =3D bindings::PCI_VENDOR_ID_RP, = // 0x11fe + CYCLADES =3D bindings::PCI_VENDOR_ID_CYCLADES, = // 0x120e + ESSENTIAL =3D bindings::PCI_VENDOR_ID_ESSENTIAL, = // 0x120f + O2 =3D bindings::PCI_VENDOR_ID_O2, = // 0x1217 + THREEDX =3D bindings::PCI_VENDOR_ID_3DFX, = // 0x121a + AVM =3D bindings::PCI_VENDOR_ID_AVM, = // 0x1244 + STALLION =3D bindings::PCI_VENDOR_ID_STALLION, = // 0x124d + AT =3D bindings::PCI_VENDOR_ID_AT, = // 0x1259 + ASIX =3D bindings::PCI_VENDOR_ID_ASIX, = // 0x125b + ESS =3D bindings::PCI_VENDOR_ID_ESS, = // 0x125d + SATSAGEM =3D bindings::PCI_VENDOR_ID_SATSAGEM, = // 0x1267 + ENSONIQ =3D bindings::PCI_VENDOR_ID_ENSONIQ, = // 0x1274 + TRANSMETA =3D bindings::PCI_VENDOR_ID_TRANSMETA, = // 0x1279 + ROCKWELL =3D bindings::PCI_VENDOR_ID_ROCKWELL, = // 0x127A + ITE =3D bindings::PCI_VENDOR_ID_ITE, = // 0x1283 + ALTEON =3D bindings::PCI_VENDOR_ID_ALTEON, = // 0x12ae + NVIDIA_SGS =3D bindings::PCI_VENDOR_ID_NVIDIA_SGS, = // 0x12d2 + PERICOM =3D bindings::PCI_VENDOR_ID_PERICOM, = // 0x12D8 + AUREAL =3D bindings::PCI_VENDOR_ID_AUREAL, = // 0x12eb + ELECTRONICDESIGNGMBH =3D bindings::PCI_VENDOR_ID_ELECTRONICDESIGNG= MBH, // 0x12f8 + ESDGMBH =3D bindings::PCI_VENDOR_ID_ESDGMBH, = // 0x12fe + CB =3D bindings::PCI_VENDOR_ID_CB, = // 0x1307 + SIIG =3D bindings::PCI_VENDOR_ID_SIIG, = // 0x131f + RADISYS =3D bindings::PCI_VENDOR_ID_RADISYS, = // 0x1331 + MICRO_MEMORY =3D bindings::PCI_VENDOR_ID_MICRO_MEMORY, = // 0x1332 + DOMEX =3D bindings::PCI_VENDOR_ID_DOMEX, = // 0x134a + INTASHIELD =3D bindings::PCI_VENDOR_ID_INTASHIELD, = // 0x135a + QUATECH =3D bindings::PCI_VENDOR_ID_QUATECH, = // 0x135C + SEALEVEL =3D bindings::PCI_VENDOR_ID_SEALEVEL, = // 0x135e + HYPERCOPE =3D bindings::PCI_VENDOR_ID_HYPERCOPE, = // 0x1365 + DIGIGRAM =3D bindings::PCI_VENDOR_ID_DIGIGRAM, = // 0x1369 + KAWASAKI =3D bindings::PCI_VENDOR_ID_KAWASAKI, = // 0x136b + CNET =3D bindings::PCI_VENDOR_ID_CNET, = // 0x1371 + LMC =3D bindings::PCI_VENDOR_ID_LMC, = // 0x1376 + NETGEAR =3D bindings::PCI_VENDOR_ID_NETGEAR, = // 0x1385 + APPLICOM =3D bindings::PCI_VENDOR_ID_APPLICOM, = // 0x1389 + MOXA =3D bindings::PCI_VENDOR_ID_MOXA, = // 0x1393 + CCD =3D bindings::PCI_VENDOR_ID_CCD, = // 0x1397 + EXAR =3D bindings::PCI_VENDOR_ID_EXAR, = // 0x13a8 + MICROGATE =3D bindings::PCI_VENDOR_ID_MICROGATE, = // 0x13c0 + THREEWARE =3D bindings::PCI_VENDOR_ID_3WARE, = // 0x13C1 + IOMEGA =3D bindings::PCI_VENDOR_ID_IOMEGA, = // 0x13ca + ABOCOM =3D bindings::PCI_VENDOR_ID_ABOCOM, = // 0x13D1 + SUNDANCE =3D bindings::PCI_VENDOR_ID_SUNDANCE, = // 0x13f0 + CMEDIA =3D bindings::PCI_VENDOR_ID_CMEDIA, = // 0x13f6 + ADVANTECH =3D bindings::PCI_VENDOR_ID_ADVANTECH, = // 0x13fe + MEILHAUS =3D bindings::PCI_VENDOR_ID_MEILHAUS, = // 0x1402 + LAVA =3D bindings::PCI_VENDOR_ID_LAVA, = // 0x1407 + TIMEDIA =3D bindings::PCI_VENDOR_ID_TIMEDIA, = // 0x1409 + ICE =3D bindings::PCI_VENDOR_ID_ICE, = // 0x1412 + MICROSOFT =3D bindings::PCI_VENDOR_ID_MICROSOFT, = // 0x1414 + OXSEMI =3D bindings::PCI_VENDOR_ID_OXSEMI, = // 0x1415 + CHELSIO =3D bindings::PCI_VENDOR_ID_CHELSIO, = // 0x1425 + EDIMAX =3D bindings::PCI_VENDOR_ID_EDIMAX, = // 0x1432 + ADLINK =3D bindings::PCI_VENDOR_ID_ADLINK, = // 0x144a + SAMSUNG =3D bindings::PCI_VENDOR_ID_SAMSUNG, = // 0x144d + GIGABYTE =3D bindings::PCI_VENDOR_ID_GIGABYTE, = // 0x1458 + AMBIT =3D bindings::PCI_VENDOR_ID_AMBIT, = // 0x1468 + MYRICOM =3D bindings::PCI_VENDOR_ID_MYRICOM, = // 0x14c1 + MEDIATEK =3D bindings::PCI_VENDOR_ID_MEDIATEK, = // 0x14c3 + TITAN =3D bindings::PCI_VENDOR_ID_TITAN, = // 0x14D2 + PANACOM =3D bindings::PCI_VENDOR_ID_PANACOM, = // 0x14d4 + SIPACKETS =3D bindings::PCI_VENDOR_ID_SIPACKETS, = // 0x14d9 + AFAVLAB =3D bindings::PCI_VENDOR_ID_AFAVLAB, = // 0x14db + AMPLICON =3D bindings::PCI_VENDOR_ID_AMPLICON, = // 0x14dc + BCM_GVC =3D bindings::PCI_VENDOR_ID_BCM_GVC, = // 0x14a4 + BROADCOM =3D bindings::PCI_VENDOR_ID_BROADCOM, = // 0x14e4 + TOPIC =3D bindings::PCI_VENDOR_ID_TOPIC, = // 0x151f + MAINPINE =3D bindings::PCI_VENDOR_ID_MAINPINE, = // 0x1522 + ENE =3D bindings::PCI_VENDOR_ID_ENE, = // 0x1524 + SYBA =3D bindings::PCI_VENDOR_ID_SYBA, = // 0x1592 + MORETON =3D bindings::PCI_VENDOR_ID_MORETON, = // 0x15aa + VMWARE =3D bindings::PCI_VENDOR_ID_VMWARE, = // 0x15ad + ZOLTRIX =3D bindings::PCI_VENDOR_ID_ZOLTRIX, = // 0x15b0 + MELLANOX =3D bindings::PCI_VENDOR_ID_MELLANOX, = // 0x15b3 + DFI =3D bindings::PCI_VENDOR_ID_DFI, = // 0x15bd + QUICKNET =3D bindings::PCI_VENDOR_ID_QUICKNET, = // 0x15e2 + ADDIDATA =3D bindings::PCI_VENDOR_ID_ADDIDATA, = // 0x15B8 + PDC =3D bindings::PCI_VENDOR_ID_PDC, = // 0x15e9 + FARSITE =3D bindings::PCI_VENDOR_ID_FARSITE, = // 0x1619 + ARIMA =3D bindings::PCI_VENDOR_ID_ARIMA, = // 0x161f + BROCADE =3D bindings::PCI_VENDOR_ID_BROCADE, = // 0x1657 + SIBYTE =3D bindings::PCI_VENDOR_ID_SIBYTE, = // 0x166d + ATHEROS =3D bindings::PCI_VENDOR_ID_ATHEROS, = // 0x168c + NETCELL =3D bindings::PCI_VENDOR_ID_NETCELL, = // 0x169c + CENATEK =3D bindings::PCI_VENDOR_ID_CENATEK, = // 0x16CA + SYNOPSYS =3D bindings::PCI_VENDOR_ID_SYNOPSYS, = // 0x16c3 + USR =3D bindings::PCI_VENDOR_ID_USR, = // 0x16ec + VITESSE =3D bindings::PCI_VENDOR_ID_VITESSE, = // 0x1725 + LINKSYS =3D bindings::PCI_VENDOR_ID_LINKSYS, = // 0x1737 + ALTIMA =3D bindings::PCI_VENDOR_ID_ALTIMA, = // 0x173b + CAVIUM =3D bindings::PCI_VENDOR_ID_CAVIUM, = // 0x177d + TECHWELL =3D bindings::PCI_VENDOR_ID_TECHWELL, = // 0x1797 + BELKIN =3D bindings::PCI_VENDOR_ID_BELKIN, = // 0x1799 + RDC =3D bindings::PCI_VENDOR_ID_RDC, = // 0x17f3 + GLI =3D bindings::PCI_VENDOR_ID_GLI, = // 0x17a0 + LENOVO =3D bindings::PCI_VENDOR_ID_LENOVO, = // 0x17aa + QCOM =3D bindings::PCI_VENDOR_ID_QCOM, = // 0x17cb + CDNS =3D bindings::PCI_VENDOR_ID_CDNS, = // 0x17cd + ARECA =3D bindings::PCI_VENDOR_ID_ARECA, = // 0x17d3 + S2IO =3D bindings::PCI_VENDOR_ID_S2IO, = // 0x17d5 + SITECOM =3D bindings::PCI_VENDOR_ID_SITECOM, = // 0x182d + TOPSPIN =3D bindings::PCI_VENDOR_ID_TOPSPIN, = // 0x1867 + COMMTECH =3D bindings::PCI_VENDOR_ID_COMMTECH, = // 0x18f7 + SILAN =3D bindings::PCI_VENDOR_ID_SILAN, = // 0x1904 + RENESAS =3D bindings::PCI_VENDOR_ID_RENESAS, = // 0x1912 + SOLARFLARE =3D bindings::PCI_VENDOR_ID_SOLARFLARE, = // 0x1924 + TDI =3D bindings::PCI_VENDOR_ID_TDI, = // 0x192E + NXP =3D bindings::PCI_VENDOR_ID_NXP, = // 0x1957 + PASEMI =3D bindings::PCI_VENDOR_ID_PASEMI, = // 0x1959 + ATTANSIC =3D bindings::PCI_VENDOR_ID_ATTANSIC, = // 0x1969 + JMICRON =3D bindings::PCI_VENDOR_ID_JMICRON, = // 0x197B + KORENIX =3D bindings::PCI_VENDOR_ID_KORENIX, = // 0x1982 + HUAWEI =3D bindings::PCI_VENDOR_ID_HUAWEI, = // 0x19e5 + NETRONOME =3D bindings::PCI_VENDOR_ID_NETRONOME, = // 0x19ee + QMI =3D bindings::PCI_VENDOR_ID_QMI, = // 0x1a32 + AZWAVE =3D bindings::PCI_VENDOR_ID_AZWAVE, = // 0x1a3b + REDHAT_QUMRANET =3D bindings::PCI_VENDOR_ID_REDHAT_QUMRANET, = // 0x1af4 + ASMEDIA =3D bindings::PCI_VENDOR_ID_ASMEDIA, = // 0x1b21 + REDHAT =3D bindings::PCI_VENDOR_ID_REDHAT, = // 0x1b36 + WCHIC =3D bindings::PCI_VENDOR_ID_WCHIC, = // 0x1c00 + SILICOM_DENMARK =3D bindings::PCI_VENDOR_ID_SILICOM_DENMARK, = // 0x1c2c + AMAZON_ANNAPURNA_LABS =3D bindings::PCI_VENDOR_ID_AMAZON_ANNAPURNA_= LABS, // 0x1c36 + CIRCUITCO =3D bindings::PCI_VENDOR_ID_CIRCUITCO, = // 0x1cc8 + AMAZON =3D bindings::PCI_VENDOR_ID_AMAZON, = // 0x1d0f + ZHAOXIN =3D bindings::PCI_VENDOR_ID_ZHAOXIN, = // 0x1d17 + ROCKCHIP =3D bindings::PCI_VENDOR_ID_ROCKCHIP, = // 0x1d87 + HYGON =3D bindings::PCI_VENDOR_ID_HYGON, = // 0x1d94 + META =3D bindings::PCI_VENDOR_ID_META, = // 0x1d9b + FUNGIBLE =3D bindings::PCI_VENDOR_ID_FUNGIBLE, = // 0x1dad + HXT =3D bindings::PCI_VENDOR_ID_HXT, = // 0x1dbf + TEKRAM =3D bindings::PCI_VENDOR_ID_TEKRAM, = // 0x1de1 + RPI =3D bindings::PCI_VENDOR_ID_RPI, = // 0x1de4 + ALIBABA =3D bindings::PCI_VENDOR_ID_ALIBABA, = // 0x1ded + CXL =3D bindings::PCI_VENDOR_ID_CXL, = // 0x1e98 + TEHUTI =3D bindings::PCI_VENDOR_ID_TEHUTI, = // 0x1fc9 + SUNIX =3D bindings::PCI_VENDOR_ID_SUNIX, = // 0x1fd4 + HINT =3D bindings::PCI_VENDOR_ID_HINT, = // 0x3388 + THREEDLABS =3D bindings::PCI_VENDOR_ID_3DLABS, = // 0x3d3d + NETXEN =3D bindings::PCI_VENDOR_ID_NETXEN, = // 0x4040 + AKS =3D bindings::PCI_VENDOR_ID_AKS, = // 0x416c + WCHCN =3D bindings::PCI_VENDOR_ID_WCHCN, = // 0x4348 + ACCESSIO =3D bindings::PCI_VENDOR_ID_ACCESSIO, = // 0x494f + S3 =3D bindings::PCI_VENDOR_ID_S3, = // 0x5333 + DUNORD =3D bindings::PCI_VENDOR_ID_DUNORD, = // 0x5544 + DCI =3D bindings::PCI_VENDOR_ID_DCI, = // 0x6666 + GLENFLY =3D bindings::PCI_VENDOR_ID_GLENFLY, = // 0x6766 + INTEL =3D bindings::PCI_VENDOR_ID_INTEL, = // 0x8086 + WANGXUN =3D bindings::PCI_VENDOR_ID_WANGXUN, = // 0x8088 + SCALEMP =3D bindings::PCI_VENDOR_ID_SCALEMP, = // 0x8686 + COMPUTONE =3D bindings::PCI_VENDOR_ID_COMPUTONE, = // 0x8e0e + KTI =3D bindings::PCI_VENDOR_ID_KTI, = // 0x8e2e + ADAPTEC =3D bindings::PCI_VENDOR_ID_ADAPTEC, = // 0x9004 + ADAPTEC2 =3D bindings::PCI_VENDOR_ID_ADAPTEC2, = // 0x9005 + HOLTEK =3D bindings::PCI_VENDOR_ID_HOLTEK, = // 0x9412 + NETMOS =3D bindings::PCI_VENDOR_ID_NETMOS, = // 0x9710 + THREECOM_2 =3D bindings::PCI_VENDOR_ID_3COM_2, = // 0xa727 + SOLIDRUN =3D bindings::PCI_VENDOR_ID_SOLIDRUN, = // 0xd063 + DIGIUM =3D bindings::PCI_VENDOR_ID_DIGIUM, = // 0xd161 + TIGERJET =3D bindings::PCI_VENDOR_ID_TIGERJET, = // 0xe159 + XILINX_RME =3D bindings::PCI_VENDOR_ID_XILINX_RME, = // 0xea60 + XEN =3D bindings::PCI_VENDOR_ID_XEN, = // 0x5853 + OCZ =3D bindings::PCI_VENDOR_ID_OCZ, = // 0x1b85 + NCUBE =3D bindings::PCI_VENDOR_ID_NCUBE, = // 0x10ff +} diff --git a/samples/rust/rust_dma.rs b/samples/rust/rust_dma.rs index c5e7cce68654..f3385c4a7e5b 100644 --- a/samples/rust/rust_dma.rs +++ b/samples/rust/rust_dma.rs @@ -5,7 +5,6 @@ //! To make this driver probe, QEMU must be run with `-device pci-testdev`. =20 use kernel::{ - bindings, device::Core, dma::{CoherentAllocation, Device, DmaMask}, pci, @@ -45,10 +44,7 @@ unsafe impl kernel::transmute::FromBytes for MyStruct {} PCI_TABLE, MODULE_PCI_TABLE, ::IdInfo, - [( - pci::DeviceId::from_id(bindings::PCI_VENDOR_ID_REDHAT, 0x5), - () - )] + [(pci::DeviceId::from_id(pci::Vendor::REDHAT, 0x5), ())] ); =20 impl pci::Driver for DmaSampleDriver { diff --git a/samples/rust/rust_driver_auxiliary.rs b/samples/rust/rust_driv= er_auxiliary.rs index f2a820683fc3..1191dd56e924 100644 --- a/samples/rust/rust_driver_auxiliary.rs +++ b/samples/rust/rust_driver_auxiliary.rs @@ -5,7 +5,7 @@ //! To make this driver probe, QEMU must be run with `-device pci-testdev`. =20 use kernel::{ - auxiliary, bindings, c_str, device::Core, driver, error::Error, pci, p= relude::*, InPlaceModule, + auxiliary, c_str, device::Core, driver, error::Error, pci, prelude::*,= InPlaceModule, }; =20 use pin_init::PinInit; @@ -50,10 +50,7 @@ struct ParentDriver { PCI_TABLE, MODULE_PCI_TABLE, ::IdInfo, - [( - pci::DeviceId::from_id(bindings::PCI_VENDOR_ID_REDHAT, 0x5), - () - )] + [(pci::DeviceId::from_id(pci::Vendor::REDHAT, 0x5), ())] ); =20 impl pci::Driver for ParentDriver { @@ -81,11 +78,12 @@ fn connect(adev: &auxiliary::Device) -> Result<()> { let parent =3D adev.parent().ok_or(EINVAL)?; let pdev: &pci::Device =3D parent.try_into()?; =20 + let vendor =3D pdev.vendor_id()?; dev_info!( adev.as_ref(), - "Connect auxiliary {} with parent: VendorID=3D{:#x}, DeviceID= =3D{:#x}\n", + "Connect auxiliary {} with parent: VendorID=3D{}, DeviceID=3D{= :#x}\n", adev.id(), - pdev.vendor_id(), + vendor, pdev.device_id() ); =20 diff --git a/samples/rust/rust_driver_pci.rs b/samples/rust/rust_driver_pci= .rs index 606946ff4d7f..fe30a280cfa8 100644 --- a/samples/rust/rust_driver_pci.rs +++ b/samples/rust/rust_driver_pci.rs @@ -4,7 +4,7 @@ //! //! To make this driver probe, QEMU must be run with `-device pci-testdev`. =20 -use kernel::{bindings, c_str, device::Core, devres::Devres, pci, prelude::= *, types::ARef}; +use kernel::{c_str, device::Core, devres::Devres, pci, prelude::*, types::= ARef}; =20 struct Regs; =20 @@ -38,7 +38,7 @@ struct SampleDriver { MODULE_PCI_TABLE, ::IdInfo, [( - pci::DeviceId::from_id(bindings::PCI_VENDOR_ID_REDHAT, 0x5), + pci::DeviceId::from_id(pci::Vendor::REDHAT, 0x5), TestIndex::NO_EVENTFD )] ); @@ -66,10 +66,11 @@ impl pci::Driver for SampleDriver { const ID_TABLE: pci::IdTable =3D &PCI_TABLE; =20 fn probe(pdev: &pci::Device, info: &Self::IdInfo) -> Result>> { + let vendor =3D pdev.vendor_id()?; dev_dbg!( pdev.as_ref(), - "Probe Rust PCI driver sample (PCI ID: 0x{:x}, 0x{:x}).\n", - pdev.vendor_id(), + "Probe Rust PCI driver sample (PCI ID: {}, 0x{:x}).\n", + vendor, pdev.device_id() ); =20 --=20 2.50.1