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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=a4RpNUSF c=1 sm=1 tr=0 ts=68a4fa99 cx=c_pps a=Ou0eQOY4+eZoSc0qltEV5Q==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=COk6AnOGAAAA:8 a=tKL6smffEGmnvWNMxd4A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=TjNXssC_j7lpFel5tvFf:22 a=cPQSjfK2_nFv0Q5t_7PE:22 X-Proofpoint-ORIG-GUID: gzTP3cwMlR_9qgy6VEpk6PJEn4r5FBuO X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODE5MDE5NiBTYWx0ZWRfX1pEEIJ5tJWlw ql51eXwWy53sq1i6xDxYQuV0ArEvQNdE08Kfs27uPyLuk/ByJy4P/DIIMtjFjH2UQqu8jEx7eiJ dF+Ky1xNDXwf7v6VksyWBxtb0iM671OOPS/F822rj3l3rFRY+yPSVEoTElJ6E4rLHHw74BrWKfD YP5KpjLhoMB6qZ2ZGyF7DKEczsRrs8G9eK61TzoYT433sCQLYt/zmlK1oFM85YS9lw0XTfo6dQD QkK1MuahdlqWUepKKWsi4qLNA9i8qB9M7DYUfhV3zmE1yeJV3eQ7qDkBgt9s8KyVuO9AuJOzva1 si7J+kwgL9KYmIatncHSkVaMC6eOKH6vXTemFOhGrG3vwY0j08R0vHw0BgHAvBIbf7GDFlDxqT0 eJzO1W9mQJb4mPMINYutfC3BIcK5/Q== X-Proofpoint-GUID: gzTP3cwMlR_9qgy6VEpk6PJEn4r5FBuO X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-19_03,2025-08-14_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 impostorscore=0 bulkscore=0 adultscore=0 priorityscore=1501 clxscore=1015 phishscore=0 lowpriorityscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2508110000 definitions=main-2508190196 On certain SoCs, power regulators are shared between the QMP UFS PHY and other IP blocks. To ensure proper operation, the regulator framework must be informed of the UFS PHY's load requirements. This is essential because the regulator's operating mode=E2=80=94whether Low Power or High Power=E2=80=94depends on the maximum expected load at any giv= en time, which the regulator driver needs to manage accordingly. To support this, replace devm_regulator_bulk_get() with devm_regulator_bulk_get_const() and inline the qmp_ufs_vreg_init() function. additionally replace the array of regulator names with a bulk regulator data structure, and utilize the init_load_uA field provided by the regulator framework. This ensures that regulator_set_load() is automatically invoked before the first enable operation. Signed-off-by: Nitin Rawat Reviewed-by: Dmitry Baryshkov Reviewed-by: Manivannan Sadhasivam --- drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 29 +++++++------------------ 1 file changed, 8 insertions(+), 21 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm= /phy-qcom-qmp-ufs.c index 9c69c77d10c8..aaa88ca0ef07 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c @@ -1107,7 +1107,7 @@ struct qmp_phy_cfg { const struct qmp_phy_cfg_tbls tbls_hs_overlay[NUM_OVERLAY]; /* regulators to be requested */ - const char * const *vreg_list; + const struct regulator_bulk_data *vreg_list; int num_vregs; /* array of registers with different offsets */ @@ -1164,9 +1164,10 @@ static inline void qphy_clrbits(void __iomem *base, = u32 offset, u32 val) readl(base + offset); } -/* list of regulators */ -static const char * const qmp_phy_vreg_l[] =3D { - "vdda-phy", "vdda-pll", +/* Default regulator bulk data (no load used) */ +static const struct regulator_bulk_data qmp_phy_vreg_l[] =3D { + { .supply =3D "vdda-phy" }, + { .supply =3D "vdda-pll" }, }; static const struct qmp_ufs_offsets qmp_ufs_offsets =3D { @@ -1890,22 +1891,6 @@ static const struct phy_ops qcom_qmp_ufs_phy_ops =3D= { .owner =3D THIS_MODULE, }; -static int qmp_ufs_vreg_init(struct qmp_ufs *qmp) -{ - const struct qmp_phy_cfg *cfg =3D qmp->cfg; - struct device *dev =3D qmp->dev; - int num =3D cfg->num_vregs; - int i; - - qmp->vregs =3D devm_kcalloc(dev, num, sizeof(*qmp->vregs), GFP_KERNEL); - if (!qmp->vregs) - return -ENOMEM; - - for (i =3D 0; i < num; i++) - qmp->vregs[i].supply =3D cfg->vreg_list[i]; - - return devm_regulator_bulk_get(dev, num, qmp->vregs); -} static int qmp_ufs_clk_init(struct qmp_ufs *qmp) { @@ -2068,7 +2053,9 @@ static int qmp_ufs_probe(struct platform_device *pdev) if (ret) return ret; - ret =3D qmp_ufs_vreg_init(qmp); + ret =3D devm_regulator_bulk_get_const(dev, qmp->cfg->num_vregs, + qmp->cfg->vreg_list, + &qmp->vregs); if (ret) return ret; -- 2.48.1