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charset="utf-8" Remote processors may announce multiple devices (e.g., I2C, GPIO) over an RPMSG channel. These devices may require corresponding device tree nodes, especially when acting as providers, to supply phandles for their consumers. Define an RPMSG node to work as a container for a group of RPMSG channels under the imx_rproc node. Each subnode within "rpmsg" represents an individual RPMSG channel. The name of each subnode corresponds to the channel name as defined by the remote processor. All remote devices associated with a given channel are defined as child nodes under the corresponding channel node. Signed-off-by: Shenwei Wang Reviewed-by: Frank Li --- .../bindings/remoteproc/fsl,imx-rproc.yaml | 117 ++++++++++++++++++ 1 file changed, 117 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yam= l b/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml index 57d75acb0b5e..a105aac798d0 100644 --- a/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml +++ b/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml @@ -84,6 +84,86 @@ properties: This property is to specify the resource id of the remote processor = in SoC which supports SCFW =20 + rpmsg: + type: object + additionalProperties: false + description: + Present a group of RPMSG channel devices. + + properties: + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + rpmsg-io-channel: + type: object + unevaluatedProperties: false + properties: + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + patternProperties: + "gpio@[0-9a-f]+$": + type: object + unevaluatedProperties: false + properties: + compatible: + enum: + - fsl,imx-rpmsg-gpio + + reg: + maxItems: 1 + + required: + - compatible + - reg + + allOf: + - $ref: /schemas/gpio/gpio.yaml# + - $ref: /schemas/interrupt-controller.yaml# + + required: + - '#address-cells' + - '#size-cells' + + rpmsg-i2c-channel: + type: object + unevaluatedProperties: false + properties: + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + patternProperties: + "i2c@[0-9a-f]+$": + type: object + unevaluatedProperties: false + properties: + compatible: + enum: + - fsl,imx-rpmsg-i2c + + reg: + maxItems: 1 + + required: + - compatible + - reg + + allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + + required: + - '#address-cells' + - '#size-cells' + required: - compatible =20 @@ -146,5 +226,42 @@ examples: &mu 3 1>; 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Received: from PAXPR04MB9185.eurprd04.prod.outlook.com (2603:10a6:102:231::11) by VI1PR04MB7040.eurprd04.prod.outlook.com (2603:10a6:800:121::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9052.8; Mon, 18 Aug 2025 20:45:24 +0000 Received: from PAXPR04MB9185.eurprd04.prod.outlook.com ([fe80::21bf:975e:f24d:1612]) by PAXPR04MB9185.eurprd04.prod.outlook.com ([fe80::21bf:975e:f24d:1612%7]) with mapi id 15.20.9052.011; Mon, 18 Aug 2025 20:45:24 +0000 From: Shenwei Wang To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Linus Walleij , Bartosz Golaszewski Cc: Pengutronix Kernel Team , Fabio Estevam , Shenwei Wang , Peng Fan , linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com Subject: [PATCH 2/4] remoteproc: imx_rproc: Populate devices under "rpmsg" subnode Date: Mon, 18 Aug 2025 15:44:18 -0500 Message-ID: <20250818204420.794554-3-shenwei.wang@nxp.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250818204420.794554-1-shenwei.wang@nxp.com> References: <20250818204420.794554-1-shenwei.wang@nxp.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: PH7PR17CA0021.namprd17.prod.outlook.com (2603:10b6:510:324::27) To PAXPR04MB9185.eurprd04.prod.outlook.com (2603:10a6:102:231::11) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PAXPR04MB9185:EE_|VI1PR04MB7040:EE_ X-MS-Office365-Filtering-Correlation-Id: 38e85fc5-5ae0-440b-2cf4-08ddde98280b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|52116014|7416014|19092799006|376014|38350700014; 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charset="utf-8" Register the RPMsg channel driver and populate remote devices defined under the "rpmsg" subnode upon receiving their notification messages. The following illustrates the expected DTS layout structure: cm33: remoteproc-cm33 { compatible =3D "fsl,imx8ulp-cm33"; rpmsg { rpmsg-io-channel { gpio@0 { compatible =3D "fsl,imx-rpmsg-gpio"; reg =3D <0>; }; gpio@1 { compatible =3D "fsl,imx-rpmsg-gpio"; reg =3D <1>; }; ... }; rpmsg-i2c-channel { i2c@0 { compatible =3D "fsl,imx-rpmsg-i2c"; reg =3D <0>; }; }; ... }; }; Signed-off-by: Shenwei Wang --- drivers/remoteproc/imx_rproc.c | 125 +++++++++++++++++++++++++++++++++ include/linux/imx_rpmsg.h | 55 +++++++++++++++ 2 files changed, 180 insertions(+) create mode 100644 include/linux/imx_rpmsg.h diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c index a6eef0080ca9..9b3396f3f1ec 100644 --- a/drivers/remoteproc/imx_rproc.c +++ b/drivers/remoteproc/imx_rproc.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -15,6 +16,8 @@ #include #include #include +#include +#include #include #include #include @@ -22,6 +25,7 @@ #include #include #include +#include #include =20 #include "imx_rproc.h" @@ -1084,6 +1088,126 @@ static int imx_rproc_sys_off_handler(struct sys_off= _data *data) return NOTIFY_DONE; } =20 +struct imx_rpmsg_driver { + struct rpmsg_driver rpdrv; + void *driver_data; +}; + +static char *channel_device_map[][2] =3D { + {"rpmsg-io-channel", "fsl,imx-rpmsg-gpio"}, + {"rpmsg-i2c-channel", "fsl,imx-rpmsg-i2c"}, +}; + +static int imx_rpmsg_endpoint_cb(struct rpmsg_device *rpdev, + void *data, int len, void *priv, u32 src) +{ + struct imx_rpmsg_driver_data *drvdata; + + drvdata =3D dev_get_drvdata(&rpdev->dev); + if (drvdata && drvdata->rx_callback) + return drvdata->rx_callback(rpdev, data, len, priv, src); + + return 0; +} + +static void imx_rpmsg_endpoint_remove(struct rpmsg_device *rpdev) +{ + of_platform_depopulate(&rpdev->dev); +} + +static int imx_rpmsg_endpoint_probe(struct rpmsg_device *rpdev) +{ + struct imx_rpmsg_driver_data *drvdata; + struct imx_rpmsg_driver *imx_rpdrv; + struct device *dev =3D &rpdev->dev; + struct of_dev_auxdata *auxdata; + struct rpmsg_driver *rpdrv; + int i; + + rpdrv =3D container_of(dev->driver, struct rpmsg_driver, drv); + imx_rpdrv =3D container_of(rpdrv, struct imx_rpmsg_driver, rpdrv); + + if (!imx_rpdrv->driver_data) + return -EINVAL; + + drvdata =3D devm_kmemdup(dev, imx_rpdrv->driver_data, sizeof(*drvdata), G= FP_KERNEL); + if (!drvdata) + return -ENOMEM; + + i =3D drvdata->map_idx; + if (i >=3D ARRAY_SIZE(channel_device_map)) + return -ENODEV; + + auxdata =3D devm_kzalloc(dev, sizeof(*auxdata)*2, GFP_KERNEL); + if (!auxdata) + return -ENOMEM; + + drvdata->rpdev =3D rpdev; + auxdata[0].compatible =3D channel_device_map[i][1]; + auxdata[0].platform_data =3D drvdata; + dev_set_drvdata(dev, drvdata); + + of_platform_populate(drvdata->channel_node, NULL, auxdata, dev); + of_node_put(drvdata->channel_node); + + return 0; +} + +static int imx_of_rpmsg_node_init(struct platform_device *pdev) +{ + struct device_node *np __free(device_node), *channel; + struct imx_rpmsg_driver_data *driver_data; + struct imx_rpmsg_driver *rp_driver; + struct rpmsg_device_id *rpdev_id; + int i, ret; + + int count =3D ARRAY_SIZE(channel_device_map); + struct device *dev =3D &pdev->dev; + + np =3D of_get_child_by_name(dev->of_node, "rpmsg"); + if (!np) + return 0; + + for (i =3D 0; i < count; i++) { + ret =3D -ENOMEM; + channel =3D of_get_child_by_name(np, channel_device_map[i][0]); + if (!channel) + continue; + + rpdev_id =3D devm_kzalloc(dev, sizeof(*rpdev_id)*2, GFP_KERNEL); + if (!rpdev_id) + break; + strscpy(rpdev_id[0].name, channel_device_map[i][0], RPMSG_NAME_SIZE); + + rp_driver =3D devm_kzalloc(dev, sizeof(*rp_driver), GFP_KERNEL); + if (!rp_driver) + break; + + driver_data =3D devm_kzalloc(dev, sizeof(*driver_data), GFP_KERNEL); + if (!driver_data) + break; + + ret =3D 0; + driver_data->rproc_name =3D dev->of_node->name; + driver_data->channel_node =3D channel; + driver_data->map_idx =3D i; + + rp_driver->rpdrv.drv.name =3D channel_device_map[i][0]; + rp_driver->rpdrv.id_table =3D rpdev_id; + rp_driver->rpdrv.probe =3D imx_rpmsg_endpoint_probe; + rp_driver->rpdrv.remove =3D imx_rpmsg_endpoint_remove; + rp_driver->rpdrv.callback =3D imx_rpmsg_endpoint_cb; + rp_driver->driver_data =3D driver_data; + + register_rpmsg_driver(&rp_driver->rpdrv); + } + + if ((ret < 0) && channel) + of_node_put(channel); + + return ret; +} + static int imx_rproc_probe(struct platform_device *pdev) { struct device *dev =3D &pdev->dev; @@ -1177,6 +1301,7 @@ static int imx_rproc_probe(struct platform_device *pd= ev) goto err_put_clk; } =20 + imx_of_rpmsg_node_init(pdev); return 0; =20 err_put_clk: diff --git a/include/linux/imx_rpmsg.h b/include/linux/imx_rpmsg.h new file mode 100644 index 000000000000..300ada6237be --- /dev/null +++ b/include/linux/imx_rpmsg.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2025 NXP. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * @file linux/imx_rpmsg.h + * + * @brief Global header file for iMX RPMSG + * + * @ingroup RPMSG + */ +#ifndef __LINUX_IMX_RPMSG_H__ +#define __LINUX_IMX_RPMSG_H__ + +#include +#include + +/* Category define */ +#define IMX_RMPSG_LIFECYCLE 1 +#define IMX_RPMSG_PMIC 2 +#define IMX_RPMSG_AUDIO 3 +#define IMX_RPMSG_KEY 4 +#define IMX_RPMSG_GPIO 5 +#define IMX_RPMSG_RTC 6 +#define IMX_RPMSG_SENSOR 7 +/* rpmsg version */ +#define IMX_RMPSG_MAJOR 1 +#define IMX_RMPSG_MINOR 0 + +#define MAX_DEV_PER_CHANNEL 10 + +struct imx_rpmsg_head { + u8 cate; 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charset="utf-8" On i.MX SoCs, the system may include two processors: - An MCU running an RTOS - An MPU running Linux These processors communicate via the RPMSG protocol. The driver implements the standard GPIO interface, allowing the Linux side to control GPIO controllers which reside in the remote processor via RPMSG protocol. Signed-off-by: Shenwei Wang --- drivers/gpio/Kconfig | 11 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-imx-rpmsg.c | 559 ++++++++++++++++++++++++++++++++++ 3 files changed, 571 insertions(+) create mode 100644 drivers/gpio/gpio-imx-rpmsg.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index a437fe652dbc..2ce4e9b5225e 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -402,6 +402,17 @@ config GPIO_ICH =20 If unsure, say N. =20 +config GPIO_IMX_RPMSG + tristate "NXP i.MX SoC RPMSG GPIO support" + depends on IMX_REMOTEPROC && RPMSG && GPIOLIB + default IMX_REMOTEPROC + help + Say yes here to support the RPMSG GPIO functions on i.MX SoC based + platform. Currently supported devices: i.MX7ULP, i.MX8ULP, i.MX8x, + and i.MX9x. + + If unsure, say N. + config GPIO_IMX_SCU def_bool y depends on IMX_SCU diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 379f55e9ed1e..e01465c03431 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -83,6 +83,7 @@ obj-$(CONFIG_GPIO_I8255) +=3D gpio-i8255.o obj-$(CONFIG_GPIO_ICH) +=3D gpio-ich.o obj-$(CONFIG_GPIO_IDIO_16) +=3D gpio-idio-16.o obj-$(CONFIG_GPIO_IDT3243X) +=3D gpio-idt3243x.o +obj-$(CONFIG_GPIO_IMX_RPMSG) +=3D gpio-imx-rpmsg.o obj-$(CONFIG_GPIO_IMX_SCU) +=3D gpio-imx-scu.o obj-$(CONFIG_GPIO_IT87) +=3D gpio-it87.o obj-$(CONFIG_GPIO_IXP4XX) +=3D gpio-ixp4xx.o diff --git a/drivers/gpio/gpio-imx-rpmsg.c b/drivers/gpio/gpio-imx-rpmsg.c new file mode 100644 index 000000000000..0f9c5ceec651 --- /dev/null +++ b/drivers/gpio/gpio-imx-rpmsg.c @@ -0,0 +1,559 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright 2025 NXP + * + * The driver exports a standard gpiochip interface to control + * the GPIO controllers via RPMSG on a remote processor. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define IMX_RPMSG_GPIO_PER_PORT 32 +#define RPMSG_TIMEOUT 1000 + +enum gpio_input_trigger_type { + GPIO_RPMSG_TRI_IGNORE, + GPIO_RPMSG_TRI_RISING, + GPIO_RPMSG_TRI_FALLING, + GPIO_RPMSG_TRI_BOTH_EDGE, + GPIO_RPMSG_TRI_LOW_LEVEL, + GPIO_RPMSG_TRI_HIGH_LEVEL, +}; + +enum gpio_rpmsg_header_type { + GPIO_RPMSG_SETUP, + GPIO_RPMSG_REPLY, + GPIO_RPMSG_NOTIFY, +}; + +enum gpio_rpmsg_header_cmd { + GPIO_RPMSG_INPUT_INIT, + GPIO_RPMSG_OUTPUT_INIT, + GPIO_RPMSG_INPUT_GET, +}; + +struct gpio_rpmsg_data { + struct imx_rpmsg_head header; + u8 pin_idx; + u8 port_idx; + union { + u8 event; + u8 retcode; + u8 value; + } out; + union { + u8 wakeup; + u8 value; + } in; +} __packed __aligned(8); + +struct imx_rpmsg_gpio_pin { + u8 irq_shutdown; + u8 irq_unmask; + u8 irq_mask; + u32 irq_wake_enable; + u32 irq_type; + struct gpio_rpmsg_data msg; +}; + +struct imx_gpio_rpmsg_info { + struct rpmsg_device *rpdev; + struct gpio_rpmsg_data *notify_msg; + struct gpio_rpmsg_data *reply_msg; + struct pm_qos_request pm_qos_req; + struct completion cmd_complete; + struct mutex lock; + struct imx_rpmsg_gpio_port **port_store; +}; + +struct imx_rpmsg_gpio_port { + struct gpio_chip gc; + struct irq_chip chip; + struct device *dev; + struct irq_domain *domain; + struct imx_rpmsg_gpio_pin gpio_pins[IMX_RPMSG_GPIO_PER_PORT]; + struct imx_gpio_rpmsg_info info; + int idx; +}; + +static int gpio_send_message(struct imx_rpmsg_gpio_port *port, + struct gpio_rpmsg_data *msg, + bool sync) +{ + struct imx_gpio_rpmsg_info *info =3D &port->info; + int err; + + if (!info->rpdev) { + dev_dbg(&info->rpdev->dev, + "rpmsg channel not ready, m4 image ready?\n"); + return -EINVAL; + } + + cpu_latency_qos_add_request(&info->pm_qos_req, 0); + reinit_completion(&info->cmd_complete); + err =3D rpmsg_send(info->rpdev->ept, (void *)msg, + sizeof(struct gpio_rpmsg_data)); + if (err) { + dev_err(&info->rpdev->dev, "rpmsg_send failed: %d\n", err); + goto err_out; + } + + if (sync) { + err =3D wait_for_completion_timeout(&info->cmd_complete, + msecs_to_jiffies(RPMSG_TIMEOUT)); + if (!err) { + dev_err(&info->rpdev->dev, "rpmsg_send timeout!\n"); + err =3D -ETIMEDOUT; + goto err_out; + } + + if (info->reply_msg->out.retcode !=3D 0) { + dev_err(&info->rpdev->dev, "rpmsg not ack %d!\n", + info->reply_msg->out.retcode); + err =3D -EINVAL; + goto err_out; + } + + /* copy the reply message */ + memcpy(&port->gpio_pins[info->reply_msg->pin_idx].msg, + info->reply_msg, sizeof(*info->reply_msg)); + + err =3D 0; + } + +err_out: + cpu_latency_qos_remove_request(&info->pm_qos_req); + + return err; +} + +static struct gpio_rpmsg_data *gpio_get_pin_msg(struct imx_rpmsg_gpio_port= *port, + unsigned int offset) +{ + struct gpio_rpmsg_data *msg =3D &port->gpio_pins[offset].msg; + + memset(msg, 0, sizeof(struct gpio_rpmsg_data)); + + return msg; +}; + +static int imx_rpmsg_gpio_get(struct gpio_chip *gc, unsigned int gpio) +{ + struct imx_rpmsg_gpio_port *port =3D gpiochip_get_data(gc); + struct gpio_rpmsg_data *msg =3D NULL; + int ret; + + mutex_lock(&port->info.lock); + + msg =3D gpio_get_pin_msg(port, gpio); + msg->header.cate =3D IMX_RPMSG_GPIO; + msg->header.major =3D IMX_RMPSG_MAJOR; + msg->header.minor =3D IMX_RMPSG_MINOR; + msg->header.type =3D GPIO_RPMSG_SETUP; + msg->header.cmd =3D GPIO_RPMSG_INPUT_GET; + msg->pin_idx =3D gpio; + msg->port_idx =3D port->idx; + + ret =3D gpio_send_message(port, msg, true); + if (!ret) + ret =3D !!port->gpio_pins[gpio].msg.in.value; + + mutex_unlock(&port->info.lock); + + return ret; +} + +static int imx_rpmsg_gpio_direction_input(struct gpio_chip *gc, + unsigned int gpio) +{ + struct imx_rpmsg_gpio_port *port =3D gpiochip_get_data(gc); + struct gpio_rpmsg_data *msg =3D NULL; + int ret; + + mutex_lock(&port->info.lock); + + msg =3D gpio_get_pin_msg(port, gpio); + msg->header.cate =3D IMX_RPMSG_GPIO; + msg->header.major =3D IMX_RMPSG_MAJOR; + msg->header.minor =3D IMX_RMPSG_MINOR; + msg->header.type =3D GPIO_RPMSG_SETUP; + msg->header.cmd =3D GPIO_RPMSG_INPUT_INIT; + msg->pin_idx =3D gpio; + msg->port_idx =3D port->idx; + + msg->out.event =3D GPIO_RPMSG_TRI_IGNORE; + msg->in.wakeup =3D 0; + + ret =3D gpio_send_message(port, msg, true); + + mutex_unlock(&port->info.lock); + + return ret; +} + +static inline void imx_rpmsg_gpio_direction_output_init(struct gpio_chip *= gc, + unsigned int gpio, int val, struct gpio_rpmsg_data *msg) +{ + struct imx_rpmsg_gpio_port *port =3D gpiochip_get_data(gc); + + msg->header.cate =3D IMX_RPMSG_GPIO; + msg->header.major =3D IMX_RMPSG_MAJOR; + msg->header.minor =3D IMX_RMPSG_MINOR; + msg->header.type =3D GPIO_RPMSG_SETUP; + msg->header.cmd =3D GPIO_RPMSG_OUTPUT_INIT; + msg->pin_idx =3D gpio; + msg->port_idx =3D port->idx; + msg->out.value =3D val; +} + +static int imx_rpmsg_gpio_set(struct gpio_chip *gc, unsigned int gpio, int= val) +{ + struct imx_rpmsg_gpio_port *port =3D gpiochip_get_data(gc); + struct gpio_rpmsg_data *msg =3D NULL; + int ret; + + mutex_lock(&port->info.lock); + + msg =3D gpio_get_pin_msg(port, gpio); + imx_rpmsg_gpio_direction_output_init(gc, gpio, val, msg); + ret =3D gpio_send_message(port, msg, true); + + mutex_unlock(&port->info.lock); + + return ret; +} + +static int imx_rpmsg_gpio_direction_output(struct gpio_chip *gc, + unsigned int gpio, int val) +{ + struct imx_rpmsg_gpio_port *port =3D gpiochip_get_data(gc); + struct gpio_rpmsg_data *msg =3D NULL; + int ret; + + mutex_lock(&port->info.lock); + + msg =3D gpio_get_pin_msg(port, gpio); + imx_rpmsg_gpio_direction_output_init(gc, gpio, val, msg); + ret =3D gpio_send_message(port, msg, true); + + mutex_unlock(&port->info.lock); + + return ret; +} + +static int imx_rpmsg_irq_set_type(struct irq_data *d, u32 type) +{ + struct imx_rpmsg_gpio_port *port =3D irq_data_get_irq_chip_data(d); + u32 gpio_idx =3D d->hwirq; + int edge =3D 0; + int ret =3D 0; + + switch (type) { + case IRQ_TYPE_EDGE_RISING: + edge =3D GPIO_RPMSG_TRI_RISING; + break; + case IRQ_TYPE_EDGE_FALLING: + edge =3D GPIO_RPMSG_TRI_FALLING; + break; + case IRQ_TYPE_EDGE_BOTH: + edge =3D GPIO_RPMSG_TRI_BOTH_EDGE; + break; + case IRQ_TYPE_LEVEL_LOW: + edge =3D GPIO_RPMSG_TRI_LOW_LEVEL; + break; + case IRQ_TYPE_LEVEL_HIGH: + edge =3D GPIO_RPMSG_TRI_HIGH_LEVEL; + break; + default: + ret =3D -EINVAL; + break; + } + + port->gpio_pins[gpio_idx].irq_type =3D edge; + + return ret; +} + +static int imx_rpmsg_irq_set_wake(struct irq_data *d, u32 enable) +{ + struct imx_rpmsg_gpio_port *port =3D irq_data_get_irq_chip_data(d); + u32 gpio_idx =3D d->hwirq; + + port->gpio_pins[gpio_idx].irq_wake_enable =3D enable; + + return 0; +} + +/* + * This function will be called at: + * - one interrupt setup. + * - the end of one interrupt happened + * The gpio over rpmsg driver will not write the real register, so save + * all infos before this function and then send all infos to M core in this + * step. + */ +static void imx_rpmsg_unmask_irq(struct irq_data *d) +{ + struct imx_rpmsg_gpio_port *port =3D irq_data_get_irq_chip_data(d); + u32 gpio_idx =3D d->hwirq; + + port->gpio_pins[gpio_idx].irq_unmask =3D 1; +} + +static void imx_rpmsg_mask_irq(struct irq_data *d) +{ + struct imx_rpmsg_gpio_port *port =3D irq_data_get_irq_chip_data(d); + u32 gpio_idx =3D d->hwirq; + /* + * No need to implement the callback at A core side. + * M core will mask interrupt after a interrupt occurred, and then + * sends a notify to A core. + * After A core dealt with the notify, A core will send a rpmsg to + * M core to unmask this interrupt again. + */ + port->gpio_pins[gpio_idx].irq_mask =3D 1; +} + +static void imx_rpmsg_irq_shutdown(struct irq_data *d) +{ + struct imx_rpmsg_gpio_port *port =3D irq_data_get_irq_chip_data(d); + u32 gpio_idx =3D d->hwirq; + + port->gpio_pins[gpio_idx].irq_shutdown =3D 1; +} + +static void imx_rpmsg_irq_bus_lock(struct irq_data *d) +{ + struct imx_rpmsg_gpio_port *port =3D irq_data_get_irq_chip_data(d); + + mutex_lock(&port->info.lock); +} + +static void imx_rpmsg_irq_bus_sync_unlock(struct irq_data *d) +{ + struct imx_rpmsg_gpio_port *port =3D irq_data_get_irq_chip_data(d); + struct gpio_rpmsg_data *msg =3D NULL; + u32 gpio_idx =3D d->hwirq; + + if (port =3D=3D NULL) { + mutex_unlock(&port->info.lock); + return; + } + + /* + * For mask irq, do nothing here. + * M core will mask interrupt after a interrupt occurred, and then + * sends a notify to A core. + * After A core dealt with the notify, A core will send a rpmsg to + * M core to unmask this interrupt again. + */ + + if (port->gpio_pins[gpio_idx].irq_mask && !port->gpio_pins[gpio_idx].irq_= unmask) { + port->gpio_pins[gpio_idx].irq_mask =3D 0; + mutex_unlock(&port->info.lock); + return; + } + + msg =3D gpio_get_pin_msg(port, gpio_idx); + msg->header.cate =3D IMX_RPMSG_GPIO; + msg->header.major =3D IMX_RMPSG_MAJOR; + msg->header.minor =3D IMX_RMPSG_MINOR; + msg->header.type =3D GPIO_RPMSG_SETUP; + msg->header.cmd =3D GPIO_RPMSG_INPUT_INIT; + msg->pin_idx =3D gpio_idx; + msg->port_idx =3D port->idx; + + if (port->gpio_pins[gpio_idx].irq_shutdown) { + msg->out.event =3D GPIO_RPMSG_TRI_IGNORE; + msg->in.wakeup =3D 0; + port->gpio_pins[gpio_idx].irq_shutdown =3D 0; + } else { + /* if not set irq type, then use low level as trigger type */ + msg->out.event =3D port->gpio_pins[gpio_idx].irq_type; + if (!msg->out.event) + msg->out.event =3D GPIO_RPMSG_TRI_LOW_LEVEL; + if (port->gpio_pins[gpio_idx].irq_unmask) { + msg->in.wakeup =3D 0; + port->gpio_pins[gpio_idx].irq_unmask =3D 0; + } else /* irq set wake */ + msg->in.wakeup =3D port->gpio_pins[gpio_idx].irq_wake_enable; + } + + gpio_send_message(port, msg, false); + mutex_unlock(&port->info.lock); +} + +static struct irq_chip imx_rpmsg_irq_chip =3D { + .irq_mask =3D imx_rpmsg_mask_irq, + .irq_unmask =3D imx_rpmsg_unmask_irq, + .irq_set_wake =3D imx_rpmsg_irq_set_wake, + .irq_set_type =3D imx_rpmsg_irq_set_type, + .irq_shutdown =3D imx_rpmsg_irq_shutdown, + .irq_bus_lock =3D imx_rpmsg_irq_bus_lock, + .irq_bus_sync_unlock =3D imx_rpmsg_irq_bus_sync_unlock, +}; + +static int imx_rpmsg_gpio_callback(struct rpmsg_device *rpdev, + void *data, int len, void *priv, u32 src) +{ + struct gpio_rpmsg_data *msg =3D (struct gpio_rpmsg_data *)data; + unsigned long flags; + struct imx_rpmsg_gpio_port *port; + struct imx_rpmsg_driver_data *drvdata; + + drvdata =3D dev_get_drvdata(&rpdev->dev); + if (msg) + port =3D drvdata->channel_devices[msg->port_idx]; + if (!port) + return -ENODEV; + + if (msg->header.type =3D=3D GPIO_RPMSG_REPLY) { + port->info.reply_msg =3D msg; + complete(&port->info.cmd_complete); + } else if (msg->header.type =3D=3D GPIO_RPMSG_NOTIFY) { + port->info.notify_msg =3D msg; + local_irq_save(flags); + generic_handle_domain_irq(port->domain, msg->pin_idx); + local_irq_restore(flags); + } else + dev_err(&rpdev->dev, "wrong command type!\n"); + + return 0; +} + +static int imx_rpmsg_gpio_to_irq(struct gpio_chip *gc, unsigned int gpio) +{ + struct imx_rpmsg_gpio_port *port =3D gpiochip_get_data(gc); + int irq; + + irq =3D irq_find_mapping(port->domain, gpio); + if (irq > 0) { + irq_set_chip_data(irq, port); + irq_set_chip_and_handler(irq, &port->chip, handle_level_irq); + } + + return irq; +} + +static void imx_rpmsg_gpio_remove_action(void *data) +{ + struct imx_rpmsg_gpio_port *port =3D data; + + irq_domain_remove(port->domain); + port->info.port_store[port->idx] =3D 0; +} + +static int imx_rpmsg_gpio_probe(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + struct imx_rpmsg_driver_data *pltdata =3D dev->platform_data; + struct device_node *np =3D dev->of_node; + struct imx_rpmsg_gpio_port *port; + struct gpio_chip *gc; + int irq_base; + int ret; + + if (!pltdata) + return -EPROBE_DEFER; + + port =3D devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL); + if (!port) + return -ENOMEM; + + ret =3D of_property_read_u32(np, "reg", &port->idx); + if (ret) + return ret; + + if (port->idx > MAX_DEV_PER_CHANNEL) + return -EINVAL; + + mutex_init(&port->info.lock); + init_completion(&port->info.cmd_complete); + port->info.rpdev =3D pltdata->rpdev; + port->info.port_store =3D (struct imx_rpmsg_gpio_port **)pltdata->channel= _devices; + port->info.port_store[port->idx] =3D port; + if (!pltdata->rx_callback) + pltdata->rx_callback =3D imx_rpmsg_gpio_callback; + + gc =3D &port->gc; + gc->parent =3D &pltdata->rpdev->dev; + gc->label =3D devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s-gpio%d", + pltdata->rproc_name, port->idx); + gc->ngpio =3D IMX_RPMSG_GPIO_PER_PORT; + gc->base =3D -1; + + gc->to_irq =3D imx_rpmsg_gpio_to_irq; + gc->direction_input =3D imx_rpmsg_gpio_direction_input; + gc->direction_output =3D imx_rpmsg_gpio_direction_output; + gc->get =3D imx_rpmsg_gpio_get; + gc->set =3D imx_rpmsg_gpio_set; + + platform_set_drvdata(pdev, port); + ret =3D devm_gpiochip_add_data(dev, gc, port); + if (ret < 0) + return ret; + + devm_add_action_or_reset(&pdev->dev, imx_rpmsg_gpio_remove_action, port); + + /* create an irq domain */ + port->chip =3D imx_rpmsg_irq_chip; + port->chip.name =3D devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s-gpio%d", + pltdata->rproc_name, port->idx); + port->dev =3D &pdev->dev; + + irq_base =3D devm_irq_alloc_descs(&pdev->dev, -1, 0, IMX_RPMSG_GPIO_PER_P= ORT, + numa_node_id()); + if (irq_base < 0) { + dev_err(&pdev->dev, "Failed to alloc irq_descs\n"); + return irq_base; + } + + port->domain =3D irq_domain_create_legacy(of_node_to_fwnode(np), + IMX_RPMSG_GPIO_PER_PORT, + irq_base, 0, + &irq_domain_simple_ops, port); + if (!port->domain) { + dev_err(&pdev->dev, "Failed to allocate IRQ domain\n"); + return -EINVAL; + } + + return 0; +} + +static const struct of_device_id imx_rpmsg_gpio_dt_ids[] =3D { + { .compatible =3D "fsl,imx-rpmsg-gpio" }, + { /* sentinel */ } +}; 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charset="utf-8" Add the RPMSG bus node along with its GPIO subnodes to the device tree. Enable remote device communication and GPIO control via RPMSG on the i.MX platform. Signed-off-by: Shenwei Wang --- arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 27 ++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/d= ts/freescale/imx8ulp.dtsi index 13b01f3aa2a4..6ab1c12a3bc1 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -191,6 +191,33 @@ scmi_sensor: protocol@15 { cm33: remoteproc-cm33 { compatible =3D "fsl,imx8ulp-cm33"; status =3D "disabled"; + + rpmsg { + rpmsg-io-channel { + #address-cells =3D <1>; + #size-cells =3D <0>; + + rpmsg_gpioa: gpio@0 { + compatible =3D "fsl,imx-rpmsg-gpio"; + reg =3D <0>; + gpio-controller; + #gpio-cells =3D <2>; + #interrupt-cells =3D <2>; + interrupt-controller; + interrupt-parent =3D <&rpmsg_gpioa>; + }; + + rpmsg_gpiob: gpio@1 { + compatible =3D "fsl,imx-rpmsg-gpio"; + reg =3D <1>; + gpio-controller; + #gpio-cells =3D <2>; + #interrupt-cells =3D <2>; + interrupt-controller; + interrupt-parent =3D <&rpmsg_gpiob>; + }; + }; + }; }; =20 soc: soc@0 { --=20 2.43.0