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Mon, 18 Aug 2025 07:20:41 -0700 (PDT) Received: from hyd-csg-thor2-h1-server2.dhcp.broadcom.net ([192.19.203.250]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2446d578aa4sm81947835ad.153.2025.08.18.07.20.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Aug 2025 07:20:40 -0700 (PDT) From: Bhargava Marreddy To: davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, andrew+netdev@lunn.ch, horms@kernel.org Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, michael.chan@broadcom.com, pavan.chebbi@broadcom.com, vsrama-krishna.nemani@broadcom.com, Bhargava Marreddy , Vikas Gupta , Rajashekar Hudumula Subject: [v2, net-next 1/9] bng_en: Add initial support for RX and TX rings Date: Mon, 18 Aug 2025 19:47:08 +0000 Message-ID: <20250818194716.15229-2-bhargava.marreddy@broadcom.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20250818194716.15229-1-bhargava.marreddy@broadcom.com> References: <20250818194716.15229-1-bhargava.marreddy@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Allocate data structures to support RX, AGG, and TX rings. While data structures for RX/AGG rings are allocated, initialise the page pool accordingly. Signed-off-by: Bhargava Marreddy Reviewed-by: Vikas Gupta Reviewed-by: Rajashekar Hudumula --- drivers/net/ethernet/broadcom/Kconfig | 1 + drivers/net/ethernet/broadcom/bnge/bnge.h | 1 + .../net/ethernet/broadcom/bnge/bnge_netdev.c | 343 +++++++++++++++++- .../net/ethernet/broadcom/bnge/bnge_netdev.h | 90 ++++- .../net/ethernet/broadcom/bnge/bnge_rmem.c | 58 +++ .../net/ethernet/broadcom/bnge/bnge_rmem.h | 12 + 6 files changed, 502 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/broadcom/Kconfig b/drivers/net/ethernet/b= roadcom/Kconfig index 0fc10e6c690..9fdef874f5c 100644 --- a/drivers/net/ethernet/broadcom/Kconfig +++ b/drivers/net/ethernet/broadcom/Kconfig @@ -257,6 +257,7 @@ config BNGE tristate "Broadcom Ethernet device support" depends on PCI select NET_DEVLINK + select PAGE_POOL help This driver supports Broadcom 50/100/200/400/800 gigabit Ethernet cards. The module will be called bng_en. To compile this driver as a module, diff --git a/drivers/net/ethernet/broadcom/bnge/bnge.h b/drivers/net/ethern= et/broadcom/bnge/bnge.h index 6fb3683b6b0..03e55b931f7 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge.h @@ -129,6 +129,7 @@ struct bnge_dev { =20 unsigned long state; #define BNGE_STATE_DRV_REGISTERED 0 +#define BNGE_STATE_OPEN 1 =20 u64 fw_cap; =20 diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c b/drivers/net= /ethernet/broadcom/bnge/bnge_netdev.c index 02254934f3d..9fbb1c385fe 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c +++ b/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c @@ -14,10 +14,331 @@ #include #include #include +#include =20 #include "bnge.h" #include "bnge_hwrm_lib.h" #include "bnge_ethtool.h" +#include "bnge_rmem.h" + +#define BNGE_RING_TO_TC_OFF(bd, tx) \ + ((tx) % (bd)->tx_nr_rings_per_tc) + +#define BNGE_RING_TO_TC(bd, tx) \ + ((tx) / (bd)->tx_nr_rings_per_tc) + +static bool bnge_separate_head_pool(struct bnge_rx_ring_info *rxr) +{ + return rxr->need_head_pool || PAGE_SIZE > BNGE_RX_PAGE_SIZE; +} + +static void bnge_free_rx_rings(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int i; + + if (!bn->rx_ring) + return; + + for (i =3D 0; i < bd->rx_nr_rings; i++) { + struct bnge_rx_ring_info *rxr =3D &bn->rx_ring[i]; + struct bnge_ring_struct *ring; + + page_pool_destroy(rxr->page_pool); + if (bnge_separate_head_pool(rxr)) + page_pool_destroy(rxr->head_pool); + rxr->page_pool =3D rxr->head_pool =3D NULL; + + kfree(rxr->rx_agg_bmap); + rxr->rx_agg_bmap =3D NULL; + + ring =3D &rxr->rx_ring_struct; + bnge_free_ring(bd, &ring->ring_mem); + + ring =3D &rxr->rx_agg_ring_struct; + bnge_free_ring(bd, &ring->ring_mem); + } +} + +static int bnge_alloc_rx_page_pool(struct bnge_net *bn, + struct bnge_rx_ring_info *rxr, + int numa_node) +{ + const unsigned int agg_size_fac =3D PAGE_SIZE / BNGE_RX_PAGE_SIZE; + const unsigned int rx_size_fac =3D PAGE_SIZE / SZ_4K; + struct page_pool_params pp =3D { 0 }; + struct bnge_dev *bd =3D bn->bd; + struct page_pool *pool; + + pp.pool_size =3D bn->rx_agg_ring_size / agg_size_fac; + pp.nid =3D numa_node; + pp.napi =3D &rxr->bnapi->napi; + pp.netdev =3D bn->netdev; + pp.dev =3D bd->dev; + pp.dma_dir =3D bn->rx_dir; + pp.max_len =3D PAGE_SIZE; + pp.flags =3D PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV | + PP_FLAG_ALLOW_UNREADABLE_NETMEM; + pp.queue_idx =3D rxr->bnapi->index; + + pool =3D page_pool_create(&pp); + if (IS_ERR(pool)) + return PTR_ERR(pool); + rxr->page_pool =3D pool; + + rxr->need_head_pool =3D page_pool_is_unreadable(pool); + if (bnge_separate_head_pool(rxr)) { + pp.pool_size =3D min(bn->rx_ring_size / rx_size_fac, 1024); + pp.flags =3D PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV; + pool =3D page_pool_create(&pp); + if (IS_ERR(pool)) + goto err_destroy_pp; + } + rxr->head_pool =3D pool; + + return 0; + +err_destroy_pp: + page_pool_destroy(rxr->page_pool); + rxr->page_pool =3D NULL; + return PTR_ERR(pool); +} + +static int bnge_alloc_rx_agg_bmap(struct bnge_net *bn, + struct bnge_rx_ring_info *rxr) +{ + u16 mem_size; + + rxr->rx_agg_bmap_size =3D bn->rx_agg_ring_mask + 1; + mem_size =3D rxr->rx_agg_bmap_size / 8; + rxr->rx_agg_bmap =3D kzalloc(mem_size, GFP_KERNEL); + if (!rxr->rx_agg_bmap) + return -ENOMEM; + + return 0; +} + +static int bnge_alloc_rx_rings(struct bnge_net *bn) +{ + int i, rc =3D 0, agg_rings =3D 0, cpu; + struct bnge_dev *bd =3D bn->bd; + + if (!bn->rx_ring) + return -ENOMEM; + + if (bnge_is_agg_reqd(bd)) + agg_rings =3D 1; + + for (i =3D 0; i < bd->rx_nr_rings; i++) { + struct bnge_rx_ring_info *rxr =3D &bn->rx_ring[i]; + struct bnge_ring_struct *ring; + int cpu_node; + + ring =3D &rxr->rx_ring_struct; + + cpu =3D cpumask_local_spread(i, dev_to_node(bd->dev)); + cpu_node =3D cpu_to_node(cpu); + netdev_dbg(bn->netdev, "Allocating page pool for rx_ring[%d] on numa_nod= e: %d\n", + i, cpu_node); + rc =3D bnge_alloc_rx_page_pool(bn, rxr, cpu_node); + if (rc) + return rc; + + rc =3D bnge_alloc_ring(bd, &ring->ring_mem); + if (rc) + return rc; + + ring->grp_idx =3D i; + if (agg_rings) { + ring =3D &rxr->rx_agg_ring_struct; + rc =3D bnge_alloc_ring(bd, &ring->ring_mem); + if (rc) + return rc; + + ring->grp_idx =3D i; + rc =3D bnge_alloc_rx_agg_bmap(bn, rxr); + if (rc) + return rc; + } + } + + return rc; +} + +static void bnge_free_tx_rings(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int i; + + if (!bn->tx_ring) + return; + + for (i =3D 0; i < bd->tx_nr_rings; i++) { + struct bnge_tx_ring_info *txr =3D &bn->tx_ring[i]; + struct bnge_ring_struct *ring; + + ring =3D &txr->tx_ring_struct; + + bnge_free_ring(bd, &ring->ring_mem); + } +} + +static int bnge_alloc_tx_rings(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int i, j, rc; + + for (i =3D 0, j =3D 0; i < bd->tx_nr_rings; i++) { + struct bnge_tx_ring_info *txr =3D &bn->tx_ring[i]; + struct bnge_ring_struct *ring; + u8 qidx; + + ring =3D &txr->tx_ring_struct; + + rc =3D bnge_alloc_ring(bd, &ring->ring_mem); + if (rc) + return rc; + + ring->grp_idx =3D txr->bnapi->index; + qidx =3D bd->tc_to_qidx[j]; + ring->queue_id =3D bd->q_info[qidx].queue_id; + if (BNGE_RING_TO_TC_OFF(bd, i) =3D=3D (bd->tx_nr_rings_per_tc - 1)) + j++; + } + + return 0; +} + +static void bnge_free_core(struct bnge_net *bn) +{ + bnge_free_tx_rings(bn); + bnge_free_rx_rings(bn); + kfree(bn->tx_ring_map); + bn->tx_ring_map =3D NULL; + kfree(bn->tx_ring); + bn->tx_ring =3D NULL; + kfree(bn->rx_ring); + bn->rx_ring =3D NULL; + kfree(bn->bnapi); + bn->bnapi =3D NULL; +} + +static int bnge_alloc_core(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int i, j, size, arr_size; + int rc =3D -ENOMEM; + void *bnapi; + + arr_size =3D L1_CACHE_ALIGN(sizeof(struct bnge_napi *) * + bd->nq_nr_rings); + size =3D L1_CACHE_ALIGN(sizeof(struct bnge_napi)); + bnapi =3D kzalloc(arr_size + size * bd->nq_nr_rings, GFP_KERNEL); + if (!bnapi) + return rc; + + bn->bnapi =3D bnapi; + bnapi +=3D arr_size; + for (i =3D 0; i < bd->nq_nr_rings; i++, bnapi +=3D size) { + struct bnge_nq_ring_info *nqr; + + bn->bnapi[i] =3D bnapi; + bn->bnapi[i]->index =3D i; + bn->bnapi[i]->bn =3D bn; + nqr =3D &bn->bnapi[i]->nq_ring; + nqr->ring_struct.ring_mem.flags =3D BNGE_RMEM_RING_PTE_FLAG; + } + + bn->rx_ring =3D kcalloc(bd->rx_nr_rings, + sizeof(struct bnge_rx_ring_info), + GFP_KERNEL); + if (!bn->rx_ring) + goto err_free_core; + + for (i =3D 0; i < bd->rx_nr_rings; i++) { + struct bnge_rx_ring_info *rxr =3D &bn->rx_ring[i]; + + rxr->rx_ring_struct.ring_mem.flags =3D + BNGE_RMEM_RING_PTE_FLAG; + rxr->rx_agg_ring_struct.ring_mem.flags =3D + BNGE_RMEM_RING_PTE_FLAG; + rxr->bnapi =3D bn->bnapi[i]; + bn->bnapi[i]->rx_ring =3D &bn->rx_ring[i]; + } + + bn->tx_ring =3D kcalloc(bd->tx_nr_rings, + sizeof(struct bnge_tx_ring_info), + GFP_KERNEL); + if (!bn->tx_ring) + goto err_free_core; + + bn->tx_ring_map =3D kcalloc(bd->tx_nr_rings, sizeof(u16), + GFP_KERNEL); + + if (!bn->tx_ring_map) + goto err_free_core; + + if (bd->flags & BNGE_EN_SHARED_CHNL) + j =3D 0; + else + j =3D bd->rx_nr_rings; + + for (i =3D 0; i < bd->tx_nr_rings; i++) { + struct bnge_tx_ring_info *txr =3D &bn->tx_ring[i]; + struct bnge_napi *bnapi2; + int k; + + txr->tx_ring_struct.ring_mem.flags =3D BNGE_RMEM_RING_PTE_FLAG; + bn->tx_ring_map[i] =3D i; + k =3D j + BNGE_RING_TO_TC_OFF(bd, i); + + bnapi2 =3D bn->bnapi[k]; + txr->txq_index =3D i; + txr->tx_napi_idx =3D + BNGE_RING_TO_TC(bd, txr->txq_index); + bnapi2->tx_ring[txr->tx_napi_idx] =3D txr; + txr->bnapi =3D bnapi2; + } + + bnge_init_ring_struct(bn); + + rc =3D bnge_alloc_rx_rings(bn); + if (rc) + goto err_free_core; + + rc =3D bnge_alloc_tx_rings(bn); + if (rc) + goto err_free_core; + + return 0; + +err_free_core: + bnge_free_core(bn); + return rc; +} + +static int bnge_open_core(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int rc; + + netif_carrier_off(bn->netdev); + + rc =3D bnge_reserve_rings(bd); + if (rc) { + netdev_err(bn->netdev, "bnge_reserve_rings err: %d\n", rc); + return rc; + } + + rc =3D bnge_alloc_core(bn); + if (rc) { + netdev_err(bn->netdev, "bnge_alloc_core err: %d\n", rc); + return rc; + } + + set_bit(BNGE_STATE_OPEN, &bd->state); + return 0; +} =20 static netdev_tx_t bnge_start_xmit(struct sk_buff *skb, struct net_device = *dev) { @@ -28,11 +349,30 @@ static netdev_tx_t bnge_start_xmit(struct sk_buff *skb= , struct net_device *dev) =20 static int bnge_open(struct net_device *dev) { - return 0; + struct bnge_net *bn =3D netdev_priv(dev); + int rc; + + rc =3D bnge_open_core(bn); + if (rc) + netdev_err(dev, "bnge_open_core err: %d\n", rc); + + return rc; +} + +static void bnge_close_core(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + + clear_bit(BNGE_STATE_OPEN, &bd->state); + bnge_free_core(bn); } =20 static int bnge_close(struct net_device *dev) { + struct bnge_net *bn =3D netdev_priv(dev); + + bnge_close_core(bn); + return 0; } =20 @@ -238,6 +578,7 @@ int bnge_netdev_alloc(struct bnge_dev *bd, int max_irqs) =20 bn->rx_ring_size =3D BNGE_DEFAULT_RX_RING_SIZE; bn->tx_ring_size =3D BNGE_DEFAULT_TX_RING_SIZE; + bn->rx_dir =3D DMA_FROM_DEVICE; =20 bnge_set_tpa_flags(bd); bnge_set_ring_params(bd); diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h b/drivers/net= /ethernet/broadcom/bnge/bnge_netdev.h index a650d71a58d..b78b5e6d3ed 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h @@ -113,8 +113,7 @@ struct bnge_sw_rx_bd { }; =20 struct bnge_sw_rx_agg_bd { - struct page *page; - unsigned int offset; + netmem_ref netmem; dma_addr_t mapping; }; =20 @@ -164,6 +163,14 @@ struct bnge_net { struct hlist_head l2_fltr_hash_tbl[BNGE_L2_FLTR_HASH_SIZE]; u32 hash_seed; u64 toeplitz_prefix; + + struct bnge_napi **bnapi; + + struct bnge_rx_ring_info *rx_ring; + struct bnge_tx_ring_info *tx_ring; + + u16 *tx_ring_map; + enum dma_data_direction rx_dir; }; =20 #define BNGE_DEFAULT_RX_RING_SIZE 511 @@ -203,4 +210,83 @@ void bnge_set_ring_params(struct bnge_dev *bd); #define BNGE_MAX_RX_JUM_DESC_CNT (RX_DESC_CNT * MAX_RX_AGG_PAGES - 1) #define BNGE_MAX_TX_DESC_CNT (TX_DESC_CNT * MAX_TX_PAGES - 1) =20 +#define BNGE_MAX_TXR_PER_NAPI 8 + +#define bnge_for_each_napi_tx(iter, bnapi, txr) \ + for (iter =3D 0, txr =3D (bnapi)->tx_ring[0]; txr; \ + txr =3D (iter < BNGE_MAX_TXR_PER_NAPI - 1) ? \ + (bnapi)->tx_ring[++iter] : NULL) + +struct bnge_cp_ring_info { + struct bnge_napi *bnapi; + dma_addr_t *desc_mapping; + struct tx_cmp **desc_ring; + struct bnge_ring_struct ring_struct; +}; + +struct bnge_nq_ring_info { + struct bnge_napi *bnapi; + dma_addr_t *desc_mapping; + struct nqe_cn **desc_ring; + struct bnge_ring_struct ring_struct; +}; + +struct bnge_rx_ring_info { + struct bnge_napi *bnapi; + struct bnge_cp_ring_info *rx_cpr; + u16 rx_prod; + u16 rx_agg_prod; + u16 rx_sw_agg_prod; + u16 rx_next_cons; + + struct rx_bd *rx_desc_ring[MAX_RX_PAGES]; + struct bnge_sw_rx_bd *rx_buf_ring; + + struct rx_bd *rx_agg_desc_ring[MAX_RX_AGG_PAGES]; + struct bnge_sw_rx_agg_bd *rx_agg_buf_ring; + + unsigned long *rx_agg_bmap; + u16 rx_agg_bmap_size; + + dma_addr_t rx_desc_mapping[MAX_RX_PAGES]; + dma_addr_t rx_agg_desc_mapping[MAX_RX_AGG_PAGES]; + + struct bnge_ring_struct rx_ring_struct; + struct bnge_ring_struct rx_agg_ring_struct; + struct page_pool *page_pool; + struct page_pool *head_pool; + bool need_head_pool; +}; + +struct bnge_tx_ring_info { + struct bnge_napi *bnapi; + struct bnge_cp_ring_info *tx_cpr; + u16 tx_prod; + u16 tx_cons; + u16 tx_hw_cons; + u16 txq_index; + u8 tx_napi_idx; + u8 kick_pending; + + struct tx_bd *tx_desc_ring[MAX_TX_PAGES]; + struct bnge_sw_tx_bd *tx_buf_ring; + + dma_addr_t tx_desc_mapping[MAX_TX_PAGES]; + + u32 dev_state; +#define BNGE_DEV_STATE_CLOSING 0x1 + + struct bnge_ring_struct tx_ring_struct; +}; + +struct bnge_napi { + struct napi_struct napi; + struct bnge_net *bn; + int index; + + struct bnge_nq_ring_info nq_ring; + struct bnge_rx_ring_info *rx_ring; + struct bnge_tx_ring_info *tx_ring[BNGE_MAX_TXR_PER_NAPI]; +}; + #endif /* _BNGE_NETDEV_H_ */ diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_rmem.c b/drivers/net/e= thernet/broadcom/bnge/bnge_rmem.c index 52ada65943a..e0c16ed6286 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_rmem.c +++ b/drivers/net/ethernet/broadcom/bnge/bnge_rmem.c @@ -436,3 +436,61 @@ int bnge_alloc_ctx_mem(struct bnge_dev *bd) =20 return 0; } + +void bnge_init_ring_struct(struct bnge_net *bn) +{ + struct bnge_dev *bd =3D bn->bd; + int i, j; + + for (i =3D 0; i < bd->nq_nr_rings; i++) { + struct bnge_napi *bnapi =3D bn->bnapi[i]; + struct bnge_ring_mem_info *rmem; + struct bnge_nq_ring_info *nqr; + struct bnge_rx_ring_info *rxr; + struct bnge_tx_ring_info *txr; + struct bnge_ring_struct *ring; + + nqr =3D &bnapi->nq_ring; + ring =3D &nqr->ring_struct; + rmem =3D &ring->ring_mem; + rmem->nr_pages =3D bn->cp_nr_pages; + rmem->page_size =3D HW_CMPD_RING_SIZE; + rmem->pg_arr =3D (void **)nqr->desc_ring; + rmem->dma_arr =3D nqr->desc_mapping; + rmem->vmem_size =3D 0; + + rxr =3D bnapi->rx_ring; + if (!rxr) + goto skip_rx; + + ring =3D &rxr->rx_ring_struct; + rmem =3D &ring->ring_mem; + rmem->nr_pages =3D bn->rx_nr_pages; + rmem->page_size =3D HW_RXBD_RING_SIZE; + rmem->pg_arr =3D (void **)rxr->rx_desc_ring; + rmem->dma_arr =3D rxr->rx_desc_mapping; + rmem->vmem_size =3D SW_RXBD_RING_SIZE * bn->rx_nr_pages; + rmem->vmem =3D (void **)&rxr->rx_buf_ring; + + ring =3D &rxr->rx_agg_ring_struct; + rmem =3D &ring->ring_mem; + rmem->nr_pages =3D bn->rx_agg_nr_pages; + rmem->page_size =3D HW_RXBD_RING_SIZE; + rmem->pg_arr =3D (void **)rxr->rx_agg_desc_ring; + rmem->dma_arr =3D rxr->rx_agg_desc_mapping; + rmem->vmem_size =3D SW_RXBD_AGG_RING_SIZE * bn->rx_agg_nr_pages; + rmem->vmem =3D (void **)&rxr->rx_agg_buf_ring; + +skip_rx: + bnge_for_each_napi_tx(j, bnapi, txr) { + ring =3D &txr->tx_ring_struct; + rmem =3D &ring->ring_mem; + rmem->nr_pages =3D bn->tx_nr_pages; + rmem->page_size =3D HW_TXBD_RING_SIZE; + rmem->pg_arr =3D (void **)txr->tx_desc_ring; + rmem->dma_arr =3D txr->tx_desc_mapping; + rmem->vmem_size =3D SW_TXBD_RING_SIZE * bn->tx_nr_pages; + rmem->vmem =3D (void **)&txr->tx_buf_ring; + } + } +} diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_rmem.h b/drivers/net/e= thernet/broadcom/bnge/bnge_rmem.h index 300f1d8268e..162a66c7983 100644 --- a/drivers/net/ethernet/broadcom/bnge/bnge_rmem.h +++ b/drivers/net/ethernet/broadcom/bnge/bnge_rmem.h @@ -6,6 +6,7 @@ =20 struct bnge_ctx_mem_type; struct bnge_dev; +struct bnge_net; =20 #define PTU_PTE_VALID 0x1UL #define PTU_PTE_LAST 0x2UL @@ -180,9 +181,20 @@ struct bnge_ctx_mem_info { struct bnge_ctx_mem_type ctx_arr[BNGE_CTX_V2_MAX]; }; =20 +struct bnge_ring_struct { + struct bnge_ring_mem_info ring_mem; + + union { + u16 grp_idx; + u16 map_idx; /* Used by NQs */ + }; + u8 queue_id; +}; + int bnge_alloc_ring(struct bnge_dev *bd, struct bnge_ring_mem_info *rmem); void bnge_free_ring(struct bnge_dev *bd, struct bnge_ring_mem_info *rmem); int bnge_alloc_ctx_mem(struct bnge_dev *bd); void bnge_free_ctx_mem(struct bnge_dev *bd); +void bnge_init_ring_struct(struct bnge_net *bn); =20 #endif /* _BNGE_RMEM_H_ */ --=20 2.47.3