From nobody Sat Oct 4 08:08:46 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 932553451A7 for ; Mon, 18 Aug 2025 19:03:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755543815; cv=none; b=mZkRL0hzSzmTzXzw6LMymQdTfHEOhDeyLG/BG3iT6pu3n1L7nEohCpOhAG/0wtrtiUfQSGNTDn4kob13/RhYtniNRmTFCykXWVPxoNs95ExpNoHE32RaNfWcdHu9QufC5jIypgJSS6S3G7KBUrggWdo9cbmbS3987O9oJ5NJtac= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755543815; c=relaxed/simple; bh=KY/5N+bWJucd8CA8IBpc7G9EJJypnH8ub4mLKiGO3pU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=f36fgtkv8kSw896DcouDCt2ag69ODPYw15VhxrLTdWQVLSAJsnzKd6T3lfbDfe5nu2vzNKb6djZgfu221kjjWcJ/YufmzsZawTL3+vxmcrPgQHovUjYg0dJRULxHXVsVs+Q0Caw7T9t1yKf5DVunvMz8ZTi/CsnIhPLnSCOz6FM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=CNwlWiXF; arc=none smtp.client-ip=192.198.163.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="CNwlWiXF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1755543814; x=1787079814; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=KY/5N+bWJucd8CA8IBpc7G9EJJypnH8ub4mLKiGO3pU=; b=CNwlWiXFfPENKwOh4hEyfDtuNMmjie85s6hppECqGrX2wExk4BeJ9m1n dBpcNI3tT0NtEZLYAoZE8Ihk7z/kbggvTOryk7YWP6PyRAHukZjvaSi8E pRoG7ySLN+s2xWoAlAM+EDHsdpr0cZTHvsGvft4G9vVy/VOrzsy0Y493G WZJJtCvq/sOtRhYfKXcff5ba/xBuhvVPMEVnsrj63L8g3yocD7zksNZsE Lbga5YDBs0jaLMsCnInusqqzH/EM0kplsxQkL1FgdGt6bE2ZOFgW+xjpQ 4+pVWcW2gu1QvYk6xYZolDIRQXeuglrb41eo+r9QtnQ2z11/Vpk9JRp1r g==; X-CSE-ConnectionGUID: mI8mF31PQg+jGlhCchFozA== X-CSE-MsgGUID: /fGaGybkS3CULLsQdI3FdA== X-IronPort-AV: E=McAfee;i="6800,10657,11526"; a="69151586" X-IronPort-AV: E=Sophos;i="6.17,300,1747724400"; d="scan'208";a="69151586" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Aug 2025 12:03:31 -0700 X-CSE-ConnectionGUID: B97bswzxRl6mgxHeFfw1dQ== X-CSE-MsgGUID: 2va1DEReQrO52M24lvh4uQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.17,300,1747724400"; d="scan'208";a="171890589" Received: from sohilmeh.sc.intel.com ([172.25.103.65]) by orviesa003.jf.intel.com with ESMTP; 18 Aug 2025 12:03:30 -0700 From: Sohil Mehta To: Dave Hansen , x86@kernel.org Cc: Borislav Petkov , Thomas Gleixner , Ingo Molnar , "H . Peter Anvin" , Peter Zijlstra , Josh Poimboeuf , Pawan Gupta , Dave Hansen , Nikolay Borisov , Alex Murray , Andrew Cooper , Sohil Mehta , linux-kernel@vger.kernel.org, stable@kernel.org Subject: [PATCH 1/2] x86/microcode/intel: Refresh the revisions that determine old_microcode Date: Mon, 18 Aug 2025 12:01:36 -0700 Message-ID: <20250818190137.3525414-2-sohil.mehta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250818190137.3525414-1-sohil.mehta@intel.com> References: <20250818190137.3525414-1-sohil.mehta@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Update the minimum expected revisions of Intel microcode based on the microcode-20250512 (May 2025) release. Cc: # v6.15+ Signed-off-by: Sohil Mehta --- .../kernel/cpu/microcode/intel-ucode-defs.h | 86 +++++++++++-------- 1 file changed, 48 insertions(+), 38 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/intel-ucode-defs.h b/arch/x86/ke= rnel/cpu/microcode/intel-ucode-defs.h index cb6e601701ab..2d48e6593540 100644 --- a/arch/x86/kernel/cpu/microcode/intel-ucode-defs.h +++ b/arch/x86/kernel/cpu/microcode/intel-ucode-defs.h @@ -67,9 +67,8 @@ { .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x55, .steppings =3D 0x0008, .driver_data =3D 0x= 1000191 }, { .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x55, .steppings =3D 0x0010, .driver_data =3D 0x= 2007006 }, { .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x55, .steppings =3D 0x0020, .driver_data =3D 0x= 3000010 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x55, .steppings =3D 0x0040, .driver_data =3D 0x= 4003605 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x55, .steppings =3D 0x0080, .driver_data =3D 0x= 5003707 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x55, .steppings =3D 0x0800, .driver_data =3D 0x= 7002904 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x55, .steppings =3D 0x0080, .driver_data =3D 0x= 5003901 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x55, .steppings =3D 0x0800, .driver_data =3D 0x= 7002b01 }, { .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x56, .steppings =3D 0x0004, .driver_data =3D 0x= 1c }, { .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x56, .steppings =3D 0x0008, .driver_data =3D 0x= 700001c }, { .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x56, .steppings =3D 0x0010, .driver_data =3D 0x= f00001a }, @@ -81,51 +80,62 @@ { .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x5f, .steppings =3D 0x0002, .driver_data =3D 0x= 3e }, { .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x66, .steppings =3D 0x0008, .driver_data =3D 0x= 2a }, { .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x6a, .steppings =3D 0x0020, .driver_data =3D 0x= c0002f0 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x6a, .steppings =3D 0x0040, .driver_data =3D 0x= d0003e7 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x6c, .steppings =3D 0x0002, .driver_data =3D 0x= 10002b0 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x6a, .steppings =3D 0x0040, .driver_data =3D 0x= d000404 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x6c, .steppings =3D 0x0002, .driver_data =3D 0x= 10002d0 }, { .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x7a, .steppings =3D 0x0002, .driver_data =3D 0x= 42 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x7a, .steppings =3D 0x0100, .driver_data =3D 0x= 24 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x7e, .steppings =3D 0x0020, .driver_data =3D 0x= c6 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x7a, .steppings =3D 0x0100, .driver_data =3D 0x= 26 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x7e, .steppings =3D 0x0020, .driver_data =3D 0x= ca }, { .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8a, .steppings =3D 0x0002, .driver_data =3D 0x= 33 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8c, .steppings =3D 0x0002, .driver_data =3D 0x= b8 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8c, .steppings =3D 0x0004, .driver_data =3D 0x= 38 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8d, .steppings =3D 0x0002, .driver_data =3D 0x= 52 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8c, .steppings =3D 0x0002, .driver_data =3D 0x= bc }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8c, .steppings =3D 0x0004, .driver_data =3D 0x= 3c }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8d, .steppings =3D 0x0002, .driver_data =3D 0x= 56 }, { .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8e, .steppings =3D 0x0200, .driver_data =3D 0x= f6 }, { .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8e, .steppings =3D 0x0400, .driver_data =3D 0x= f6 }, { .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8e, .steppings =3D 0x0800, .driver_data =3D 0x= f6 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8e, .steppings =3D 0x1000, .driver_data =3D 0x= fc }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8f, .steppings =3D 0x0100, .driver_data =3D 0x= 2c000390 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8f, .steppings =3D 0x0080, .driver_data =3D 0x= 2b000603 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8f, .steppings =3D 0x0040, .driver_data =3D 0x= 2c000390 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8f, .steppings =3D 0x0020, .driver_data =3D 0x= 2c000390 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8f, .steppings =3D 0x0010, .driver_data =3D 0x= 2c000390 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8e, .steppings =3D 0x1000, .driver_data =3D 0x= 100 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8f, .steppings =3D 0x0010, .driver_data =3D 0x= 2c0003f7 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8f, .steppings =3D 0x0020, .driver_data =3D 0x= 2c0003f7 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8f, .steppings =3D 0x0040, .driver_data =3D 0x= 2c0003f7 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8f, .steppings =3D 0x0080, .driver_data =3D 0x= 2b000639 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8f, .steppings =3D 0x0100, .driver_data =3D 0x= 2c0003f7 }, { .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x96, .steppings =3D 0x0002, .driver_data =3D 0x= 1a }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x97, .steppings =3D 0x0004, .driver_data =3D 0x= 37 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x97, .steppings =3D 0x0020, .driver_data =3D 0x= 37 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xbf, .steppings =3D 0x0004, .driver_data =3D 0x= 37 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xbf, .steppings =3D 0x0020, .driver_data =3D 0x= 37 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x9a, .steppings =3D 0x0008, .driver_data =3D 0x= 435 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x9a, .steppings =3D 0x0010, .driver_data =3D 0x= 435 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x97, .steppings =3D 0x0004, .driver_data =3D 0x= 3a }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x97, .steppings =3D 0x0020, .driver_data =3D 0x= 3a }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x9a, .steppings =3D 0x0008, .driver_data =3D 0x= 437 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x9a, .steppings =3D 0x0010, .driver_data =3D 0x= 437 }, { .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x9c, .steppings =3D 0x0001, .driver_data =3D 0x= 24000026 }, { .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x9e, .steppings =3D 0x0200, .driver_data =3D 0x= f8 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x9e, .steppings =3D 0x0400, .driver_data =3D 0x= f8 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x9e, .steppings =3D 0x0400, .driver_data =3D 0x= fa }, { .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x9e, .steppings =3D 0x0800, .driver_data =3D 0x= f6 }, { .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x9e, .steppings =3D 0x1000, .driver_data =3D 0x= f8 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x9e, .steppings =3D 0x2000, .driver_data =3D 0x= 100 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xa5, .steppings =3D 0x0004, .driver_data =3D 0x= fc }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xa5, .steppings =3D 0x0008, .driver_data =3D 0x= fc }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xa5, .steppings =3D 0x0020, .driver_data =3D 0x= fc }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xa6, .steppings =3D 0x0001, .driver_data =3D 0x= fe }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xa6, .steppings =3D 0x0002, .driver_data =3D 0x= fc }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xa7, .steppings =3D 0x0002, .driver_data =3D 0x= 62 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xaa, .steppings =3D 0x0010, .driver_data =3D 0x= 20 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xb7, .steppings =3D 0x0002, .driver_data =3D 0x= 12b }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xba, .steppings =3D 0x0004, .driver_data =3D 0x= 4123 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xba, .steppings =3D 0x0008, .driver_data =3D 0x= 4123 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xba, .steppings =3D 0x0100, .driver_data =3D 0x= 4123 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xbe, .steppings =3D 0x0001, .driver_data =3D 0x= 1a }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xcf, .steppings =3D 0x0004, .driver_data =3D 0x= 21000283 }, -{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xcf, .steppings =3D 0x0002, .driver_data =3D 0x= 21000283 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x9e, .steppings =3D 0x2000, .driver_data =3D 0x= 104 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xa5, .steppings =3D 0x0004, .driver_data =3D 0x= 100 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xa5, .steppings =3D 0x0008, .driver_data =3D 0x= 100 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xa5, .steppings =3D 0x0020, .driver_data =3D 0x= 100 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xa6, .steppings =3D 0x0001, .driver_data =3D 0x= 102 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xa6, .steppings =3D 0x0002, .driver_data =3D 0x= 100 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xa7, .steppings =3D 0x0002, .driver_data =3D 0x= 64 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xaa, .steppings =3D 0x0010, .driver_data =3D 0x= 24 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xad, .steppings =3D 0x0002, .driver_data =3D 0x= a0000d1 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xaf, .steppings =3D 0x0008, .driver_data =3D 0x= 3000341 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xb5, .steppings =3D 0x0001, .driver_data =3D 0x= a }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xb7, .steppings =3D 0x0002, .driver_data =3D 0x= 12f }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xb7, .steppings =3D 0x0010, .driver_data =3D 0x= 12f }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xba, .steppings =3D 0x0004, .driver_data =3D 0x= 4128 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xba, .steppings =3D 0x0008, .driver_data =3D 0x= 4128 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xba, .steppings =3D 0x0100, .driver_data =3D 0x= 4128 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xbd, .steppings =3D 0x0002, .driver_data =3D 0x= 11f }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xbe, .steppings =3D 0x0001, .driver_data =3D 0x= 1d }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xbf, .steppings =3D 0x0004, .driver_data =3D 0x= 3a }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xbf, .steppings =3D 0x0020, .driver_data =3D 0x= 3a }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xbf, .steppings =3D 0x0040, .driver_data =3D 0x= 3a }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xbf, .steppings =3D 0x0080, .driver_data =3D 0x= 3a }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xc5, .steppings =3D 0x0004, .driver_data =3D 0x= 118 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xc6, .steppings =3D 0x0004, .driver_data =3D 0x= 118 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xc6, .steppings =3D 0x0010, .driver_data =3D 0x= 118 }, +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D 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([172.25.103.65]) by orviesa003.jf.intel.com with ESMTP; 18 Aug 2025 12:03:31 -0700 From: Sohil Mehta To: Dave Hansen , x86@kernel.org Cc: Borislav Petkov , Thomas Gleixner , Ingo Molnar , "H . Peter Anvin" , Peter Zijlstra , Josh Poimboeuf , Pawan Gupta , Dave Hansen , Nikolay Borisov , Alex Murray , Andrew Cooper , Sohil Mehta , linux-kernel@vger.kernel.org Subject: [PATCH 2/2] scripts/x86: Add a script to update minimum Intel ucode revisions Date: Mon, 18 Aug 2025 12:01:37 -0700 Message-ID: <20250818190137.3525414-3-sohil.mehta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250818190137.3525414-1-sohil.mehta@intel.com> References: <20250818190137.3525414-1-sohil.mehta@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The kernel keeps a table of the minimum expected microcode revisions for Intel CPUs at intel-ucode-defs.h. Systems with microcode older those are marked with X86_BUG_OLD_MICROCODE. For more details, see Documentation/admin-guide/hw-vuln/old_microcode.rst. Add a simple script to keep the header file up-to-date based on released microcode updates. Originally-by: Dave Hansen Signed-off-by: Sohil Mehta --- MAINTAINERS | 1 + scripts/update-intel-ucode-defs.py | 134 +++++++++++++++++++++++++++++ 2 files changed, 135 insertions(+) create mode 100755 scripts/update-intel-ucode-defs.py diff --git a/MAINTAINERS b/MAINTAINERS index daf520a13bdf..a819559ec672 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -27260,6 +27260,7 @@ S: Maintained F: Documentation/admin-guide/hw-vuln/ F: arch/x86/include/asm/nospec-branch.h F: arch/x86/kernel/cpu/bugs.c +F: scripts/update-intel-ucode-defs.py =20 X86 MCE INFRASTRUCTURE M: Tony Luck diff --git a/scripts/update-intel-ucode-defs.py b/scripts/update-intel-ucod= e-defs.py new file mode 100755 index 000000000000..b8248f023cce --- /dev/null +++ b/scripts/update-intel-ucode-defs.py @@ -0,0 +1,134 @@ +#!/usr/bin/python3 +# SPDX-License-Identifier: GPL-2.0 +import argparse +import re +import shutil +import subprocess +import sys +import os + +script =3D os.path.relpath(__file__) + +DESCRIPTION =3D f""" +For Intel CPUs, update the microcode revisions that determine +X86_BUG_OLD_MICROCODE. + +The script takes the Intel microcode files as input and uses the +iucode-tool to extract the revision information. It formats the output +and writes it to intel-ucode-defs.h which holds the minimum expected +revision for each family-model-stepping. + +A typical usage is to get the desired release of the Intel Microcode +Update Package at: +https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files.git + +And run: + ./{script} -u /path/to/microcode/files + +Note: The microcode revisions are usually updated shortly after a new +microcode package is released, allowing a reasonable time for systems to +get the update. +""" + +# Get the path to the microcode header defines +script_path =3D os.path.abspath(sys.argv[0]) +linux_root =3D os.path.dirname(os.path.dirname(script_path)) +ucode_hdr =3D os.path.join(linux_root, 'arch/x86/kernel/cpu/microcode/inte= l-ucode-defs.h') + +parser =3D argparse.ArgumentParser(description=3DDESCRIPTION, + formatter_class=3Dargparse.RawDescription= HelpFormatter) +parser.add_argument('-u','--ucode_path', required=3DTrue, + help=3D'Path to the microcode files') +parser.add_argument('-o','--output', dest=3D'header', default=3Ducode_hdr, + help=3D'The microcode header file to be updated (defau= lt: intel-ucode-defs.h)') + +args =3D parser.parse_args() + +# Process the microcode files using iucode-tool +if shutil.which("iucode-tool") is None: + print("Error: iucode-tool not found, please install it") + sys.exit(1) + +cmd =3D ['iucode-tool', '--list-all' ] +cmd.append(args.ucode_path) + +process =3D subprocess.Popen(cmd, stdout=3Dsubprocess.PIPE, universal_newl= ines=3DTrue) +process.wait() +if process.returncode !=3D 0: + print("Error: iucode-tool ran into an error, exiting") + sys.exit(1) + +# Functions to extract family, model, and stepping +def bits(val, bottom, top): + mask =3D (1 << (top + 1 - bottom)) - 1 + mask =3D mask << bottom + return (val & mask) >> bottom + +def family(sig): + if bits(sig, 8, 11) =3D=3D 0xf: + return bits(sig, 8, 11) + bits(sig, 20, 27) + return bits(sig, 8, 11) + +def model(sig): + return bits(sig, 4, 7) | (bits(sig, 16, 19) << 4) + +def step(sig): + return bits(sig, 0, 3) + +# Parse the output of iucode-tool +siglist =3D [] +for line in process.stdout: + if line.find(" sig ") =3D=3D -1: + continue + sig =3D re.search('sig (0x[0-9a-fA-F]+)', line).group(1) + rev =3D re.search('rev (0x[0-9a-fA-F]+)', line).group(1) + sig =3D int(sig, 16) + rev =3D int(rev, 16) + debug_rev =3D bits(rev, 31, 31) + if debug_rev !=3D 0: + print("Error: Debug ucode file found, exiting") + sys.exit(1); + + sigrev =3D {} + sigrev['sig'] =3D sig + sigrev['rev'] =3D rev + siglist =3D siglist + [ sigrev ] + +# Remove duplicates, if any +sigdict =3D {} +for sr in siglist: + existing =3D sigdict.get(sr['sig']) + if existing !=3D None: + # If the existing one is newer, just move on: + if existing['rev'] > sr['rev']: + continue + sigdict[sr['sig']] =3D sr + +# Prepare and sort the microcode entries +ucode_entries =3D [] +for sig in sigdict: + rev =3D sigdict[sig] + ucode_entries.append({ + 'family': family(sig), + 'model': model(sig), + 'steppings': 1 << step(sig), + 'rev': rev['rev'], + 'sig': sig + }) + +if not ucode_entries: + print("Error: No valid microcode files found, exiting") + sys.exit(1) + +ucode_entries.sort(key=3Dlambda x: (x['family'], x['model'], x['steppings'= ])) + +# Update the microcode header file +header_path =3D args.header +if not os.path.exists(header_path): + print(f"Error: '{header_path}' does not exist, use the '-o' option to = specify a file to update") + sys.exit(1) + +with open(header_path, "w") as f: + for entry in ucode_entries: + f.write("{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86= _VENDOR_INTEL, .family =3D 0x%x, .model =3D 0x%02x, .steppings =3D 0x%04x,= .driver_data =3D 0x%x },\n" % + (entry['family'], entry['model'], entry['steppings'], entr= y['rev'])) --=20 2.43.0