From nobody Sat Oct 4 11:11:50 2025 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 045A2342C9E; Mon, 18 Aug 2025 16:29:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755534589; cv=none; b=qPfimnHNUg/RGSLXASBVo7AhIHlRZvgkvE7S/ZLVDCkx5bMj7bXG6/gitV07rINstsaaVmuFoRmyJHFkpL2lO1jm4N2ddTq+A+3yERzrOgw962dV7zYGTklks+vdJVQi2COxvKkhqTLqPknmDmoljrlzvLZ9TgVs3FxB36TFWqE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755534589; c=relaxed/simple; bh=syrJozNxqnnFPDFMqCg7jOzWztrpq9ITizOV/kix5+w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tGARqmusuDZe9Dsl/g+f9jxcF8JMdwew4+KDivcAdDFVS2uIJ63Q0jMJRVUUIA54hkHxmM+r/s7r9ccl4c0lJf/PplMM7qqAjLdDoxIE/oJeNWQOeJ34pvUN+n/GU2XxiK1P05+Cd9FjMETPsobHztaw41sbgq5L9Or5NCYvXto= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: c5Z12sA3SAqo4sSCem8pHA== X-CSE-MsgGUID: 8Rzlmlh8TwiMwWJOK25AZg== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 19 Aug 2025 01:29:46 +0900 Received: from ubuntu.adwin.renesas.com (unknown [10.24.0.173]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 8BFFF4016EE7; Tue, 19 Aug 2025 01:29:39 +0900 (JST) From: John Madieu To: geert+renesas@glider.be, magnus.damm@gmail.com, mturquette@baylibre.com, sboyd@kernel.org, rafael@kernel.org, daniel.lezcano@linaro.org, rui.zhang@intel.com, lukasz.luba@arm.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, p.zabel@pengutronix.de, catalin.marinas@arm.com, will@kernel.org Cc: john.madieu@gmail.com, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, biju.das.jz@bp.renesas.com, linux-arm-kernel@lists.infradead.org, John Madieu Subject: [PATCH v7 4/6] arm64: dts: renesas: r9a09g047: Add #address-cells property in sys node Date: Mon, 18 Aug 2025 18:28:50 +0200 Message-ID: <20250818162859.9661-5-john.madieu.xa@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250818162859.9661-1-john.madieu.xa@bp.renesas.com> References: <20250818162859.9661-1-john.madieu.xa@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" A couple of registers of the system controller (sys) are shared with the TSU device. Add #address-cells property to sys node to allow proper parsing a access to these registers from the TSU driver. Signed-off-by: John Madieu --- Changes: - v7: new patch: as sys specifier has changed for TSU node, add this patch to specify #address-cells. arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi b/arch/arm64/boot/d= ts/renesas/r9a09g047.dtsi index e4fac7e0d764..7cbba492edd5 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi @@ -278,6 +278,7 @@ sys: system-controller@10430000 { reg =3D <0 0x10430000 0 0x10000>; clocks =3D <&cpg CPG_CORE R9A09G047_SYS_0_PCLK>; resets =3D <&cpg 0x30>; + #address-cells =3D <1>; }; =20 xspi: spi@11030000 { --=20 2.25.1