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Silva" CC: , , , , , Jorge Marques X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755517878; l=3381; i=jorge.marques@analog.com; s=20250303; h=from:subject:message-id; bh=UdrsGhVMwqo5cE3+96QM8wAbjr6GF1F6npOZOYlDM6Q=; b=fJRuu/5V8WB2EauWIffsKvS5gFX7UKVuGsk3HK6u5HSvoLx4uhPxK1tsN9PBzkB4Er176ziwY azJbNO9gIAQCAawZesWn4Q6D7ABz7vjF0OJgE87DPz9BKK7pz+QyUzr X-Developer-Key: i=jorge.marques@analog.com; a=ed25519; pk=NUR1IZZMH0Da3QbJ2tBSznSPVfRpuoWdhBzKGSpAdbg= X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODE3MDA0NiBTYWx0ZWRfXwXeu2vXtvpvP ksNRfJRdzSX4hSxctMNrq0qnMN9y2S0prQ+1EJpwqBKIamE0iPc2REnyJ1OWzrUuEiMjmbUgjyc 9Gg4xwSbzlo5eoLPN4NTaHk6jP3ekZQKLl7tFMf28d0zDRsjF43AYrP+ouksHrgozyifIf5qJBk FVT5slSUEVXcCRgKNH9A4scPhJNGy15oFRsnq8KedwYsk2xbxUPvyN9aZySdbpUeXiJyOreAzPh 6uLKKOb2ZJKcIGfnbMgTRD6qOeliFzjCFkiLGtAJvyjqUpsWG8OKipVQZuQb3SqlTDTzxUiZTIh 6UcZihgOs0D3k7+vuxw75jfymi2DnOBhojfeA+3foKX+0ngu4j6ZH/b3yXDIdFoLfXHBa4Lp5R/ 46EpMCq0 X-Authority-Analysis: v=2.4 cv=WvwrMcfv c=1 sm=1 tr=0 ts=68a313c9 cx=c_pps a=3WNzaoukacrqR9RwcOSAdA==:117 a=3WNzaoukacrqR9RwcOSAdA==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=gEfo2CItAAAA:8 a=wI1k2SEZAAAA:8 a=gAnH3GRIAAAA:8 a=Br2UW1UjAAAA:8 a=cxqr8dddGolBAesk1vsA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=sptkURWiP4Gy88Gu7hUp:22 a=6HWbV-4b7c7AdzY24d_u:22 a=WmXOPjafLNExVIMTj843:22 X-Proofpoint-GUID: d5g9qbpUxXvILPLKjmYEPr4aqXSd_Zfo X-Proofpoint-ORIG-GUID: d5g9qbpUxXvILPLKjmYEPr4aqXSd_Zfo X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-18_05,2025-08-14_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 priorityscore=1501 phishscore=0 suspectscore=0 malwarescore=0 clxscore=1015 bulkscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508170046 Add bindings doc for ADI I3C Controller IP core, a FPGA synthesizable IP core that implements the MIPI I3C Basic controller specification. The IP Core is versioned following Semantic Versioning 2.0.0 and ADI's open-source HDL guidelines for devicetree bindings and drivers. Signed-off-by: Jorge Marques Reviewed-by: Conor Dooley --- .../devicetree/bindings/i3c/adi,i3c-master.yaml | 72 ++++++++++++++++++= ++++ MAINTAINERS | 5 ++ 2 files changed, 77 insertions(+) diff --git a/Documentation/devicetree/bindings/i3c/adi,i3c-master.yaml b/Do= cumentation/devicetree/bindings/i3c/adi,i3c-master.yaml new file mode 100644 index 0000000000000000000000000000000000000000..fda240f9ee0c73bcbea97f775d6= e081fe0c089d9 --- /dev/null +++ b/Documentation/devicetree/bindings/i3c/adi,i3c-master.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i3c/adi,i3c-master.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices I3C Controller + +description: | + FPGA-based I3C controller designed to interface with I3C and I2C periphe= rals, + implementing a subset of the I3C-basic specification. The IP core is tes= ted + on arm, microblaze, and arm64 architectures. + + https://analogdevicesinc.github.io/hdl/library/i3c_controller + +maintainers: + - Jorge Marques + +properties: + compatible: + const: adi,i3c-master-v1 + + reg: + maxItems: 1 + + clocks: + minItems: 1 + items: + - description: The AXI interconnect clock, drives the register map. + - description: | + The secondary clock, drives the internal logic asynchronously to= the + register map. The presence of this entry states that the IP Core= was + synthesized with a second clock input, and the absence of this e= ntry + indicates a topology where a single clock input drives all the + internal logic. + + clock-names: + minItems: 1 + items: + - const: axi + - const: i3c + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + +allOf: + - $ref: i3c.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + + i3c@44a00000 { + compatible =3D "adi,i3c-master-v1"; + reg =3D <0x44a00000 0x1000>; + interrupts =3D <3 IRQ_TYPE_LEVEL_HIGH>; + clocks =3D <&clkc 15>, <&clkc 15>; + clock-names =3D "axi", "i3c"; + #address-cells =3D <3>; + #size-cells =3D <0>; + + /* I3C and I2C devices */ + }; diff --git a/MAINTAINERS b/MAINTAINERS index 35ed8498ab1e9b92b4bce5db9bb64004d80e4b1a..faa50535b514037ddf97309874e= c64aac2013cb6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11452,6 +11452,11 @@ S: Maintained F: Documentation/devicetree/bindings/i3c/aspeed,ast2600-i3c.yaml F: drivers/i3c/master/ast2600-i3c-master.c =20 +I3C DRIVER FOR ANALOG DEVICES I3C CONTROLLER IP +M: Jorge Marques +S: Maintained +F: Documentation/devicetree/bindings/i3c/adi,i3c-master.yaml + I3C DRIVER FOR CADENCE I3C MASTER IP M: Przemys=C5=82aw Gaj S: Maintained --=20 2.49.0