From nobody Sat Oct 4 12:46:58 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 6A0C7433AD for ; Fri, 15 Aug 2025 13:42:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755265363; cv=none; b=HmNGPR4/JN6uN22w3rYbfr1ewRYq3FOGP8IjIhkAe9KmxG1SzAEpcIYHIBSJSVFTGrSnYNVSrASwmJ/K3bAE3zxkR28yl6b/3fYekPE9jx4n7osbLjoWGnPdA4IbhD/N7LkOUA5CKrfTpxAbkwlrhMih64bSe7T9sL/tJ1WQhZ4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755265363; c=relaxed/simple; bh=mU03G21BAZ9Dqp7pIfH6AFdrfgfYqK8sLcAIBUgQxiY=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=kNuwNwGWB25aIw3EH8chXvSRw4UM0XfpuFNmQbjPrBbNGbN0SNnUNtZhBjX3dhWEk0dLoMuXPgoYKl7dSruFJDuTHm33mBtvy2Uy3t3oxS9boh7R8xppmMY4yBSrUKU99J7bD1tiads+sQJkHu79xGy4CffqFLlbGtONdMj3wWw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 737D91691; Fri, 15 Aug 2025 06:42:32 -0700 (PDT) Received: from e122027.cambridge.arm.com (e122027.cambridge.arm.com [10.1.29.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3F5EC3F5A1; Fri, 15 Aug 2025 06:42:39 -0700 (PDT) From: Steven Price To: Boris Brezillon , Liviu Dudau , Daniel Stone Cc: Steven Price , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Karunika Choo , Chia-I Wu Subject: [PATCH v2] drm/panthor: Simplify mmu_hw_do_operation_locked Date: Fri, 15 Aug 2025 14:42:24 +0100 Message-ID: <20250815134226.57703-1-steven.price@arm.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The only callers to mmu_hw_do_operation_locked() pass an 'op' of either AS_COMAND_FLUSH_MEM or AS_COMMAND_FLUSH_PT. This means the code paths after that are dead. Removing those paths means the mmu_hw_do_flush_on_gpu_ctrl() function might has well be inlined. Simplify everything by having a switch statement for the type of 'op' (warning if we get an unexpected value) and removing the dead cases. Suggested-by: Daniel Stone Signed-off-by: Steven Price Reviewed-by: Karunika Choo --- Changes from v1: * As well as removing dead code, inline mmu_hw_do_flush_on_gpu_ctrl drivers/gpu/drm/panthor/panthor_mmu.c | 57 ++++++++++++--------------- 1 file changed, 26 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c b/drivers/gpu/drm/pantho= r/panthor_mmu.c index 367c89aca558..9d77e7c16ed2 100644 --- a/drivers/gpu/drm/panthor/panthor_mmu.c +++ b/drivers/gpu/drm/panthor/panthor_mmu.c @@ -569,15 +569,37 @@ static void lock_region(struct panthor_device *ptdev,= u32 as_nr, write_cmd(ptdev, as_nr, AS_COMMAND_LOCK); } =20 -static int mmu_hw_do_flush_on_gpu_ctrl(struct panthor_device *ptdev, int a= s_nr, - u32 op) +static int mmu_hw_do_operation_locked(struct panthor_device *ptdev, int as= _nr, + u64 iova, u64 size, u32 op) { const u32 l2_flush_op =3D CACHE_CLEAN | CACHE_INV; - u32 lsc_flush_op =3D 0; + u32 lsc_flush_op; int ret; =20 - if (op =3D=3D AS_COMMAND_FLUSH_MEM) + lockdep_assert_held(&ptdev->mmu->as.slots_lock); + + switch (op) { + case AS_COMMAND_FLUSH_MEM: lsc_flush_op =3D CACHE_CLEAN | CACHE_INV; + break; + case AS_COMMAND_FLUSH_PT: + lsc_flush_op =3D 0; + break; + default: + drm_WARN(&ptdev->base, 1, "Unexpected AS_COMMAND: %d", op); + return -EINVAL; + } + + if (as_nr < 0) + return 0; + + /* + * If the AS number is greater than zero, then we can be sure + * the device is up and running, so we don't need to explicitly + * power it up + */ + + lock_region(ptdev, as_nr, iova, size); =20 ret =3D wait_ready(ptdev, as_nr); if (ret) @@ -598,33 +620,6 @@ static int mmu_hw_do_flush_on_gpu_ctrl(struct panthor_= device *ptdev, int as_nr, return wait_ready(ptdev, as_nr); } =20 -static int mmu_hw_do_operation_locked(struct panthor_device *ptdev, int as= _nr, - u64 iova, u64 size, u32 op) -{ - lockdep_assert_held(&ptdev->mmu->as.slots_lock); - - if (as_nr < 0) - return 0; - - /* - * If the AS number is greater than zero, then we can be sure - * the device is up and running, so we don't need to explicitly - * power it up - */ - - if (op !=3D AS_COMMAND_UNLOCK) - lock_region(ptdev, as_nr, iova, size); - - if (op =3D=3D AS_COMMAND_FLUSH_MEM || op =3D=3D AS_COMMAND_FLUSH_PT) - return mmu_hw_do_flush_on_gpu_ctrl(ptdev, as_nr, op); - - /* Run the MMU operation */ - write_cmd(ptdev, as_nr, op); - - /* Wait for the flush to complete */ - return wait_ready(ptdev, as_nr); -} - static int mmu_hw_do_operation(struct panthor_vm *vm, u64 iova, u64 size, u32 op) { --=20 2.39.5