From nobody Sat Oct 4 16:21:31 2025 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7603C26CE0E; Fri, 15 Aug 2025 08:53:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247982; cv=none; b=JPd6fxuFvSSVqtXvLwYSROtdWXoQQs2c+Vxlpp2Jc7frRPRKCmRjUUs3diea/Rk0vrtQ9JUkmsp+F/1C+P736zqyLR5IgspE64lzbyqNLQTWawwjh+kFPVk89kCjvMmKgKlpSa0ghEcBXEEB8TVQfPkrkdhGciSuUNkin0bV3UQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247982; c=relaxed/simple; bh=/V7C3A4+VM4UTvsagAPVyjzzJ/WEV+EB7alGlj/8AuE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=fLTcu54h00ZL1KqQVXc2I1xX+oKNgpRNLR56JFfXEieQINOEWTzUH1snPmFOkv0TZgjFeqjxbzEO44z49b+dyuINZHjloCXKmQuyNq2qgdHrTu6A+VR32yWwJT8VWeH7pa8YZ+0Oh6Ir6eS1DPQqLAPJVl+NiMmuTkHn2jjU/dI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=r8rFxuWO; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="r8rFxuWO" X-UUID: 3c2bb83279b511f08729452bf625a8b4-20250815 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=3wKR8f8kXJgkH2pnA7QGxf0ljtbJ2KuG5jEXTwooEcE=; b=r8rFxuWOMVxTyCaLWngTeiTmAMgh6Yh7Fbu2gB6vy8UDWn8qDUHBl6Yd9Twrf5Lw/3mXDqrPVzGhe5yfgz0Dz4YwAkf8j52l13DGT/YvcjxXcSKhBAHEqZbwV9Iqku7NLShsmnQFU53KVePPbuUcoI/4M1gKGDfY0wes5RPsl0Q=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.3,REQID:0d48e4dc-6ea7-44ee-9493-bc9ece3ae7a6,IP:0,UR L:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION:r elease,TS:0 X-CID-META: VersionHash:f1326cf,CLOUDID:e88d2b7a-966c-41bd-96b5-7d0b3c22e782,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102,TC:-5,Content:0|15|50,EDM: -3,IP:nil,URL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0, AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 3c2bb83279b511f08729452bf625a8b4-20250815 Received: from mtkmbs14n2.mediatek.inc [(172.21.101.76)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 400226943; Fri, 15 Aug 2025 16:52:55 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.39; Fri, 15 Aug 2025 16:52:52 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.39 via Frontend Transport; Fri, 15 Aug 2025 16:52:51 +0800 From: Yunfei Dong To: =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , Sebastian Fricke , Nicolas Dufresne , Hans Verkuil , AngeloGioacchino Del Regno , Benjamin Gaignard , Nathan Hebert , Daniel Almeida CC: Hsin-Yi Wang , Fritz Koenig , Daniel Vetter , Steve Cho , Yunfei Dong , , , , , , Subject: [PATCH v2 07/14] media: mediatek: vcodec: define MT8196 vcodec levels. Date: Fri, 15 Aug 2025 16:52:20 +0800 Message-ID: <20250815085232.30240-8-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250815085232.30240-1-yunfei.dong@mediatek.com> References: <20250815085232.30240-1-yunfei.dong@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" The supported level and profile are not the same for different codecs and architecture. Select the correct one. Signed-off-by: Yunfei Dong --- .../mediatek/vcodec/decoder/mtk_vcodec_dec_stateless.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_= stateless.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec= _stateless.c index d873159b9b30..c1cef78471a9 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_statele= ss.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_statele= ss.c @@ -555,6 +555,7 @@ static void mtk_vcodec_dec_fill_h264_level(struct v4l2_= ctrl_config *cfg, cfg->max =3D V4L2_MPEG_VIDEO_H264_LEVEL_5_2; break; case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_H264_LEVEL_6_0; break; case MTK_VDEC_MT8183: @@ -573,6 +574,7 @@ static void mtk_vcodec_dec_fill_h264_profile(struct v4l= 2_ctrl_config *cfg, switch (ctx->dev->chip_name) { case MTK_VDEC_MT8188: case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10; break; default: @@ -589,6 +591,7 @@ static void mtk_vcodec_dec_fill_h265_level(struct v4l2_= ctrl_config *cfg, cfg->max =3D V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1; break; case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2; break; default: @@ -603,6 +606,7 @@ static void mtk_vcodec_dec_fill_h265_profile(struct v4l= 2_ctrl_config *cfg, switch (ctx->dev->chip_name) { case MTK_VDEC_MT8188: case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10; break; default: @@ -620,6 +624,7 @@ static void mtk_vcodec_dec_fill_vp9_level(struct v4l2_c= trl_config *cfg, cfg->max =3D V4L2_MPEG_VIDEO_VP9_LEVEL_5_1; break; case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_VP9_LEVEL_5_2; break; case MTK_VDEC_MT8186: @@ -637,6 +642,7 @@ static void mtk_vcodec_dec_fill_vp9_profile(struct v4l2= _ctrl_config *cfg, switch (ctx->dev->chip_name) { case MTK_VDEC_MT8188: case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_VP9_PROFILE_2; break; default: --=20 2.45.2