From nobody Sat Oct 4 16:22:30 2025 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A06F42BD58C; Fri, 15 Aug 2025 08:53:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247983; cv=none; b=flY7t6LUJ/JOVFtcxo5X9G6JGJukbHja6TPTL3aYYfk+JTrJvcIk24kktCtr0ZNoEezE5JXm/pjPYKC2mZE9aBTirOW50SAd5NvPvbxJX8oL1rykJ/TiQFrdflAvfQPZROhAqRPtgWfuLd1vWnMeGFm+BvADSGCOg/p7WAX72dY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247983; c=relaxed/simple; bh=7kEHMhpTnpnKBnMZ8S7DEP43Fp0XGLTK2vi6BWANRLA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=NY9AslkSQL6vPGp4NqkoE6o3r2dWuZk1J0QJDNeoVHRbaUyPp5znSECgzoDklVFkZta5jKk02/zKsHfR1MxNl5eIPqWHTC3HvZfjyU0vHM1SVWBE9CUmXCLOtXh9jEWvZpbIkH2Yi2ZyvPnEnsN0gyPQva0LJgSDnhBCu/IsyMY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=upzZ7R5i; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="upzZ7R5i" X-UUID: 38b7943c79b511f08729452bf625a8b4-20250815 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=nHalbDQa/hnGdYiOtuXgpIyCbjpjJjMupk4uagcB2JE=; b=upzZ7R5iwKidgr9IVUcw952UJUEC5TY1OrDZvQ8SGRHOF0FgeX4IA7gRtOcrrk89w0TDqupPhQqdcD5uk/7g4bcauuSz5JKFZ/B1leNXr4UhRHOk4h0tvQvg5xbDRMlMzAbKQvkTWpouqVZcwZjOhNybJOeXHpBX+Q+L0jOGk9g=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.3,REQID:8f47fc38-e657-4135-b803-b55570eb7a06,IP:0,UR L:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION:r elease,TS:0 X-CID-META: VersionHash:f1326cf,CLOUDID:fc83416d-c2f4-47a6-876f-59a53e9ecc6e,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102,TC:-5,Content:0|15|50,EDM: -3,IP:nil,URL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0, AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 38b7943c79b511f08729452bf625a8b4-20250815 Received: from mtkmbs13n2.mediatek.inc [(172.21.101.108)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 98187962; Fri, 15 Aug 2025 16:52:49 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.39; Fri, 15 Aug 2025 16:52:47 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.39 via Frontend Transport; Fri, 15 Aug 2025 16:52:46 +0800 From: Yunfei Dong To: =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , Sebastian Fricke , Nicolas Dufresne , Hans Verkuil , AngeloGioacchino Del Regno , Benjamin Gaignard , Nathan Hebert , Daniel Almeida CC: Hsin-Yi Wang , Fritz Koenig , Daniel Vetter , Steve Cho , Yunfei Dong , , , , , , Subject: [PATCH v2 02/14] media: mediatek: vcodec: add decoder compatible to support mt8196 Date: Fri, 15 Aug 2025 16:52:15 +0800 Message-ID: <20250815085232.30240-3-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250815085232.30240-1-yunfei.dong@mediatek.com> References: <20250815085232.30240-1-yunfei.dong@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" MT8196 is lat single core architecture. Support its compatible and use `mtk_lat_sig_core_pdata` to initialize platform data. Signed-off-by: Yunfei Dong --- .../platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c | 6 ++++++ .../platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h | 1 + 2 files changed, 7 insertions(+) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_= drv.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c index 9247d92d431d..fa609343c168 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c @@ -346,6 +346,8 @@ static void mtk_vcodec_dec_get_chip_name(struct mtk_vco= dec_dec_dev *vdec_dev) vdec_dev->chip_name =3D MTK_VDEC_MT8186; else if (of_device_is_compatible(dev->of_node, "mediatek,mt8188-vcodec-de= c")) vdec_dev->chip_name =3D MTK_VDEC_MT8188; + else if (of_device_is_compatible(dev->of_node, "mediatek,mt8196-vcodec-de= c")) + vdec_dev->chip_name =3D MTK_VDEC_MT8196; else vdec_dev->chip_name =3D MTK_VDEC_INVAL; } @@ -559,6 +561,10 @@ static const struct of_device_id mtk_vcodec_match[] = =3D { .compatible =3D "mediatek,mt8188-vcodec-dec", .data =3D &mtk_lat_sig_core_pdata, }, + { + .compatible =3D "mediatek,mt8196-vcodec-dec", + .data =3D &mtk_lat_sig_core_pdata, + }, {}, }; =20 diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_= drv.h b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h index aececca7ecf8..6bdde600a167 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h @@ -27,6 +27,7 @@ enum mtk_vcodec_dec_chip_name { MTK_VDEC_MT8188 =3D 8188, MTK_VDEC_MT8192 =3D 8192, MTK_VDEC_MT8195 =3D 8195, + MTK_VDEC_MT8196 =3D 8196, }; =20 /* --=20 2.45.2