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Signed-off-by: Yunfei Dong --- .../bindings/media/mediatek,vcodec-subdev-decoder.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev= -decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-sub= dev-decoder.yaml index bf8082d87ac0..74e1d88d3056 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decode= r.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decode= r.yaml @@ -76,6 +76,7 @@ properties: - mediatek,mt8186-vcodec-dec - mediatek,mt8188-vcodec-dec - mediatek,mt8195-vcodec-dec + - mediatek,mt8196-vcodec-dec =20 reg: minItems: 1 --=20 2.45.2 From nobody Sat Oct 4 14:36:15 2025 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A06F42BD58C; Fri, 15 Aug 2025 08:53:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" MT8196 is lat single core architecture. Support its compatible and use `mtk_lat_sig_core_pdata` to initialize platform data. Signed-off-by: Yunfei Dong --- .../platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c | 6 ++++++ .../platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h | 1 + 2 files changed, 7 insertions(+) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_= drv.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c index 9247d92d431d..fa609343c168 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c @@ -346,6 +346,8 @@ static void mtk_vcodec_dec_get_chip_name(struct mtk_vco= dec_dec_dev *vdec_dev) vdec_dev->chip_name =3D MTK_VDEC_MT8186; else if (of_device_is_compatible(dev->of_node, "mediatek,mt8188-vcodec-de= c")) vdec_dev->chip_name =3D MTK_VDEC_MT8188; + else if (of_device_is_compatible(dev->of_node, "mediatek,mt8196-vcodec-de= c")) + vdec_dev->chip_name =3D MTK_VDEC_MT8196; else vdec_dev->chip_name =3D MTK_VDEC_INVAL; } @@ -559,6 +561,10 @@ static const struct of_device_id mtk_vcodec_match[] = =3D { .compatible =3D "mediatek,mt8188-vcodec-dec", .data =3D &mtk_lat_sig_core_pdata, }, + { + .compatible =3D "mediatek,mt8196-vcodec-dec", + .data =3D &mtk_lat_sig_core_pdata, + }, {}, }; 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charset="utf-8" The processor is changed from scp to vcp in mt8196 platform. Adding new firmware interface to communicate kernel with vcp for the communication method is changed. Signed-off-by: Yunfei Dong --- .../media/platform/mediatek/vcodec/Kconfig | 4 + .../platform/mediatek/vcodec/common/Makefile | 4 + .../mediatek/vcodec/common/mtk_vcodec_fw.c | 3 + .../mediatek/vcodec/common/mtk_vcodec_fw.h | 1 + .../vcodec/common/mtk_vcodec_fw_priv.h | 12 + .../vcodec/common/mtk_vcodec_fw_vcp.c | 449 ++++++++++++++++++ .../vcodec/common/mtk_vcodec_fw_vcp.h | 137 ++++++ include/linux/remoteproc/mtk_vcp_public.h | 2 +- 8 files changed, 611 insertions(+), 1 deletion(-) create mode 100644 drivers/media/platform/mediatek/vcodec/common/mtk_vcode= c_fw_vcp.c create mode 100644 drivers/media/platform/mediatek/vcodec/common/mtk_vcode= c_fw_vcp.h diff --git a/drivers/media/platform/mediatek/vcodec/Kconfig b/drivers/media= /platform/mediatek/vcodec/Kconfig index bc8292232530..d23dad5c78ce 100644 --- a/drivers/media/platform/mediatek/vcodec/Kconfig +++ b/drivers/media/platform/mediatek/vcodec/Kconfig @@ -1,4 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only +config VIDEO_MEDIATEK_VCODEC_VCP + bool + config VIDEO_MEDIATEK_VCODEC_SCP bool =20 @@ -21,6 +24,7 @@ config VIDEO_MEDIATEK_VCODEC select V4L2_MEM2MEM_DEV select VIDEO_MEDIATEK_VCODEC_VPU if VIDEO_MEDIATEK_VPU select VIDEO_MEDIATEK_VCODEC_SCP if MTK_SCP + select VIDEO_MEDIATEK_VCODEC_VCP if MTK_VCP_RPROC select V4L2_H264 select V4L2_VP9 select MEDIA_CONTROLLER diff --git a/drivers/media/platform/mediatek/vcodec/common/Makefile b/drive= rs/media/platform/mediatek/vcodec/common/Makefile index d0479914dfb3..2f68692e8c98 100644 --- a/drivers/media/platform/mediatek/vcodec/common/Makefile +++ b/drivers/media/platform/mediatek/vcodec/common/Makefile @@ -14,6 +14,10 @@ ifneq ($(CONFIG_VIDEO_MEDIATEK_VCODEC_SCP),) mtk-vcodec-common-y +=3D mtk_vcodec_fw_scp.o endif =20 +ifneq ($(CONFIG_VIDEO_MEDIATEK_VCODEC_VCP),) +mtk-vcodec-common-y +=3D mtk_vcodec_fw_vcp.o +endif + ifneq ($(CONFIG_DEBUG_FS),) obj-$(CONFIG_VIDEO_MEDIATEK_VCODEC) +=3D mtk-vcodec-dbgfs.o =20 diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.c = b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.c index 08949b08fbc6..fc547afa4ebf 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.c +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.c @@ -3,6 +3,7 @@ #include "../decoder/mtk_vcodec_dec_drv.h" #include "../encoder/mtk_vcodec_enc_drv.h" #include "mtk_vcodec_fw_priv.h" +#include "mtk_vcodec_fw_vcp.h" =20 struct mtk_vcodec_fw *mtk_vcodec_fw_select(void *priv, enum mtk_vcodec_fw_= type type, enum mtk_vcodec_fw_use fw_use) @@ -19,6 +20,8 @@ struct mtk_vcodec_fw *mtk_vcodec_fw_select(void *priv, en= um mtk_vcodec_fw_type t return mtk_vcodec_fw_vpu_init(priv, fw_use); case SCP: return mtk_vcodec_fw_scp_init(priv, fw_use); + case VCP: + return mtk_vcodec_fw_vcp_init(priv, fw_use); default: dev_err(&plat_dev->dev, "Invalid vcodec fw type"); return ERR_PTR(-EINVAL); diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.h = b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.h index 300363a40158..c1642fb09b42 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.h +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.h @@ -14,6 +14,7 @@ struct mtk_vcodec_enc_dev; enum mtk_vcodec_fw_type { VPU, SCP, + VCP, }; =20 enum mtk_vcodec_fw_use { diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_pr= iv.h b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_priv.h index 99603accd82e..0a2a9b010244 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_priv.h +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_priv.h @@ -4,6 +4,7 @@ #define _MTK_VCODEC_FW_PRIV_H_ =20 #include "mtk_vcodec_fw.h" +#include "mtk_vcodec_fw_vcp.h" =20 struct mtk_vcodec_dec_dev; struct mtk_vcodec_enc_dev; @@ -13,6 +14,7 @@ struct mtk_vcodec_fw { const struct mtk_vcodec_fw_ops *ops; struct platform_device *pdev; struct mtk_scp *scp; + struct mtk_vcp *vcp; enum mtk_vcodec_fw_use fw_use; }; =20 @@ -49,4 +51,14 @@ mtk_vcodec_fw_scp_init(void *priv, enum mtk_vcodec_fw_us= e fw_use) } #endif /* CONFIG_VIDEO_MEDIATEK_VCODEC_SCP */ =20 +#if IS_ENABLED(CONFIG_VIDEO_MEDIATEK_VCODEC_VCP) +struct mtk_vcodec_fw *mtk_vcodec_fw_vcp_init(void *priv, enum mtk_vcodec_f= w_use fw_use); +#else +static inline struct mtk_vcodec_fw * +mtk_vcodec_fw_vcp_init(void *priv, enum mtk_vcodec_fw_use fw_use) +{ + return ERR_PTR(-ENODEV); +} +#endif /* CONFIG_VIDEO_MEDIATEK_VCODEC_VCP */ + #endif /* _MTK_VCODEC_FW_PRIV_H_ */ diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vc= p.c b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.c new file mode 100644 index 000000000000..227310c116c6 --- /dev/null +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.c @@ -0,0 +1,449 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2025 MediaTek Inc. + * Author: Yunfei Dong + */ + +#include +#include +#include +#include +#include +#include + +#include "../decoder/mtk_vcodec_dec_drv.h" +#include "../decoder/vdec_ipi_msg.h" +#include "mtk_vcodec_fw_priv.h" + +#define IPI_SEND_TIMEOUT_MS 100U +#define IPI_TIMEOUT_MS 100U + +static void mtk_vcodec_vcp_ipi_lock(struct mtk_vcp *vcp, u32 ipi_id) +{ + if (WARN_ON(ipi_id >=3D VCP_IPI_MAX)) + return; + + mutex_lock(&vcp->ipi_desc[ipi_id].lock); +} + +static void mtk_vcodec_vcp_ipi_unlock(struct mtk_vcp *vcp, u32 ipi_id) +{ + if (WARN_ON(ipi_id >=3D VCP_IPI_MAX)) + return; + + mutex_unlock(&vcp->ipi_desc[ipi_id].lock); +} + +static int mtk_vcodec_vcp_notifier(struct notifier_block *nb, unsigned lon= g event, void *ptr) +{ + struct mtk_vcp *vcp =3D container_of(nb, struct mtk_vcp, vcp_notify); + + switch (event) { + case VCP_EVENT_SUSPEND: + case VCP_EVENT_STOP: + dev_dbg(&vcp->pdev->dev, "vcp notifier suspend"); + break; + case VCP_EVENT_READY: + case VCP_EVENT_RESUME: + dev_dbg(&vcp->pdev->dev, "vcp notifier ready"); + break; + } + + return NOTIFY_DONE; +} + +static void mtk_vcodec_vcp_free_msg_node(struct mtk_vcodec_fw *fw, + struct mtk_vcp_msg_node *msg_node) +{ + unsigned long flags; + + spin_lock_irqsave(&fw->vcp->msg_queue.lock, flags); + list_add(&msg_node->list, &fw->vcp->msg_queue.node_list); + spin_unlock_irqrestore(&fw->vcp->msg_queue.lock, flags); +} + +static int mtk_vcodec_vcp_ipi_register(struct mtk_vcp *vcp, u32 ipi_id, vc= p_ipi_handler_t handler, + void *priv) +{ + if (!vcp) + return -EPROBE_DEFER; + + if (WARN_ON(ipi_id >=3D VCP_IPI_MAX) || WARN_ON(!handler)) + return -EINVAL; + + mtk_vcodec_vcp_ipi_lock(vcp, ipi_id); + vcp->ipi_desc[ipi_id].handler =3D handler; + vcp->ipi_desc[ipi_id].priv =3D priv; + mtk_vcodec_vcp_ipi_unlock(vcp, ipi_id); + + return 0; +} + +static int mtk_vcodec_vcp_msg_process_thread(void *arg) +{ + struct mtk_vcodec_fw *fw =3D arg; + struct vdec_vpu_ipi_ack *msg =3D NULL; + struct mtk_vcp_share_obj *obj; + struct mtk_vcp_msg_node *msg_node; + unsigned long flags; + vcp_ipi_handler_t handler; + int ret =3D 0; + + do { + ret =3D wait_event_interruptible(fw->vcp->msg_queue.wq, + atomic_read(&fw->vcp->msg_queue.cnt) > 0); + if (ret < 0) { + dev_err(&fw->pdev->dev, "wait msg queue ack timeout %d %d\n", + ret, atomic_read(&fw->vcp->msg_queue.cnt)); + continue; + } + + spin_lock_irqsave(&fw->vcp->msg_queue.lock, flags); + msg_node =3D list_entry(fw->vcp->msg_queue.msg_list.next, + struct mtk_vcp_msg_node, list); + list_del(&msg_node->list); + atomic_dec(&fw->vcp->msg_queue.cnt); + spin_unlock_irqrestore(&fw->vcp->msg_queue.lock, flags); + + obj =3D &msg_node->ipi_data; + msg =3D (struct vdec_vpu_ipi_ack *)obj->share_buf; + + if (!msg->ap_inst_addr) { + dev_err(&fw->pdev->dev, "invalid message address\n"); + mtk_vcodec_vcp_free_msg_node(fw, msg_node); + continue; + } + + dev_dbg(&fw->pdev->dev, "msg ack id %d len %d msg_id 0x%x\n", obj->id, o= bj->len, + msg->msg_id); + + mtk_vcodec_vcp_ipi_lock(fw->vcp, obj->id); + handler =3D fw->vcp->ipi_desc[obj->id].handler; + if (!handler) { + dev_err(&fw->pdev->dev, "invalid ack ipi handler id =3D %d\n", obj->id); + mtk_vcodec_vcp_ipi_unlock(fw->vcp, obj->id); + mtk_vcodec_vcp_free_msg_node(fw, msg_node); + return -EINVAL; + } + + handler(msg, obj->len, fw->vcp->ipi_desc[obj->id].priv); + mtk_vcodec_vcp_ipi_unlock(fw->vcp, obj->id); + + fw->vcp->msg_signaled[obj->id] =3D true; + wake_up(&fw->vcp->msg_wq[obj->id]); + + mtk_vcodec_vcp_free_msg_node(fw, msg_node); + } while (!kthread_should_stop()); + + return ret; +} + +static int mtk_vcodec_vcp_msg_ack_isr(unsigned int id, void *prdata, void = *data, unsigned int len) +{ + struct mtk_vcodec_fw *fw =3D prdata; + struct mtk_vcp_msg_queue *msg_queue =3D &fw->vcp->msg_queue; + struct mtk_vcp_msg_node *msg_node; + struct vdec_vpu_ipi_ack *msg =3D NULL; + struct mtk_vcp_share_obj *obj =3D data; + unsigned long flags; + + msg =3D (struct vdec_vpu_ipi_ack *)obj->share_buf; + + spin_lock_irqsave(&msg_queue->lock, flags); + if (!list_empty(&msg_queue->node_list)) { + msg_node =3D list_entry(msg_queue->node_list.next, struct mtk_vcp_msg_no= de, list); + + memcpy(&msg_node->ipi_data, obj, sizeof(*obj)); + list_move_tail(&msg_node->list, &msg_queue->msg_list); + atomic_inc(&msg_queue->cnt); + spin_unlock_irqrestore(&msg_queue->lock, flags); + + dev_dbg(&fw->pdev->dev, "push ipi_id %x msg_id %x, msg cnt %d\n", + obj->id, msg->msg_id, atomic_read(&msg_queue->cnt)); + + wake_up(&msg_queue->wq); + } else { + spin_unlock_irqrestore(&msg_queue->lock, flags); + dev_err(&fw->pdev->dev, "no free nodes in msg queue\n"); + } + + return 0; +} + +static int mtk_vcodec_vcp_msg_ipi_send(struct mtk_vcodec_fw *fw, int id, v= oid *buf, + unsigned int len, unsigned int wait) +{ + struct mtk_vcp *vcp =3D fw->vcp; + struct mtk_vcp_device *vcp_device =3D vcp->vcp_device; + struct mutex *msg_mutex =3D &vcp->ipi_mutex; + bool *msg_signaled =3D &vcp->msg_signaled[id]; + wait_queue_head_t *msg_wq =3D &vcp->msg_wq[id]; + int ret, ipi_size, feature_id, mailbox_id, retry_cnt =3D 0; + unsigned long timeout_jiffies =3D 0; + struct mtk_vcp_share_obj obj =3D {0}; + unsigned int *data; + + if (!vcp_device) { + dev_dbg(&fw->pdev->dev, "vcp device is null\n"); + return -EINVAL; + } + + mutex_lock(msg_mutex); + feature_id =3D VDEC_FEATURE_ID; + mailbox_id =3D IPI_OUT_VDEC_1; + + timeout_jiffies =3D jiffies + msecs_to_jiffies(VCP_SYNC_TIMEOUT_MS); + while (!vcp_device->ops->vcp_is_ready(feature_id)) { + if (time_after(jiffies, timeout_jiffies)) { + vcp->ipi_id_ack[id] =3D -EINVAL; + ret =3D -EINVAL; + goto error; + } + mdelay(1); + } + + if (len > VCP_SHARE_BUF_SIZE) { + vcp->ipi_id_ack[id] =3D -EINVAL; + ret =3D -EINVAL; + goto error; + } + + obj.id =3D id; + obj.len =3D len; + memcpy(obj.share_buf, buf, len); + + ipi_size =3D ((sizeof(u32) * 2) + len + 3) / 4; + data =3D (unsigned int *)obj.share_buf; + dev_dbg(&fw->pdev->dev, "vcp send message: id %d len %d data 0x%x\n", + obj.id, obj.len, data[0]); + + ret =3D mtk_vcp_ipc_send(vcp_get_ipidev(vcp_device), mailbox_id, &obj, ip= i_size); + if (ret !=3D IPI_ACTION_DONE) { + vcp->ipi_id_ack[id] =3D -EIO; + ret =3D -EIO; + goto error; + } + +wait_ack: + /* wait for VCP's ACK */ + ret =3D wait_event_timeout(*msg_wq, *msg_signaled, msecs_to_jiffies(IPI_T= IMEOUT_MS)); + if (!ret || retry_cnt > 5) { + vcp->ipi_id_ack[id] =3D VCODEC_IPI_MSG_STATUS_FAIL; + dev_err(&fw->pdev->dev, "wait ipi ack timeout! %d %d\n", ret, vcp->ipi_i= d_ack[id]); + } else if (ret =3D=3D -ERESTARTSYS) { + dev_err(&fw->pdev->dev, "wait ipi ack err (%d)\n", vcp->ipi_id_ack[id]); + retry_cnt++; + goto wait_ack; + } else if (ret < 0) { + dev_err(&fw->pdev->dev, "wait ipi ack fail ret %d %d\n", ret, vcp->ipi_i= d_ack[id]); + vcp->ipi_id_ack[id] =3D VCODEC_IPI_MSG_STATUS_FAIL; + } + + dev_dbg(&fw->pdev->dev, "receive message: id %d len %d data 0x%x\n", + obj.id, obj.len, data[0]); + + *msg_signaled =3D false; + mutex_unlock(msg_mutex); + + return vcp->ipi_id_ack[id]; + +error: + mutex_unlock(msg_mutex); + dev_err(&fw->pdev->dev, "send msg error type:%d msg:%d > %d ret:%d\n", fw= ->type, len, + VCP_SHARE_BUF_SIZE, ret); + + return ret; +} + +static int mtk_vcodec_vcp_get_vcp_device(struct mtk_vcodec_fw *fw) +{ + struct device *dev =3D &fw->pdev->dev; + int retry =3D 0, retry_cnt =3D 10000; + phandle vcp_phandle; + + while (request_module("mtk-vcp")) { + if (++retry > retry_cnt) { + dev_err(dev, "failed to load mtk-vcp module"); + return -ENODEV; + } + msleep(1); + } + + if (of_property_read_u32(dev->of_node, "mediatek,vcp", &vcp_phandle)) { + dev_err(dev, "can't get vcp handle.\n"); + return -ENODEV; + } + + fw->vcp->vcp_device =3D mtk_vcp_get_by_phandle(vcp_phandle); + if (!fw->vcp->vcp_device) { + dev_err(dev, "get vcp device failed\n"); + return -ENODEV; + } + + return 0; +} + +static int mtk_vcodec_vcp_load_firmware(struct mtk_vcodec_fw *fw) +{ + struct mtk_vcp_device *vcp_device; + int ret, feature_id, mem_id, mailbox_id, ipi_id; + + if (fw->vcp->is_init_done) { + dev_dbg(&fw->pdev->dev, "vcp has already been initialized done.\n"); + return 0; + } + + if (mtk_vcodec_vcp_get_vcp_device(fw) < 0) { + dev_err(&fw->pdev->dev, "vcp device is null.\n"); + return -EINVAL; + } + + vcp_device =3D fw->vcp->vcp_device; + + feature_id =3D VDEC_FEATURE_ID; + mem_id =3D VDEC_MEM_ID; + mailbox_id =3D IPI_IN_VDEC_1; + ipi_id =3D VCP_IPI_LAT_DECODER; + + ret =3D mtk_vcp_mbox_ipc_register(vcp_get_ipidev(vcp_device), mailbox_id, + mtk_vcodec_vcp_msg_ack_isr, fw, &fw->vcp->share_data); + if (ret) { + dev_dbg(&fw->pdev->dev, "ipi register fail %d %d %d %d\n", ret, feature_= id, + mem_id, mailbox_id); + return -EINVAL; + } + + fw->vcp->vcp_notify.notifier_call =3D mtk_vcodec_vcp_notifier; + fw->vcp->vcp_notify.priority =3D 1; + vcp_device->ops->vcp_register_notify(feature_id, &fw->vcp->vcp_notify); + + fw->vcp->is_init_done =3D true; + + mutex_init(&fw->vcp->ipi_desc[ipi_id].lock); + mutex_init(&fw->vcp->ipi_mutex); + + kthread_run(mtk_vcodec_vcp_msg_process_thread, fw, "vcp_vdec_msq_thread"); + + fw->vcp->vsi_addr =3D vcp_device->ops->vcp_get_mem_virt(mem_id); + fw->vcp->vsi_core_addr =3D fw->vcp->vsi_addr + VCODEC_VSI_LEN; + fw->vcp->vsi_size =3D vcp_device->ops->vcp_get_mem_size(mem_id); + fw->vcp->iova_addr =3D vcp_device->ops->vcp_get_mem_iova(mem_id); + + init_waitqueue_head(&fw->vcp->msg_wq[VCP_IPI_LAT_DECODER]); + init_waitqueue_head(&fw->vcp->msg_wq[VCP_IPI_CORE_DECODER]); + + dev_dbg(&fw->pdev->dev, "vdec vcp init done =3D> va: %p size:0x%x iova:%p= .\n", + fw->vcp->vsi_addr, fw->vcp->vsi_size, &fw->vcp->iova_addr); + + return 0; +} + +static unsigned int mtk_vcodec_vcp_get_vdec_capa(struct mtk_vcodec_fw *fw) +{ + return MTK_VDEC_FORMAT_MM21 | MTK_VDEC_FORMAT_H264_SLICE | MTK_VDEC_FORMA= T_VP9_FRAME | + MTK_VDEC_FORMAT_AV1_FRAME | MTK_VDEC_FORMAT_HEVC_FRAME | + MTK_VDEC_IS_SUPPORT_10BIT | MTK_VDEC_IS_SUPPORT_EXT; +} + +static void *mtk_vcodec_vcp_dm_addr(struct mtk_vcodec_fw *fw, u32 dtcm_dme= m_addr) +{ + return NULL; +} + +static int mtk_vcodec_vcp_set_ipi_register(struct mtk_vcodec_fw *fw, int i= d, + mtk_vcodec_ipi_handler handler, + const char *name, void *priv) +{ + return mtk_vcodec_vcp_ipi_register(fw->vcp, id, handler, priv); +} + +static int mtk_vcodec_vcp_ipi_send(struct mtk_vcodec_fw *fw, int id, void = *buf, + unsigned int len, unsigned int wait) +{ + struct mtk_vcp_device *vcp_device =3D fw->vcp->vcp_device; + struct device *dev =3D &fw->pdev->dev; + int ret; + + if (!fw->vcp->vcp_device) { + dev_err(dev, "vcp device is null\n"); + return -ENODEV; + } + + ret =3D vcp_device->ops->vcp_register_feature(vcp_device, VDEC_FEATURE_ID= ); + if (ret < 0) + goto error; + + ret =3D mtk_vcodec_vcp_msg_ipi_send(fw, id, buf, len, wait); + if (ret < 0) + goto error; + + ret =3D vcp_device->ops->vcp_deregister_feature(vcp_device, VDEC_FEATURE_= ID); + if (ret < 0) + goto error; + + return ret; + +error: + dev_err(dev, "vcp ipi send fail ret:%d\n", ret); + + return ret; +} + +static void mtk_vcodec_vcp_release(struct mtk_vcodec_fw *fw) +{ +} + +static const struct mtk_vcodec_fw_ops mtk_vcodec_vcp_msg =3D { + .load_firmware =3D mtk_vcodec_vcp_load_firmware, + .get_vdec_capa =3D mtk_vcodec_vcp_get_vdec_capa, + .map_dm_addr =3D mtk_vcodec_vcp_dm_addr, + .ipi_register =3D mtk_vcodec_vcp_set_ipi_register, + .ipi_send =3D mtk_vcodec_vcp_ipi_send, + .release =3D mtk_vcodec_vcp_release, +}; + +struct mtk_vcodec_fw *mtk_vcodec_fw_vcp_init(void *priv, enum mtk_vcodec_f= w_use fw_use) +{ + struct mtk_vcp_msg_node *msg_node; + struct platform_device *plat_dev; + struct mtk_vcodec_fw *fw; + int i; + + if (fw_use =3D=3D DECODER) { + struct mtk_vcodec_dec_dev *dec_dev =3D priv; + + plat_dev =3D dec_dev->plat_dev; + } else { + pr_err("Invalid fw_use %d (use a reasonable fw id here)\n", fw_use); + return ERR_PTR(-EINVAL); + } + + fw =3D devm_kzalloc(&plat_dev->dev, sizeof(*fw), GFP_KERNEL); + if (!fw) + return ERR_PTR(-ENOMEM); + + fw->type =3D VCP; + fw->pdev =3D plat_dev; + fw->fw_use =3D fw_use; + fw->ops =3D &mtk_vcodec_vcp_msg; + fw->vcp =3D devm_kzalloc(&plat_dev->dev, sizeof(*fw->vcp), GFP_KERNEL); + if (!fw->vcp) + return ERR_PTR(-ENOMEM); + + INIT_LIST_HEAD(&fw->vcp->msg_queue.msg_list); + INIT_LIST_HEAD(&fw->vcp->msg_queue.node_list); + spin_lock_init(&fw->vcp->msg_queue.lock); + init_waitqueue_head(&fw->vcp->msg_queue.wq); + atomic_set(&fw->vcp->msg_queue.cnt, 0); + fw->vcp->pdev =3D plat_dev; + + for (i =3D 0; i < VCP_MAX_MQ_NODE_CNT; i++) { + msg_node =3D devm_kzalloc(&plat_dev->dev, sizeof(*msg_node), GFP_KERNEL); + if (!msg_node) + return ERR_PTR(-ENOMEM); + + list_add(&msg_node->list, &fw->vcp->msg_queue.node_list); + } + + return fw; +} diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vc= p.h b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.h new file mode 100644 index 000000000000..40f5481d1889 --- /dev/null +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.h @@ -0,0 +1,137 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2025 MediaTek Inc. + * Author: Yunfei Dong + */ + +#ifndef _MTK_VCODEC_FW_VCP_H_ +#define _MTK_VCODEC_FW_VCP_H_ + +typedef void (*vcp_ipi_handler_t) (void *data, unsigned int len, void *pri= v); + +#define VCP_MAX_MQ_NODE_CNT 6 +#define VCP_SHARE_BUF_SIZE 64 + +#define VCODEC_VSI_LEN (0x2000) + +/* enum mtk_vcp_ipi_index - index used to separate different hardware */ +enum mtk_vcp_ipi_index { + VCP_IPI_LAT_DECODER, + VCP_IPI_CORE_DECODER, + VCP_IPI_MAX, +}; + +/** + * struct mtk_vcp_msg_queue - process the vcp message between kernel with = vcp + * + * @msg_list: store share buffer list which from vcp to kernel + * @wq: waitqueue that can be used to wait for vcp message + * @lock: protect msg list + * @cnt: the count of share obj in msg list + * @node_list: share obj list + */ +struct mtk_vcp_msg_queue { + struct list_head msg_list; + wait_queue_head_t wq; + spinlock_t lock; + atomic_t cnt; + struct list_head node_list; +}; + +/** + * struct mtk_vcp_ipi_desc - store the ack handler + * + * @lock: protect ack handler data + * @handler: calling this handler when kernel receive ack + * @priv: private data when calling handler to process + */ +struct mtk_vcp_ipi_desc { + struct mutex lock; + vcp_ipi_handler_t handler; + void *priv; +}; + +/** + * struct mtk_vcp_share_obj - share buffer used to send data to vcp + * + * @id: message index + * @len: message size + * @share_buf: message data + */ +struct mtk_vcp_share_obj { + unsigned int id; + unsigned int len; + unsigned char share_buf[VCP_SHARE_BUF_SIZE]; +}; + +/* enum mtk_vcp_ipi_msg_status - the status when send message to vcp */ +enum mtk_vcp_ipi_msg_status { + VCODEC_IPI_MSG_STATUS_OK =3D 0, + VCODEC_IPI_MSG_STATUS_FAIL =3D -1, + VCODEC_IPI_MSG_STATUS_MAX_INST =3D -2, + VCODEC_IPI_MSG_STATUS_ILSEQ =3D -3, + VCODEC_IPI_MSG_STATUS_INVALID_ID =3D -4, + VCODEC_IPI_MSG_STATUS_DMA_FAIL =3D -5, +}; + +/** + * struct mtk_vcp_msg_node - share buffer used to send data to vcp + * + * @ipi_data: share obj data + * @list: list to store msg node + */ +struct mtk_vcp_msg_node { + struct mtk_vcp_share_obj ipi_data; + struct list_head list; +}; + +/** + * struct mtk_vcp - vcp firmware private data + * + * @is_init_done: vcp is ready to use + * + * @ipi_mutex: used to protect ipi data + * @msg_signaled: whether receive ack from vcp + * @msg_wq: wake message queue + * + * @ipi_desc: store ack handler + * @ipi_id_ack: the ack handler status + * + * @msg_queue: process vcp message + * @share_data: temp share obj data + * + * @vcp_notify: register notifier to vcp + * + * @vsi_addr: vsi virtual data address + * @vsi_core_addr: vsi core virtual data address + * @iova_addr: vsi iova address + * @vsi_size: vsi size + * + * @pdev: platform device + * @vcp_device: vcp private data + */ +struct mtk_vcp { + bool is_init_done; + + struct mutex ipi_mutex; + bool msg_signaled[VCP_IPI_MAX]; + wait_queue_head_t msg_wq[VCP_IPI_MAX]; + + struct mtk_vcp_ipi_desc ipi_desc[VCP_IPI_MAX]; + bool ipi_id_ack[VCP_IPI_MAX]; + + struct mtk_vcp_msg_queue msg_queue; + struct mtk_vcp_share_obj share_data; + + struct notifier_block vcp_notify; + + void *vsi_addr; + void *vsi_core_addr; + dma_addr_t iova_addr; + int vsi_size; + + struct platform_device *pdev; + struct mtk_vcp_device *vcp_device; +}; + +#endif diff --git a/include/linux/remoteproc/mtk_vcp_public.h b/include/linux/remo= teproc/mtk_vcp_public.h index 07b0b30ea964..0b7d1c3c28ca 100644 --- a/include/linux/remoteproc/mtk_vcp_public.h +++ b/include/linux/remoteproc/mtk_vcp_public.h @@ -10,7 +10,7 @@ #include #include =20 -#define VCP_SYNC_TIMEOUT_MS (999) +#define VCP_SYNC_TIMEOUT_MS (50) =20 /* vcp notify event */ enum VCP_NOTIFY_EVENT { --=20 2.45.2 From nobody Sat Oct 4 14:36:15 2025 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D4042571B3; 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Fri, 15 Aug 2025 16:52:51 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.39; Fri, 15 Aug 2025 16:52:49 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.39 via Frontend Transport; Fri, 15 Aug 2025 16:52:48 +0800 From: Yunfei Dong To: =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , Sebastian Fricke , Nicolas Dufresne , Hans Verkuil , AngeloGioacchino Del Regno , Benjamin Gaignard , Nathan Hebert , Daniel Almeida CC: Hsin-Yi Wang , Fritz Koenig , Daniel Vetter , Steve Cho , Yunfei Dong , , , , , , Subject: [PATCH v2 04/14] media: mediatek: vcodec: add driver to support vcp encoder Date: Fri, 15 Aug 2025 16:52:17 +0800 Message-ID: <20250815085232.30240-5-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250815085232.30240-1-yunfei.dong@mediatek.com> References: <20250815085232.30240-1-yunfei.dong@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" Encoder also need to call vcp interface to communicate with vcp, add driver to support encoder. Signed-off-by: Yunfei Dong --- .../vcodec/common/mtk_vcodec_fw_vcp.c | 40 +++++++++++++++---- .../vcodec/common/mtk_vcodec_fw_vcp.h | 1 + .../mediatek/vcodec/encoder/mtk_vcodec_enc.c | 1 - .../mediatek/vcodec/encoder/mtk_vcodec_enc.h | 2 + 4 files changed, 36 insertions(+), 8 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vc= p.c b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.c index 227310c116c6..c9e5cde40aef 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.c +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.c @@ -13,6 +13,8 @@ =20 #include "../decoder/mtk_vcodec_dec_drv.h" #include "../decoder/vdec_ipi_msg.h" +#include "../encoder/mtk_vcodec_enc.h" +#include "../encoder/mtk_vcodec_enc_drv.h" #include "mtk_vcodec_fw_priv.h" =20 #define IPI_SEND_TIMEOUT_MS 100U @@ -189,8 +191,8 @@ static int mtk_vcodec_vcp_msg_ipi_send(struct mtk_vcode= c_fw *fw, int id, void *b } =20 mutex_lock(msg_mutex); - feature_id =3D VDEC_FEATURE_ID; - mailbox_id =3D IPI_OUT_VDEC_1; + feature_id =3D (fw->fw_use =3D=3D ENCODER) ? VENC_FEATURE_ID : VDEC_FEATU= RE_ID; + mailbox_id =3D (fw->fw_use =3D=3D ENCODER) ? IPI_OUT_VENC_0 : IPI_OUT_VDE= C_1; =20 timeout_jiffies =3D jiffies + msecs_to_jiffies(VCP_SYNC_TIMEOUT_MS); while (!vcp_device->ops->vcp_is_ready(feature_id)) { @@ -300,10 +302,10 @@ static int mtk_vcodec_vcp_load_firmware(struct mtk_vc= odec_fw *fw) =20 vcp_device =3D fw->vcp->vcp_device; =20 - feature_id =3D VDEC_FEATURE_ID; - mem_id =3D VDEC_MEM_ID; - mailbox_id =3D IPI_IN_VDEC_1; - ipi_id =3D VCP_IPI_LAT_DECODER; + feature_id =3D fw->fw_use =3D=3D ENCODER ? VENC_FEATURE_ID : VDEC_FEATURE= _ID; + mem_id =3D fw->fw_use =3D=3D ENCODER ? VENC_MEM_ID : VDEC_MEM_ID; + mailbox_id =3D fw->fw_use =3D=3D ENCODER ? IPI_IN_VENC_0 : IPI_IN_VDEC_1; + ipi_id =3D fw->fw_use =3D=3D ENCODER ? VCP_IPI_ENCODER : VCP_IPI_LAT_DECO= DER; =20 ret =3D mtk_vcp_mbox_ipc_register(vcp_get_ipidev(vcp_device), mailbox_id, mtk_vcodec_vcp_msg_ack_isr, fw, &fw->vcp->share_data); @@ -322,6 +324,20 @@ static int mtk_vcodec_vcp_load_firmware(struct mtk_vco= dec_fw *fw) mutex_init(&fw->vcp->ipi_desc[ipi_id].lock); mutex_init(&fw->vcp->ipi_mutex); =20 + if (fw->fw_use =3D=3D ENCODER) { + kthread_run(mtk_vcodec_vcp_msg_process_thread, fw, "vcp_enc_msq_thread"); + + fw->vcp->vsi_addr =3D vcp_device->ops->vcp_get_mem_virt(mem_id); + fw->vcp->vsi_size =3D vcp_device->ops->vcp_get_mem_size(mem_id); + fw->vcp->iova_addr =3D vcp_device->ops->vcp_get_mem_iova(mem_id); + + dev_dbg(&fw->pdev->dev, "enc vcp init done =3D> va: %p size:0x%x iova:%p= ad.\n", + fw->vcp->vsi_addr, fw->vcp->vsi_size, &fw->vcp->iova_addr); + + init_waitqueue_head(&fw->vcp->msg_wq[VCP_IPI_ENCODER]); + return 0; + } + kthread_run(mtk_vcodec_vcp_msg_process_thread, fw, "vcp_vdec_msq_thread"); =20 fw->vcp->vsi_addr =3D vcp_device->ops->vcp_get_mem_virt(mem_id); @@ -345,6 +361,11 @@ static unsigned int mtk_vcodec_vcp_get_vdec_capa(struc= t mtk_vcodec_fw *fw) MTK_VDEC_IS_SUPPORT_10BIT | MTK_VDEC_IS_SUPPORT_EXT; } =20 +static unsigned int mtk_vcodec_vcp_get_venc_capa(struct mtk_vcodec_fw *fw) +{ + return MTK_VENC_4K_CAPABILITY_ENABLE; +} + static void *mtk_vcodec_vcp_dm_addr(struct mtk_vcodec_fw *fw, u32 dtcm_dme= m_addr) { return NULL; @@ -396,6 +417,7 @@ static void mtk_vcodec_vcp_release(struct mtk_vcodec_fw= *fw) static const struct mtk_vcodec_fw_ops mtk_vcodec_vcp_msg =3D { .load_firmware =3D mtk_vcodec_vcp_load_firmware, .get_vdec_capa =3D mtk_vcodec_vcp_get_vdec_capa, + .get_venc_capa =3D mtk_vcodec_vcp_get_venc_capa, .map_dm_addr =3D mtk_vcodec_vcp_dm_addr, .ipi_register =3D mtk_vcodec_vcp_set_ipi_register, .ipi_send =3D mtk_vcodec_vcp_ipi_send, @@ -409,7 +431,11 @@ struct mtk_vcodec_fw *mtk_vcodec_fw_vcp_init(void *pri= v, enum mtk_vcodec_fw_use struct mtk_vcodec_fw *fw; int i; =20 - if (fw_use =3D=3D DECODER) { + if (fw_use =3D=3D ENCODER) { + struct mtk_vcodec_enc_dev *enc_dev =3D priv; + + plat_dev =3D enc_dev->plat_dev; + } else if (fw_use =3D=3D DECODER) { struct mtk_vcodec_dec_dev *dec_dev =3D priv; =20 plat_dev =3D dec_dev->plat_dev; diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vc= p.h b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.h index 40f5481d1889..53080ed12c69 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.h +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.h @@ -16,6 +16,7 @@ typedef void (*vcp_ipi_handler_t) (void *data, unsigned i= nt len, void *priv); =20 /* enum mtk_vcp_ipi_index - index used to separate different hardware */ enum mtk_vcp_ipi_index { + VCP_IPI_ENCODER, VCP_IPI_LAT_DECODER, VCP_IPI_CORE_DECODER, VCP_IPI_MAX, diff --git a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.= c b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.c index a01dc25a7699..dcafb1303c29 100644 --- a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.c +++ b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.c @@ -26,7 +26,6 @@ =20 #define MTK_DEFAULT_FRAMERATE_NUM 1001 #define MTK_DEFAULT_FRAMERATE_DENOM 30000 -#define MTK_VENC_4K_CAPABILITY_ENABLE BIT(0) =20 static void mtk_venc_worker(struct work_struct *work); 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charset="utf-8" Getting ipi(inter-processor interrupt) id according to firmware type and hardware index for different architecture. Signed-off-by: Yunfei Dong --- .../platform/mediatek/vcodec/common/mtk_vcodec_fw.c | 13 +++++++++++++ .../platform/mediatek/vcodec/common/mtk_vcodec_fw.h | 1 + .../vcodec/decoder/vdec/vdec_av1_req_lat_if.c | 4 ++-- .../vcodec/decoder/vdec/vdec_h264_req_multi_if.c | 4 ++-- .../vcodec/decoder/vdec/vdec_hevc_req_multi_if.c | 4 ++-- .../mediatek/vcodec/decoder/vdec/vdec_vp8_req_if.c | 4 ++-- .../vcodec/decoder/vdec/vdec_vp9_req_lat_if.c | 4 ++-- 7 files changed, 24 insertions(+), 10 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.c = b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.c index fc547afa4ebf..4ed7639dfa30 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.c +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.c @@ -5,6 +5,19 @@ #include "mtk_vcodec_fw_priv.h" #include "mtk_vcodec_fw_vcp.h" =20 +int mtk_vcodec_fw_get_ipi(enum mtk_vcodec_fw_type type, int hw_id) +{ + switch (type) { + case SCP: + return hw_id =3D=3D MTK_VDEC_LAT0 ? SCP_IPI_VDEC_LAT : SCP_IPI_VDEC_CORE; + case VCP: + return hw_id =3D=3D MTK_VDEC_LAT0 ? VCP_IPI_LAT_DECODER : VCP_IPI_CORE_D= ECODER; + default: + return -EINVAL; + } +} +EXPORT_SYMBOL_GPL(mtk_vcodec_fw_get_ipi); + struct mtk_vcodec_fw *mtk_vcodec_fw_select(void *priv, enum mtk_vcodec_fw_= type type, enum mtk_vcodec_fw_use fw_use) { diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.h = b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.h index c1642fb09b42..142e2e87905c 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.h +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.h @@ -41,5 +41,6 @@ int mtk_vcodec_fw_ipi_register(struct mtk_vcodec_fw *fw, = int id, int mtk_vcodec_fw_ipi_send(struct mtk_vcodec_fw *fw, int id, void *buf, unsigned int len, unsigned int wait); int mtk_vcodec_fw_get_type(struct mtk_vcodec_fw *fw); +int mtk_vcodec_fw_get_ipi(enum mtk_vcodec_fw_type type, int hw_id); =20 #endif /* _MTK_VCODEC_FW_H_ */ diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_r= eq_lat_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_= req_lat_if.c index bf21f2467a0f..618064001883 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_= if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_= if.c @@ -1886,8 +1886,8 @@ static int vdec_av1_slice_init(struct mtk_vcodec_dec_= ctx *ctx) return -ENOMEM; =20 instance->ctx =3D ctx; - instance->vpu.id =3D SCP_IPI_VDEC_LAT; - instance->vpu.core_id =3D SCP_IPI_VDEC_CORE; + instance->vpu.id =3D mtk_vcodec_fw_get_ipi(ctx->dev->fw_handler->type, MT= K_VDEC_LAT0); + instance->vpu.core_id =3D mtk_vcodec_fw_get_ipi(ctx->dev->fw_handler->typ= e, MTK_VDEC_CORE); instance->vpu.ctx =3D ctx; instance->vpu.codec_type =3D ctx->current_codec; =20 diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_= req_multi_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h= 264_req_multi_if.c index 5b25e1679b51..50f81f1cb616 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_mul= ti_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_mul= ti_if.c @@ -1212,8 +1212,8 @@ static int vdec_h264_slice_init(struct mtk_vcodec_dec= _ctx *ctx) =20 inst->ctx =3D ctx; =20 - inst->vpu.id =3D SCP_IPI_VDEC_LAT; - inst->vpu.core_id =3D SCP_IPI_VDEC_CORE; + inst->vpu.id =3D mtk_vcodec_fw_get_ipi(ctx->dev->fw_handler->type, MTK_VD= EC_LAT0); + inst->vpu.core_id =3D mtk_vcodec_fw_get_ipi(ctx->dev->fw_handler->type, M= TK_VDEC_CORE); inst->vpu.ctx =3D ctx; inst->vpu.codec_type =3D ctx->current_codec; inst->vpu.capture_type =3D ctx->capture_fourcc; diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_= req_multi_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h= evc_req_multi_if.c index 2725db882e5b..80fbd0309b9e 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_req_mul= ti_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_req_mul= ti_if.c @@ -863,8 +863,8 @@ static int vdec_hevc_slice_init(struct mtk_vcodec_dec_c= tx *ctx) =20 inst->ctx =3D ctx; =20 - inst->vpu.id =3D SCP_IPI_VDEC_LAT; - inst->vpu.core_id =3D SCP_IPI_VDEC_CORE; + inst->vpu.id =3D mtk_vcodec_fw_get_ipi(ctx->dev->fw_handler->type, MTK_VD= EC_LAT0); + inst->vpu.core_id =3D mtk_vcodec_fw_get_ipi(ctx->dev->fw_handler->type, M= TK_VDEC_CORE); inst->vpu.ctx =3D ctx; inst->vpu.codec_type =3D ctx->current_codec; inst->vpu.capture_type =3D ctx->capture_fourcc; diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp8_r= eq_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp8_req_= if.c index 232ef3bd246a..764f4d4054c0 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp8_req_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp8_req_if.c @@ -281,8 +281,8 @@ static int vdec_vp8_slice_init(struct mtk_vcodec_dec_ct= x *ctx) =20 inst->ctx =3D ctx; =20 - inst->vpu.id =3D SCP_IPI_VDEC_LAT; - inst->vpu.core_id =3D SCP_IPI_VDEC_CORE; + inst->vpu.id =3D mtk_vcodec_fw_get_ipi(ctx->dev->fw_handler->type, MTK_VD= EC_LAT0); + inst->vpu.core_id =3D mtk_vcodec_fw_get_ipi(ctx->dev->fw_handler->type, M= TK_VDEC_CORE); inst->vpu.ctx =3D ctx; inst->vpu.codec_type =3D ctx->current_codec; inst->vpu.capture_type =3D ctx->capture_fourcc; diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_r= eq_lat_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_= req_lat_if.c index 47c302745c1d..0279f66efdf9 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_= if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_= if.c @@ -1855,8 +1855,8 @@ static int vdec_vp9_slice_init(struct mtk_vcodec_dec_= ctx *ctx) return -ENOMEM; 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charset="utf-8" There is only one share memory for vcp architecture, need to divide it into many different functions. Signed-off-by: Yunfei Dong --- .../vcodec/common/mtk_vcodec_fw_vcp.c | 20 +++++++++++++++++- .../vcodec/common/mtk_vcodec_fw_vcp.h | 13 ++++++++++++ .../vcodec/decoder/vdec/vdec_av1_req_lat_if.c | 21 ++++++++++++++----- .../decoder/vdec/vdec_h264_req_multi_if.c | 6 +++++- .../decoder/vdec/vdec_hevc_req_multi_if.c | 7 +++++-- .../vcodec/decoder/vdec/vdec_vp9_req_lat_if.c | 16 ++++++++++---- .../mediatek/vcodec/decoder/vdec_vpu_if.c | 7 +++++-- 7 files changed, 75 insertions(+), 15 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vc= p.c b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.c index c9e5cde40aef..f6b93e1bcbf3 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.c +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.c @@ -366,8 +366,26 @@ static unsigned int mtk_vcodec_vcp_get_venc_capa(struc= t mtk_vcodec_fw *fw) return MTK_VENC_4K_CAPABILITY_ENABLE; } =20 -static void *mtk_vcodec_vcp_dm_addr(struct mtk_vcodec_fw *fw, u32 dtcm_dme= m_addr) +static void *mtk_vcodec_vcp_dm_addr(struct mtk_vcodec_fw *fw, u32 mem_type) { + unsigned char *vsi_core =3D fw->vcp->vsi_core_addr; + + switch (mem_type) { + case ENCODER_MEM: + case VCODEC_LAT_MEM: + return fw->vcp->vsi_addr; + case VCODEC_CORE_MEM: + return vsi_core; + case VP9_FRAME_MEM: + return vsi_core + VCODEC_VSI_LEN; + case AV1_CDF_MEM: + return vsi_core + VCODEC_VSI_LEN + VP9_FRAME_SIZE; + case AV1_IQ_MEM: + return vsi_core + VCODEC_VSI_LEN + VP9_FRAME_SIZE + AV1_CDF_SIZE; + default: + break; + } + return NULL; } =20 diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vc= p.h b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.h index 53080ed12c69..54df468f301b 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.h +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.h @@ -13,6 +13,19 @@ typedef void (*vcp_ipi_handler_t) (void *data, unsigned = int len, void *priv); #define VCP_SHARE_BUF_SIZE 64 =20 #define VCODEC_VSI_LEN (0x2000) +#define VP9_FRAME_SIZE (0x1000) +#define AV1_CDF_SIZE (0xFE80) +#define AV1_IQ_TABLE_SIZE (0x12200) + +/* enum mtk_vcp_mem_type - memory type for different hardware */ +enum mtk_vcp_mem_type { + ENCODER_MEM, + VCODEC_LAT_MEM, + VCODEC_CORE_MEM, + VP9_FRAME_MEM, + AV1_CDF_MEM, + AV1_IQ_MEM, +}; =20 /* enum mtk_vcp_ipi_index - index used to separate different hardware */ enum mtk_vcp_ipi_index { diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_r= eq_lat_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_= req_lat_if.c index 618064001883..2b2173062cb0 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_= if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_= if.c @@ -774,8 +774,11 @@ static int vdec_av1_slice_init_cdf_table(struct vdec_a= v1_slice_instance *instanc =20 ctx =3D instance->ctx; vsi =3D instance->vpu.vsi; - remote_cdf_table =3D mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, - (u32)vsi->cdf_table_addr); + if (mtk_vcodec_fw_get_type(ctx->dev->fw_handler) =3D=3D VCP) + remote_cdf_table =3D mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, AV1= _CDF_MEM); + else + remote_cdf_table =3D mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, + (u32)vsi->cdf_table_addr); if (IS_ERR(remote_cdf_table)) { mtk_vdec_err(ctx, "failed to map cdf table\n"); return PTR_ERR(remote_cdf_table); @@ -805,8 +808,11 @@ static int vdec_av1_slice_init_iq_table(struct vdec_av= 1_slice_instance *instance =20 ctx =3D instance->ctx; vsi =3D instance->vpu.vsi; - remote_iq_table =3D mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, - (u32)vsi->iq_table_addr); + if (mtk_vcodec_fw_get_type(ctx->dev->fw_handler) =3D=3D VCP) + remote_iq_table =3D mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, AV1_= IQ_MEM); + else + remote_iq_table =3D mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, + (u32)vsi->iq_table_addr); if (IS_ERR(remote_iq_table)) { mtk_vdec_err(ctx, "failed to map iq table\n"); return PTR_ERR(remote_iq_table); @@ -1905,7 +1911,12 @@ static int vdec_av1_slice_init(struct mtk_vcodec_dec= _ctx *ctx) goto error_vsi; } instance->init_vsi =3D vsi; - instance->core_vsi =3D mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, (u= 32)vsi->core_vsi); + if (mtk_vcodec_fw_get_type(ctx->dev->fw_handler) =3D=3D VCP) + instance->core_vsi =3D + mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, VCODEC_CORE_MEM); + else + instance->core_vsi =3D + mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, (u32)vsi->core_vsi); =20 if (!instance->core_vsi) { mtk_vdec_err(ctx, "failed to get AV1 core vsi\n"); diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_= req_multi_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h= 264_req_multi_if.c index 50f81f1cb616..6b354d30910c 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_mul= ti_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_mul= ti_if.c @@ -1230,7 +1230,11 @@ static int vdec_h264_slice_init(struct mtk_vcodec_de= c_ctx *ctx) vsi_size =3D round_up(vsi_size, VCODEC_DEC_ALIGNED_64); inst->vsi_ext =3D inst->vpu.vsi; temp =3D (unsigned char *)inst->vsi_ext; - inst->vsi_core_ext =3D (struct vdec_h264_slice_vsi_ext *)(temp + vsi_siz= e); + if (mtk_vcodec_fw_get_type(ctx->dev->fw_handler) =3D=3D VCP) + inst->vsi_core_ext =3D + mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, VCODEC_CORE_MEM); + else + inst->vsi_core_ext =3D (struct vdec_h264_slice_vsi_ext *)(temp + vsi_si= ze); =20 if (inst->ctx->dev->vdec_pdata->hw_arch =3D=3D MTK_VDEC_PURE_SINGLE_CORE) inst->decode =3D vdec_h264_slice_single_decode_ext; diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_= req_multi_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h= evc_req_multi_if.c index 80fbd0309b9e..ac0deea0df4c 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_req_mul= ti_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_req_mul= ti_if.c @@ -877,8 +877,11 @@ static int vdec_hevc_slice_init(struct mtk_vcodec_dec_= ctx *ctx) =20 vsi_size =3D round_up(sizeof(struct vdec_hevc_slice_vsi), VCODEC_DEC_ALIG= NED_64); inst->vsi =3D inst->vpu.vsi; - inst->vsi_core =3D - (struct vdec_hevc_slice_vsi *)(((char *)inst->vpu.vsi) + vsi_size); + if (mtk_vcodec_fw_get_type(ctx->dev->fw_handler) =3D=3D VCP) + inst->vsi_core =3D mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, VCODE= C_CORE_MEM); + else + inst->vsi_core =3D + (struct vdec_hevc_slice_vsi *)(((char *)inst->vpu.vsi) + vsi_size); =20 inst->resolution_changed =3D true; inst->realloc_mv_buf =3D true; diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_r= eq_lat_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_= req_lat_if.c index 0279f66efdf9..fa0f406f7726 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_= if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_= if.c @@ -513,8 +513,12 @@ static int vdec_vp9_slice_init_default_frame_ctx(struc= t vdec_vp9_slice_instance if (!ctx || !vsi) return -EINVAL; =20 - remote_frame_ctx =3D mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, - (u32)vsi->default_frame_ctx); + if (mtk_vcodec_fw_get_type(ctx->dev->fw_handler) =3D=3D VCP) + remote_frame_ctx =3D + mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, VP9_FRAME_MEM); + else + remote_frame_ctx =3D mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, + (u32)vsi->default_frame_ctx); if (!remote_frame_ctx) { mtk_vdec_err(ctx, "failed to map default frame ctx\n"); return -EINVAL; @@ -1875,8 +1879,12 @@ static int vdec_vp9_slice_init(struct mtk_vcodec_dec= _ctx *ctx) goto error_vsi; } instance->init_vsi =3D vsi; - instance->core_vsi =3D mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, - (u32)vsi->core_vsi); + if (mtk_vcodec_fw_get_type(ctx->dev->fw_handler) =3D=3D VCP) + instance->core_vsi =3D + mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, VCODEC_CORE_MEM); + else + instance->core_vsi =3D mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, + (u32)vsi->core_vsi); if (!instance->core_vsi) { mtk_vdec_err(ctx, "failed to get VP9 core vsi\n"); ret =3D -EINVAL; diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c b= /drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c index 145958206e38..ac10e0dfefb2 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c @@ -18,8 +18,11 @@ static void handle_init_ack_msg(const struct vdec_vpu_ip= i_init_ack *msg) =20 /* mapping VPU address to kernel virtual address */ /* the content in vsi is initialized to 0 in VPU */ - vpu->vsi =3D mtk_vcodec_fw_map_dm_addr(vpu->ctx->dev->fw_handler, - msg->vpu_inst_addr); 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Date: Fri, 15 Aug 2025 16:52:20 +0800 Message-ID: <20250815085232.30240-8-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250815085232.30240-1-yunfei.dong@mediatek.com> References: <20250815085232.30240-1-yunfei.dong@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" The supported level and profile are not the same for different codecs and architecture. Select the correct one. Signed-off-by: Yunfei Dong --- .../mediatek/vcodec/decoder/mtk_vcodec_dec_stateless.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_= stateless.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec= _stateless.c index d873159b9b30..c1cef78471a9 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_statele= ss.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_statele= ss.c @@ -555,6 +555,7 @@ static void mtk_vcodec_dec_fill_h264_level(struct v4l2_= ctrl_config *cfg, cfg->max =3D V4L2_MPEG_VIDEO_H264_LEVEL_5_2; break; case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_H264_LEVEL_6_0; break; case MTK_VDEC_MT8183: @@ -573,6 +574,7 @@ static void mtk_vcodec_dec_fill_h264_profile(struct v4l= 2_ctrl_config *cfg, switch (ctx->dev->chip_name) { case MTK_VDEC_MT8188: case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10; break; default: @@ -589,6 +591,7 @@ static void mtk_vcodec_dec_fill_h265_level(struct v4l2_= ctrl_config *cfg, cfg->max =3D V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1; break; case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2; break; default: @@ -603,6 +606,7 @@ static void mtk_vcodec_dec_fill_h265_profile(struct v4l= 2_ctrl_config *cfg, switch (ctx->dev->chip_name) { case MTK_VDEC_MT8188: case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10; break; default: @@ -620,6 +624,7 @@ static void mtk_vcodec_dec_fill_vp9_level(struct v4l2_c= trl_config *cfg, cfg->max =3D V4L2_MPEG_VIDEO_VP9_LEVEL_5_1; break; case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_VP9_LEVEL_5_2; break; case MTK_VDEC_MT8186: @@ -637,6 +642,7 @@ static void mtk_vcodec_dec_fill_vp9_profile(struct v4l2= _ctrl_config *cfg, switch (ctx->dev->chip_name) { case MTK_VDEC_MT8188: case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_VP9_PROFILE_2; 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charset="utf-8" Some platforms expose the video codec through the VCP coprocessor. Use the VCP architecture when the VCP coprocessor is found. Signed-off-by: Yunfei Dong --- .../platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_= drv.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c index fa609343c168..5e312f86e652 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c @@ -380,6 +380,9 @@ static int mtk_vcodec_probe(struct platform_device *pde= v) } else if (!of_property_read_u32(pdev->dev.of_node, "mediatek,scp", &rproc_phandle)) { fw_type =3D SCP; + } else if (!of_property_read_u32(pdev->dev.of_node, "mediatek,vcp", + &rproc_phandle)) { + fw_type =3D VCP; } else { dev_dbg(&pdev->dev, "Could not get vdec IPI device"); return -ENODEV; --=20 2.45.2 From nobody Sat Oct 4 14:36:15 2025 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6BF9125F995; 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charset="utf-8" Need to set dma mask to support 36bit iova address for decoder hardware can use 36bit address to decode for mt8196. Signed-off-by: Yunfei Dong --- .../platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_= drv.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c index 5e312f86e652..fabf969bc8a9 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c @@ -388,6 +388,13 @@ static int mtk_vcodec_probe(struct platform_device *pd= ev) return -ENODEV; } dma_set_max_seg_size(&pdev->dev, UINT_MAX); + if (dev->chip_name =3D=3D MTK_VDEC_MT8196) { + ret =3D dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(36)); + if (ret) { + dev_err(&pdev->dev, "Failed to enable 36-bit DMA: %d\n", ret); + return ret; + } + } =20 dev->fw_handler =3D mtk_vcodec_fw_select(dev, fw_type, DECODER); if (IS_ERR(dev->fw_handler)) --=20 2.45.2 From nobody Sat Oct 4 14:36:15 2025 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7BCCF2D0C9C; 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charset="utf-8" The driver need to clean xpc status when receive decoder hardware interrupt for mt8196 platform. Signed-off-by: Yunfei Dong --- .../vcodec/decoder/mtk_vcodec_dec_hw.c | 28 +++++++++++++++++++ .../vcodec/decoder/mtk_vcodec_dec_hw.h | 13 +++++++-- 2 files changed, 39 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_= hw.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.c index 881d5de41e05..e4e527fe54dc 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.c @@ -61,6 +61,31 @@ static int mtk_vdec_hw_prob_done(struct mtk_vcodec_dec_d= ev *vdec_dev) return 0; } =20 +static void mtk_vdec_hw_write_reg_mask(void __iomem *reg_base, u32 reg_off= set, u32 val, u32 mask) +{ + void __iomem *reg_addr =3D reg_base + reg_offset; + u32 reg_val; + + reg_val =3D readl(reg_addr); + reg_val &=3D ~mask; + reg_val |=3D (val & mask); + writel(reg_val, reg_addr); +} + +static void mtk_vdec_hw_clean_xpc(struct mtk_vdec_hw_dev *dev) +{ + u32 val, mask, addr =3D VDEC_XPC_CLEAN_ADDR; + + if (dev->main_dev->chip_name !=3D MTK_VDEC_MT8196) + return; + + val =3D dev->hw_idx =3D=3D MTK_VDEC_LAT0 ? VDEC_XPC_LAT_VAL : VDEC_XPC_CO= RE_VAL; + mask =3D dev->hw_idx =3D=3D MTK_VDEC_LAT0 ? VDEC_XPC_LAT_MASK : VDEC_XPC_= CORE_MASK; + + mtk_vdec_hw_write_reg_mask(dev->reg_base[VDEC_HW_XPC], addr, val, mask); + mtk_vdec_hw_write_reg_mask(dev->reg_base[VDEC_HW_XPC], addr, 0, mask); +} + static irqreturn_t mtk_vdec_hw_irq_handler(int irq, void *priv) { struct mtk_vdec_hw_dev *dev =3D priv; @@ -88,6 +113,8 @@ static irqreturn_t mtk_vdec_hw_irq_handler(int irq, void= *priv) writel(dec_done_status | VDEC_IRQ_CFG, vdec_misc_addr); writel(dec_done_status & ~VDEC_IRQ_CLR, vdec_misc_addr); =20 + mtk_vdec_hw_clean_xpc(dev); + wake_up_dec_ctx(ctx, MTK_INST_IRQ_RECEIVED, dev->hw_idx); =20 mtk_v4l2_vdec_dbg(3, ctx, "wake up ctx %d, dec_done_status=3D%x", @@ -166,6 +193,7 @@ static int mtk_vdec_hw_probe(struct platform_device *pd= ev) subdev_dev->hw_idx =3D hw_idx; subdev_dev->main_dev =3D main_dev; subdev_dev->reg_base[VDEC_HW_SYS] =3D main_dev->reg_base[VDEC_HW_SYS]; + subdev_dev->reg_base[VDEC_HW_XPC] =3D main_dev->reg_base[VDEC_HW_MISC]; set_bit(subdev_dev->hw_idx, main_dev->subdev_bitmap); =20 if (IS_SUPPORT_VDEC_HW_IRQ(hw_idx)) { diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_= hw.h b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.h index 83fe8b9428e6..50ce6c1d25a2 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.h +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.h @@ -18,17 +18,26 @@ #define VDEC_IRQ_CLR 0x10 #define VDEC_IRQ_CFG_REG 0xa4 =20 +#define VDEC_XPC_CLEAN_ADDR 0xc +#define VDEC_XPC_LAT_VAL BIT(0) +#define VDEC_XPC_LAT_MASK BIT(0) + +#define VDEC_XPC_CORE_VAL BIT(4) +#define VDEC_XPC_CORE_MASK BIT(4) + #define IS_SUPPORT_VDEC_HW_IRQ(hw_idx) ((hw_idx) !=3D MTK_VDEC_LAT_SOC) =20 /** * enum mtk_vdec_hw_reg_idx - subdev hardware register base index - * @VDEC_HW_SYS : vdec soc register index + * @VDEC_HW_SYS: vdec soc register index * @VDEC_HW_MISC: vdec misc register index - * @VDEC_HW_MAX : vdec supported max register index + * @VDEC_HW_XPC: vdec xpc register index + * @VDEC_HW_MAX: vdec supported max register index */ enum mtk_vdec_hw_reg_idx { VDEC_HW_SYS, VDEC_HW_MISC, + VDEC_HW_XPC, VDEC_HW_MAX }; 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charset="utf-8" Print hevc/av1 output format and 10bit capture format information to debug. Signed-off-by: Yunfei Dong --- .../mediatek/vcodec/common/mtk_vcodec_dbgfs.c | 21 +++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_dbgfs= .c b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_dbgfs.c index 5ad3797836db..79ccbe13735a 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_dbgfs.c +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_dbgfs.c @@ -29,6 +29,14 @@ static void mtk_vdec_dbgfs_get_format_type(struct mtk_vc= odec_dec_ctx *ctx, char curr_len =3D snprintf(buf + *used, total - *used, "\toutput format: vp9 slice\n"); break; + case V4L2_PIX_FMT_HEVC_SLICE: + curr_len =3D snprintf(buf + *used, total - *used, + "\toutput format: hevc slice\n"); + break; + case V4L2_PIX_FMT_AV1_FRAME: + curr_len =3D snprintf(buf + *used, total - *used, + "\toutput format: av1 slice\n"); + break; default: curr_len =3D snprintf(buf + *used, total - *used, "\tunsupported output format: 0x%x\n", @@ -45,6 +53,14 @@ static void mtk_vdec_dbgfs_get_format_type(struct mtk_vc= odec_dec_ctx *ctx, char curr_len =3D snprintf(buf + *used, total - *used, "\tcapture format: MT21C\n"); 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charset="utf-8" Send share memory address to vcp for it is reserved in kernel side. Signed-off-by: Yunfei Dong --- drivers/media/platform/mediatek/vcodec/decoder/vdec_ipi_msg.h | 2 ++ drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec_ipi_msg.h = b/drivers/media/platform/mediatek/vcodec/decoder/vdec_ipi_msg.h index 47070be2a991..097561a1efdc 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec_ipi_msg.h +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec_ipi_msg.h @@ -67,11 +67,13 @@ struct vdec_vpu_ipi_ack { * @msg_id : AP_IPIMSG_DEC_INIT * @codec_type : codec fourcc * @ap_inst_addr : AP video decoder instance address + * @shared_iova : reserved share memory address */ struct vdec_ap_ipi_init { uint32_t msg_id; u32 codec_type; uint64_t ap_inst_addr; + u64 shared_iova; }; =20 /** diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c b= /drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c index ac10e0dfefb2..428ed9e5f2c3 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c @@ -232,6 +232,8 @@ int vpu_dec_init(struct vdec_vpu_inst *vpu) msg.msg_id =3D AP_IPIMSG_DEC_INIT; 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charset="utf-8" The buffer size of y and c plane has been calculated in vcp/scp, can fill each frame buffer size with picinfo directly. Signed-off-by: Yunfei Dong --- .../vcodec/decoder/vdec/vdec_av1_req_lat_if.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_r= eq_lat_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_= req_lat_if.c index 2b2173062cb0..6070485e26c4 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_= if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_= if.c @@ -1799,18 +1799,19 @@ static int vdec_av1_slice_setup_core_buffer(struct = vdec_av1_slice_instance *inst { struct vb2_buffer *vb; struct vb2_queue *vq; - int w, h, plane, size; + int plane; int i; =20 plane =3D instance->ctx->q_data[MTK_Q_DATA_DST].fmt->num_planes; - w =3D vsi->frame.uh.upscaled_width; - h =3D vsi->frame.uh.frame_height; - size =3D ALIGN(w, VCODEC_DEC_ALIGNED_64) * ALIGN(h, VCODEC_DEC_ALIGNED_64= ); =20 /* frame buffer */ vsi->fb.y.dma_addr =3D fb->base_y.dma_addr; + + vsi->fb.y.size =3D instance->ctx->picinfo.fb_sz[0]; + vsi->fb.c.size =3D instance->ctx->picinfo.fb_sz[1]; + if (plane =3D=3D 1) - vsi->fb.c.dma_addr =3D fb->base_y.dma_addr + size; + vsi->fb.c.dma_addr =3D fb->base_y.dma_addr + vsi->fb.y.size; else vsi->fb.c.dma_addr =3D fb->base_c.dma_addr; =20 @@ -1835,8 +1836,9 @@ static int vdec_av1_slice_setup_core_buffer(struct vd= ec_av1_slice_instance *inst } =20 vref->y.dma_addr =3D vb2_dma_contig_plane_dma_addr(vb, 0); + vref->y.size =3D vsi->fb.y.size; if (plane =3D=3D 1) - vref->c.dma_addr =3D vref->y.dma_addr + size; + vref->c.dma_addr =3D vref->y.dma_addr + vsi->fb.y.size; else vref->c.dma_addr =3D vb2_dma_contig_plane_dma_addr(vb, 1); } --=20 2.45.2 From nobody Sat Oct 4 14:36:15 2025 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 15AE32D876C; Fri, 15 Aug 2025 08:53:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Fri, 15 Aug 2025 16:53:03 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.39; Fri, 15 Aug 2025 16:53:00 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.39 via Frontend Transport; Fri, 15 Aug 2025 16:53:00 +0800 From: Yunfei Dong To: =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , Sebastian Fricke , Nicolas Dufresne , Hans Verkuil , AngeloGioacchino Del Regno , Benjamin Gaignard , Nathan Hebert , Daniel Almeida CC: Hsin-Yi Wang , Fritz Koenig , Daniel Vetter , Steve Cho , "Yunfei Dong" , , , , , , Subject: [PATCH v2 14/14] media: mediatek: decoder: support av1 extend vsi Date: Fri, 15 Aug 2025 16:52:27 +0800 Message-ID: <20250815085232.30240-15-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250815085232.30240-1-yunfei.dong@mediatek.com> References: <20250815085232.30240-1-yunfei.dong@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" The driver can't access tile buffer address for extend architecture, set tile group information in vcp and share it with kernel. Signed-off-by: Yunfei Dong --- .../vcodec/decoder/vdec/vdec_av1_req_lat_if.c | 46 ++++++++++++++++--- 1 file changed, 39 insertions(+), 7 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_r= eq_lat_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_= req_lat_if.c index 6070485e26c4..43541faeea87 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_= if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_= if.c @@ -25,6 +25,8 @@ =20 #define AV1_INVALID_IDX -1 =20 +#define AV1_NON_EXT_VSI_SIZE 0xD50 + #define AV1_DIV_ROUND_UP_POW2(value, n) \ ({ \ typeof(n) _n =3D n; \ @@ -641,6 +643,8 @@ struct vdec_av1_slice_fb { * @frame: current frame info * @state: status after decode done * @cur_lst_tile_id: tile id for large scale + * @tile_group: tile group info + * @reserved: reserved */ struct vdec_av1_slice_vsi { /* lat */ @@ -665,6 +669,8 @@ struct vdec_av1_slice_vsi { struct vdec_av1_slice_frame frame; struct vdec_av1_slice_state state; u32 cur_lst_tile_id; + struct vdec_av1_slice_tile_group tile_group; + unsigned int reserved[4]; }; =20 /** @@ -1394,13 +1400,18 @@ static int vdec_av1_slice_setup_tile_group(struct v= dec_av1_slice_instance *insta struct vdec_av1_slice_vsi *vsi) { struct v4l2_ctrl_av1_tile_group_entry *ctrl_tge; - struct vdec_av1_slice_tile_group *tile_group =3D &instance->tile_group; + struct vdec_av1_slice_tile_group *tile_group; struct vdec_av1_slice_uncompressed_header *uh =3D &vsi->frame.uh; struct vdec_av1_slice_tile *tile =3D &uh->tile; struct v4l2_ctrl *ctrl; u32 tge_size; int i; =20 + if (IS_VDEC_SUPPORT_EXT(instance->ctx->dev->dec_capability)) + tile_group =3D &vsi->tile_group; + else + tile_group =3D &instance->tile_group; + ctrl =3D v4l2_ctrl_find(&instance->ctx->ctrl_hdl, V4L2_CID_STATELESS_AV1_= TILE_GROUP_ENTRY); if (!ctrl) return -EINVAL; @@ -1601,6 +1612,7 @@ static void vdec_av1_slice_setup_lat_buffer(struct vd= ec_av1_slice_instance *inst struct vdec_lat_buf *lat_buf) { struct vdec_av1_slice_work_buffer *work_buffer; + u32 num_tiles; int i; =20 vsi->bs.dma_addr =3D bs->dma_addr; @@ -1635,12 +1647,18 @@ static void vdec_av1_slice_setup_lat_buffer(struct = vdec_av1_slice_instance *inst =20 vsi->tile.buf =3D instance->tile.dma_addr; vsi->tile.size =3D instance->tile.size; - memcpy(lat_buf->tile_addr.va, instance->tile.va, 64 * instance->tile_grou= p.num_tiles); =20 vsi->cdf_table.buf =3D instance->cdf_table.dma_addr; vsi->cdf_table.size =3D instance->cdf_table.size; vsi->iq_table.buf =3D instance->iq_table.dma_addr; vsi->iq_table.size =3D instance->iq_table.size; + + if (IS_VDEC_SUPPORT_EXT(instance->ctx->dev->dec_capability)) + num_tiles =3D vsi->tile_group.num_tiles; + else + num_tiles =3D instance->tile_group.num_tiles; + + memcpy(lat_buf->tile_addr.va, instance->tile.va, 64 * num_tiles); } =20 static void vdec_av1_slice_setup_seg_buffer(struct vdec_av1_slice_instance= *instance, @@ -1663,7 +1681,7 @@ static void vdec_av1_slice_setup_tile_buffer(struct v= dec_av1_slice_instance *ins struct vdec_av1_slice_vsi *vsi, struct mtk_vcodec_mem *bs) { - struct vdec_av1_slice_tile_group *tile_group =3D &instance->tile_group; + struct vdec_av1_slice_tile_group *tile_group; struct vdec_av1_slice_uncompressed_header *uh =3D &vsi->frame.uh; struct vdec_av1_slice_tile *tile =3D &uh->tile; u32 tile_num, tile_row, tile_col; @@ -1674,6 +1692,11 @@ static void vdec_av1_slice_setup_tile_buffer(struct = vdec_av1_slice_instance *ins u32 *tile_info_buf =3D instance->tile.va; u64 pa =3D (u64)bs->dma_addr; =20 + if (IS_VDEC_SUPPORT_EXT(instance->ctx->dev->dec_capability)) + tile_group =3D &vsi->tile_group; + else + tile_group =3D &instance->tile_group; + if (uh->disable_cdf_update =3D=3D 0) allow_update_cdf =3D 1; =20 @@ -1887,7 +1910,7 @@ static int vdec_av1_slice_init(struct mtk_vcodec_dec_= ctx *ctx) { struct vdec_av1_slice_instance *instance; struct vdec_av1_slice_init_vsi *vsi; - int ret; + int ret, vsi_size =3D AV1_NON_EXT_VSI_SIZE; =20 instance =3D kzalloc(sizeof(*instance), GFP_KERNEL); if (!instance) @@ -1926,9 +1949,18 @@ static int vdec_av1_slice_init(struct mtk_vcodec_dec= _ctx *ctx) goto error_vsi; } =20 - if (vsi->vsi_size !=3D sizeof(struct vdec_av1_slice_vsi)) - mtk_vdec_err(ctx, "remote vsi size 0x%x mismatch! expected: 0x%zx\n", - vsi->vsi_size, sizeof(struct vdec_av1_slice_vsi)); + if (IS_VDEC_SUPPORT_EXT(ctx->dev->dec_capability)) { + vsi_size =3D sizeof(struct vdec_av1_slice_vsi); + vsi->iq_table_size =3D AV1_IQ_TABLE_SIZE; + vsi->cdf_table_size =3D AV1_CDF_SIZE; + } + + if (vsi->vsi_size !=3D vsi_size) { + mtk_vdec_err(ctx, "remote vsi size 0x%x mismatch! expected: 0x%x\n", + vsi->vsi_size, vsi_size); + ret =3D -EINVAL; + goto error_vsi; + } =20 instance->irq_enabled =3D 1; instance->inneracing_mode =3D IS_VDEC_INNER_RACING(instance->ctx->dev->de= c_capability); --=20 2.45.2