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Peter Anvin" , David Woodhouse , Sean Christopherson , Peter Zijlstra , Sohil Mehta , John Ogness , x86@kernel.org, x86-cpuid@lists.linux.dev, LKML , "Ahmed S. Darwish" Subject: [PATCH v4 11/34] x86/cpu: Use parsed CPUID(0x1) Date: Fri, 15 Aug 2025 09:02:04 +0200 Message-ID: <20250815070227.19981-12-darwi@linutronix.de> In-Reply-To: <20250815070227.19981-1-darwi@linutronix.de> References: <20250815070227.19981-1-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use parsed CPUID(0x1) access, instead of a direct CPUID query, at early boot CPU detection code. Beside the centralization benefits of the new CPUID model APIs, this allows using the auto-generated leaf data types and their full C99 bitfields instead of performing ugly bitwise operations on CPUID register output. Signed-off-by: Ahmed S. Darwish --- arch/x86/kernel/cpu/common.c | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index e081f92ddfe9..f989c8099490 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -897,6 +897,7 @@ void get_cpu_vendor(struct cpuinfo_x86 *c) void cpu_detect(struct cpuinfo_x86 *c) { const struct leaf_0x0_0 *l0 =3D cpuid_leaf(c, 0x0); + const struct leaf_0x1_0 *l1 =3D cpuid_leaf(c, 0x1); =20 c->cpuid_level =3D l0->max_std_leaf; *(u32 *)&c->x86_vendor_id[0] =3D l0->cpu_vendorid_0; @@ -904,17 +905,14 @@ void cpu_detect(struct cpuinfo_x86 *c) *(u32 *)&c->x86_vendor_id[8] =3D l0->cpu_vendorid_2; =20 c->x86 =3D 4; - /* Intel-defined flags: level 0x00000001 */ - if (c->cpuid_level >=3D 0x00000001) { - u32 junk, tfms, cap0, misc; =20 - cpuid(0x00000001, &tfms, &misc, &junk, &cap0); - c->x86 =3D x86_family(tfms); - c->x86_model =3D x86_model(tfms); - c->x86_stepping =3D x86_stepping(tfms); + if (l1) { + c->x86 =3D cpuid_family(l1); + c->x86_model =3D cpuid_model(l1); + c->x86_stepping =3D l1->stepping; =20 - if (cap0 & (1<<19)) { - c->x86_clflush_size =3D ((misc >> 8) & 0xff) * 8; + if (l1->clflush) { + c->x86_clflush_size =3D l1->clflush_size * 8; c->x86_cache_alignment =3D c->x86_clflush_size; } } --=20 2.50.1