From nobody Sat Oct 4 14:13:12 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 98AD322330F; Fri, 15 Aug 2025 08:37:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247061; cv=none; b=TcH2aMhzrb/odx6vIIcNHoghFuklDZRBQ4tEZQUctxx0xXjY3icIoTexqgbQGgoEU4rCYj0pAh/BzTGm55xqask3KLhUpLgyWlQwpSeiYFI8oMGDdAQEz5pfV35m38OKBxdswgmX6JYhV55iRsswZb7t+y6EzD6QPR1czE50qGs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247061; c=relaxed/simple; bh=+LdxacDOKbwv5ZlhXWTL9PeHEmVA5121O21NQzi8U8M=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=M+bFS6aOWWUXjjSnYakFD/3AQIInZqARTN9bEKGQRz1JIQZDHCJk10KgHbWE7jaJIIYTYw1ImGgM3Dhezb9Ic5cBQhMT/h3820z3TpTqupiWpBRhiXtv75BhTqyawTgYJnvHXn/EEwqBlIOe0eyOwsvjEHiAyKtmL7uC8XKBVQY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=CETaJ7Xc; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="CETaJ7Xc" Received: by smtp.kernel.org (Postfix) with ESMTPS id 3FFD8C4CEF5; Fri, 15 Aug 2025 08:37:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1755247061; bh=+LdxacDOKbwv5ZlhXWTL9PeHEmVA5121O21NQzi8U8M=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=CETaJ7XcfZrZwAHeVDADXVmrjA8oZuhJhdw49Amn9mXn/+HqvQemXaJySdaPJ+y6I 3Ng2QayQJHuyrU7qZRhHvw9kc5Q+Ra6kGZ/Ketj3xz0PnvR63uIJIiEjVVMtiQrR9E uQCVXSQPmoQ+Rx8fEejbfz+voOaAuwsAO/uMws4mApgjHJiBt6ntD23KPSi3kVWAi4 AvDmBDxpxPm7Lv1nZ4a4UDpJEYhfGhXFDSQwJ7qsDwn1pYkzrMWkxcYTSnfaxvE90a OE3A3seWMJBtsoefnQksp+Ff+TZnCkbnysr4fhLmc0uoGVbT8eQDuJYgffVVcu3Kt0 vvgut4MG5SfpA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2A55BCA0ED1; Fri, 15 Aug 2025 08:37:41 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 15 Aug 2025 16:37:27 +0800 Subject: [PATCH 01/13] dt-bindings: soc: amlogic: Add clk-measure related properties Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250815-add-more-socs-to-support-clk_measure-v1-1-59f04ba67457@amlogic.com> References: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> In-Reply-To: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755247056; l=2924; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=WKCqPVvjKvBXZpMp6AHTLsZhyPJ7w7tYipQPXxNUfy8=; b=Q41qJt636clPDrUBiobgwPQhIgCCdN9zC7cR3+DvjHw/DkHPHACtzt579HcHsSbegx+EGYnso SAP1K0IrAffB30vT6+ZbJysS3mjFwAyqBwtGnT6NcX2J7u/OIiLPKsZ X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add three properties to clk-measure: 'clkmsr-indices', 'clkmsr-names', and 'clkmsr-reg-v2' for describing measurable channels and register offsets in DT. Signed-off-by: Chuan Liu --- .../soc/amlogic/amlogic,meson-gx-clk-measure.yaml | 54 ++++++++++++++++++= +++- 1 file changed, 53 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx= -clk-measure.yaml b/Documentation/devicetree/bindings/soc/amlogic/amlogic,m= eson-gx-clk-measure.yaml index 39d4637c2d08..1c9d37eef5f0 100644 --- a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-me= asure.yaml +++ b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-me= asure.yaml @@ -6,7 +6,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# =20 title: Amlogic Internal Clock Measurer =20 -description: +description: | The Amlogic SoCs contains an IP to measure the internal clocks. The precision is multiple of MHz, useful to debug the clock states. =20 @@ -28,15 +28,67 @@ properties: reg: maxItems: 1 =20 + clkmsr-indices: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + Supported channel IDs for clk-measure. + minItems: 1 + maxItems: 256 + + clkmsr-names: + $ref: /schemas/types.yaml#/definitions/string-array + description: | + The channel ID names supported by clk-measure correspond one-to-one = with + the IDs specified in 'clkmsr-indices'. + + Therefore, the defined 'clkmsr-indices' and 'clkmsr-names' must have + matching counts and maintain strict correspondence. + minItems: 1 + maxItems: 256 + + clkmsr-reg-v2: + type: boolean + description: | + Specify whether the register address offset for clk-measure correspo= nds + to version V2. + required: - compatible - reg + - clkmsr-indices + - clkmsr-names =20 unevaluatedProperties: false =20 examples: - | + /* + * Example 1: clk-measure uses the original version of register address + * offsets. + */ clock-measure@8758 { compatible =3D "amlogic,meson-gx-clk-measure"; reg =3D <0x8758 0x10>; + clkmsr-indices =3D <0>, + <1>, + <2>; + clkmsr-names =3D "ring_osc_out_ee0", + "ring_osc_out_ee1", + "ring_osc_out_ee2"; + }; + + - | + /* + * Example 2: clk-measure uses V2 version register address offsets. + */ + clock-measure@48000 { + compatible =3D "amlogic,c3-clk-measure"; + reg =3D <0x48000 0x1c>; + clkmsr-reg-v2; + clkmsr-indices =3D <0>, + <1>, + <2>; + clkmsr-names =3D "sys_clk", + "axi_clk", + "rtc_clk"; }; --=20 2.42.0 From nobody Sat Oct 4 14:13:12 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A50DD227B9F; Fri, 15 Aug 2025 08:37:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247061; cv=none; b=Gb3Tm7rjGsLPU6VpFn7e2z8bmP10I+/A9Yi6psU6WHwERrBxXDzoyTls49svI7Q9kTewDDSx3gMLULSw/X8yvIBjBe7sGgNAd6OQcIbzGYL9acDQfmgo+vSG+MZorf6yNmcHI83tgaB6BVGfXIT4nAK0QNkve4C5lf7AO6LVnWA= ARC-Message-Signature: i=1; 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b=e2TMv6EiwS2IUU9EGUVW5+muk/3oCJAQqUnCrcfZM64WuTzBY9zi1MmiURUwnnzK+ p2HmhWFvsMIDzYHWjp+mENdF+4Mx6dG95OUD1K9tVbimT2k7yngpRbfnB3Nab0kGam 4EfI7s5eYFRepC74A6NG4sLt9wclhXi0U/j0F7hGJ0JkSyDruOtGmM7swzdn/JC/Dh ZnCSKfwHX3D05uOVWuM+iC3Ju3bdbGlGxNZRk3ff5WeARNvXoIKwWK+DfEXL955w41 cc+CCuUG7DnHgDQN2atqAGewleg3Gpnilyak58KLTNDQsJfKCiOzUtWgMJOkc1Jevc c80VVLr7sZNnA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A9E4CA0EE6; Fri, 15 Aug 2025 08:37:41 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 15 Aug 2025 16:37:28 +0800 Subject: [PATCH 02/13] soc: amlogic: clk-measure: Remove the msr_data from clk-measure Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250815-add-more-socs-to-support-clk_measure-v1-2-59f04ba67457@amlogic.com> References: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> In-Reply-To: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755247056; l=33183; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=aGcknLhpjfBwJ7Mbh8zqXpvgXbanA56XCGUhbCajFqM=; b=QTvdzHH8dw6uQStcWkvivnbMck6Wghe0j4OyfpdF2F/D9u8NpmXLQfiGBwH0blMvVmfpxzK/H arVAkDJNnfcDvzucyvdtnuUolQwTJLH830ADu2oSSKFwFWww2+xH1ob X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu The clk-measure driver defines clock measurement IDs and their corresponding channel names/data for all supported SoCs. During compilation, data for all SoCs gets built into the kernel, while we only need the clk-measure data for one specific SoC, resulting in memory waste. Signed-off-by: Chuan Liu --- drivers/soc/amlogic/meson-clk-measure.c | 907 +++-------------------------= ---- 1 file changed, 77 insertions(+), 830 deletions(-) diff --git a/drivers/soc/amlogic/meson-clk-measure.c b/drivers/soc/amlogic/= meson-clk-measure.c index df395e015f26..4d91d463d2a5 100644 --- a/drivers/soc/amlogic/meson-clk-measure.c +++ b/drivers/soc/amlogic/meson-clk-measure.c @@ -49,749 +49,14 @@ struct meson_msr_data { =20 struct meson_msr { struct regmap *regmap; - struct meson_msr_data data; -}; - -#define CLK_MSR_ID(__id, __name) \ - [__id] =3D {.id =3D __id, .name =3D __name,} - -static const struct meson_msr_id clk_msr_m8[] =3D { - CLK_MSR_ID(0, "ring_osc_out_ee0"), - CLK_MSR_ID(1, "ring_osc_out_ee1"), - CLK_MSR_ID(2, "ring_osc_out_ee2"), - CLK_MSR_ID(3, "a9_ring_osck"), - CLK_MSR_ID(6, "vid_pll"), - CLK_MSR_ID(7, "clk81"), - CLK_MSR_ID(8, "encp"), - CLK_MSR_ID(9, "encl"), - CLK_MSR_ID(11, "eth_rmii"), - CLK_MSR_ID(13, "amclk"), - CLK_MSR_ID(14, "fec_clk_0"), - CLK_MSR_ID(15, "fec_clk_1"), - CLK_MSR_ID(16, "fec_clk_2"), - CLK_MSR_ID(18, "a9_clk_div16"), - CLK_MSR_ID(19, "hdmi_sys"), - CLK_MSR_ID(20, "rtc_osc_clk_out"), - CLK_MSR_ID(21, "i2s_clk_in_src0"), - CLK_MSR_ID(22, "clk_rmii_from_pad"), - CLK_MSR_ID(23, "hdmi_ch0_tmds"), - CLK_MSR_ID(24, "lvds_fifo"), - CLK_MSR_ID(26, "sc_clk_int"), - CLK_MSR_ID(28, "sar_adc"), - CLK_MSR_ID(30, "mpll_clk_test_out"), - CLK_MSR_ID(31, "audac_clkpi"), - CLK_MSR_ID(32, "vdac"), - CLK_MSR_ID(33, "sdhc_rx"), - CLK_MSR_ID(34, "sdhc_sd"), - CLK_MSR_ID(35, "mali"), - CLK_MSR_ID(36, "hdmi_tx_pixel"), - CLK_MSR_ID(38, "vdin_meas"), - CLK_MSR_ID(39, "pcm_sclk"), - CLK_MSR_ID(40, "pcm_mclk"), - CLK_MSR_ID(41, "eth_rx_tx"), - CLK_MSR_ID(42, "pwm_d"), - CLK_MSR_ID(43, "pwm_c"), - CLK_MSR_ID(44, "pwm_b"), - CLK_MSR_ID(45, "pwm_a"), - CLK_MSR_ID(46, "pcm2_sclk"), - CLK_MSR_ID(47, "ddr_dpll_pt"), - CLK_MSR_ID(48, "pwm_f"), - CLK_MSR_ID(49, "pwm_e"), - CLK_MSR_ID(59, "hcodec"), - CLK_MSR_ID(60, "usb_32k_alt"), - CLK_MSR_ID(61, "gpio"), - CLK_MSR_ID(62, "vid2_pll"), - CLK_MSR_ID(63, "mipi_csi_cfg"), -}; - -static const struct meson_msr_id clk_msr_gx[] =3D { - CLK_MSR_ID(0, "ring_osc_out_ee_0"), - CLK_MSR_ID(1, "ring_osc_out_ee_1"), - CLK_MSR_ID(2, "ring_osc_out_ee_2"), - CLK_MSR_ID(3, "a53_ring_osc"), - CLK_MSR_ID(4, "gp0_pll"), - CLK_MSR_ID(6, "enci"), - CLK_MSR_ID(7, "clk81"), - CLK_MSR_ID(8, "encp"), - CLK_MSR_ID(9, "encl"), - CLK_MSR_ID(10, "vdac"), - CLK_MSR_ID(11, "rgmii_tx"), - CLK_MSR_ID(12, "pdm"), - CLK_MSR_ID(13, "amclk"), - CLK_MSR_ID(14, "fec_0"), - CLK_MSR_ID(15, "fec_1"), - CLK_MSR_ID(16, "fec_2"), - CLK_MSR_ID(17, "sys_pll_div16"), - CLK_MSR_ID(18, "sys_cpu_div16"), - CLK_MSR_ID(19, "hdmitx_sys"), - CLK_MSR_ID(20, "rtc_osc_out"), - CLK_MSR_ID(21, "i2s_in_src0"), - CLK_MSR_ID(22, "eth_phy_ref"), - CLK_MSR_ID(23, "hdmi_todig"), - CLK_MSR_ID(26, "sc_int"), - CLK_MSR_ID(28, "sar_adc"), - CLK_MSR_ID(31, "mpll_test_out"), - CLK_MSR_ID(32, "vdec"), - CLK_MSR_ID(35, "mali"), - CLK_MSR_ID(36, "hdmi_tx_pixel"), - CLK_MSR_ID(37, "i958"), - CLK_MSR_ID(38, "vdin_meas"), - CLK_MSR_ID(39, "pcm_sclk"), - CLK_MSR_ID(40, "pcm_mclk"), - CLK_MSR_ID(41, "eth_rx_or_rmii"), - CLK_MSR_ID(42, "mp0_out"), - CLK_MSR_ID(43, "fclk_div5"), - CLK_MSR_ID(44, "pwm_b"), - CLK_MSR_ID(45, "pwm_a"), - CLK_MSR_ID(46, "vpu"), - CLK_MSR_ID(47, "ddr_dpll_pt"), - CLK_MSR_ID(48, "mp1_out"), - CLK_MSR_ID(49, "mp2_out"), - CLK_MSR_ID(50, "mp3_out"), - CLK_MSR_ID(51, "nand_core"), - CLK_MSR_ID(52, "sd_emmc_b"), - CLK_MSR_ID(53, "sd_emmc_a"), - CLK_MSR_ID(55, "vid_pll_div_out"), - CLK_MSR_ID(56, "cci"), - CLK_MSR_ID(57, "wave420l_c"), - CLK_MSR_ID(58, "wave420l_b"), - CLK_MSR_ID(59, "hcodec"), - CLK_MSR_ID(60, "alt_32k"), - CLK_MSR_ID(61, "gpio_msr"), - CLK_MSR_ID(62, "hevc"), - CLK_MSR_ID(66, "vid_lock"), - CLK_MSR_ID(70, "pwm_f"), - CLK_MSR_ID(71, "pwm_e"), - CLK_MSR_ID(72, "pwm_d"), - CLK_MSR_ID(73, "pwm_c"), - CLK_MSR_ID(75, "aoclkx2_int"), - CLK_MSR_ID(76, "aoclk_int"), - CLK_MSR_ID(77, "rng_ring_osc_0"), - CLK_MSR_ID(78, "rng_ring_osc_1"), - CLK_MSR_ID(79, "rng_ring_osc_2"), - CLK_MSR_ID(80, "rng_ring_osc_3"), - CLK_MSR_ID(81, "vapb"), - CLK_MSR_ID(82, "ge2d"), -}; - -static const struct meson_msr_id clk_msr_axg[] =3D { - CLK_MSR_ID(0, "ring_osc_out_ee_0"), - CLK_MSR_ID(1, "ring_osc_out_ee_1"), - CLK_MSR_ID(2, "ring_osc_out_ee_2"), - CLK_MSR_ID(3, "a53_ring_osc"), - CLK_MSR_ID(4, "gp0_pll"), - CLK_MSR_ID(5, "gp1_pll"), - CLK_MSR_ID(7, "clk81"), - CLK_MSR_ID(9, "encl"), - CLK_MSR_ID(17, "sys_pll_div16"), - CLK_MSR_ID(18, "sys_cpu_div16"), - CLK_MSR_ID(20, "rtc_osc_out"), - CLK_MSR_ID(23, "mmc_clk"), - CLK_MSR_ID(28, "sar_adc"), - CLK_MSR_ID(31, "mpll_test_out"), - CLK_MSR_ID(40, "mod_eth_tx_clk"), - CLK_MSR_ID(41, "mod_eth_rx_clk_rmii"), - CLK_MSR_ID(42, "mp0_out"), - CLK_MSR_ID(43, "fclk_div5"), - CLK_MSR_ID(44, "pwm_b"), - CLK_MSR_ID(45, "pwm_a"), - CLK_MSR_ID(46, "vpu"), - CLK_MSR_ID(47, "ddr_dpll_pt"), - CLK_MSR_ID(48, "mp1_out"), - CLK_MSR_ID(49, "mp2_out"), - CLK_MSR_ID(50, "mp3_out"), - CLK_MSR_ID(51, "sd_emmm_c"), - CLK_MSR_ID(52, "sd_emmc_b"), - CLK_MSR_ID(61, "gpio_msr"), - CLK_MSR_ID(66, "audio_slv_lrclk_c"), - CLK_MSR_ID(67, "audio_slv_lrclk_b"), - CLK_MSR_ID(68, "audio_slv_lrclk_a"), - CLK_MSR_ID(69, "audio_slv_sclk_c"), - CLK_MSR_ID(70, "audio_slv_sclk_b"), - CLK_MSR_ID(71, "audio_slv_sclk_a"), - CLK_MSR_ID(72, "pwm_d"), - CLK_MSR_ID(73, "pwm_c"), - CLK_MSR_ID(74, "wifi_beacon"), - CLK_MSR_ID(75, "tdmin_lb_lrcl"), - CLK_MSR_ID(76, "tdmin_lb_sclk"), - CLK_MSR_ID(77, "rng_ring_osc_0"), - CLK_MSR_ID(78, "rng_ring_osc_1"), - CLK_MSR_ID(79, "rng_ring_osc_2"), - CLK_MSR_ID(80, "rng_ring_osc_3"), - CLK_MSR_ID(81, "vapb"), - CLK_MSR_ID(82, "ge2d"), - CLK_MSR_ID(84, "audio_resample"), - CLK_MSR_ID(85, "audio_pdm_sys"), - CLK_MSR_ID(86, "audio_spdifout"), - CLK_MSR_ID(87, "audio_spdifin"), - CLK_MSR_ID(88, "audio_lrclk_f"), - CLK_MSR_ID(89, "audio_lrclk_e"), - CLK_MSR_ID(90, "audio_lrclk_d"), - CLK_MSR_ID(91, "audio_lrclk_c"), - CLK_MSR_ID(92, "audio_lrclk_b"), - CLK_MSR_ID(93, "audio_lrclk_a"), - CLK_MSR_ID(94, "audio_sclk_f"), - CLK_MSR_ID(95, "audio_sclk_e"), - CLK_MSR_ID(96, "audio_sclk_d"), - CLK_MSR_ID(97, "audio_sclk_c"), - CLK_MSR_ID(98, "audio_sclk_b"), - CLK_MSR_ID(99, "audio_sclk_a"), - CLK_MSR_ID(100, "audio_mclk_f"), - CLK_MSR_ID(101, "audio_mclk_e"), - CLK_MSR_ID(102, "audio_mclk_d"), - CLK_MSR_ID(103, "audio_mclk_c"), - CLK_MSR_ID(104, "audio_mclk_b"), - CLK_MSR_ID(105, "audio_mclk_a"), - CLK_MSR_ID(106, "pcie_refclk_n"), - CLK_MSR_ID(107, "pcie_refclk_p"), - CLK_MSR_ID(108, "audio_locker_out"), - CLK_MSR_ID(109, "audio_locker_in"), -}; - -static const struct meson_msr_id clk_msr_g12a[] =3D { - CLK_MSR_ID(0, "ring_osc_out_ee_0"), - CLK_MSR_ID(1, "ring_osc_out_ee_1"), - CLK_MSR_ID(2, "ring_osc_out_ee_2"), - CLK_MSR_ID(3, "sys_cpu_ring_osc"), - CLK_MSR_ID(4, "gp0_pll"), - CLK_MSR_ID(6, "enci"), - CLK_MSR_ID(7, "clk81"), - CLK_MSR_ID(8, "encp"), - CLK_MSR_ID(9, "encl"), - CLK_MSR_ID(10, "vdac"), - CLK_MSR_ID(11, "eth_tx"), - CLK_MSR_ID(12, "hifi_pll"), - CLK_MSR_ID(13, "mod_tcon"), - CLK_MSR_ID(14, "fec_0"), - CLK_MSR_ID(15, "fec_1"), - CLK_MSR_ID(16, "fec_2"), - CLK_MSR_ID(17, "sys_pll_div16"), - CLK_MSR_ID(18, "sys_cpu_div16"), - CLK_MSR_ID(19, "lcd_an_ph2"), - CLK_MSR_ID(20, "rtc_osc_out"), - CLK_MSR_ID(21, "lcd_an_ph3"), - CLK_MSR_ID(22, "eth_phy_ref"), - CLK_MSR_ID(23, "mpll_50m"), - CLK_MSR_ID(24, "eth_125m"), - CLK_MSR_ID(25, "eth_rmii"), - CLK_MSR_ID(26, "sc_int"), - CLK_MSR_ID(27, "in_mac"), - CLK_MSR_ID(28, "sar_adc"), - CLK_MSR_ID(29, "pcie_inp"), - CLK_MSR_ID(30, "pcie_inn"), - CLK_MSR_ID(31, "mpll_test_out"), - CLK_MSR_ID(32, "vdec"), - CLK_MSR_ID(33, "sys_cpu_ring_osc_1"), - CLK_MSR_ID(34, "eth_mpll_50m"), - CLK_MSR_ID(35, "mali"), - CLK_MSR_ID(36, "hdmi_tx_pixel"), - CLK_MSR_ID(37, "cdac"), - CLK_MSR_ID(38, "vdin_meas"), - CLK_MSR_ID(39, "bt656"), - CLK_MSR_ID(41, "eth_rx_or_rmii"), - CLK_MSR_ID(42, "mp0_out"), - CLK_MSR_ID(43, "fclk_div5"), - CLK_MSR_ID(44, "pwm_b"), - CLK_MSR_ID(45, "pwm_a"), - CLK_MSR_ID(46, "vpu"), - CLK_MSR_ID(47, "ddr_dpll_pt"), - CLK_MSR_ID(48, "mp1_out"), - CLK_MSR_ID(49, "mp2_out"), - CLK_MSR_ID(50, "mp3_out"), - CLK_MSR_ID(51, "sd_emmc_c"), - CLK_MSR_ID(52, "sd_emmc_b"), - CLK_MSR_ID(53, "sd_emmc_a"), - CLK_MSR_ID(54, "vpu_clkc"), - CLK_MSR_ID(55, "vid_pll_div_out"), - CLK_MSR_ID(56, "wave420l_a"), - CLK_MSR_ID(57, "wave420l_c"), - CLK_MSR_ID(58, "wave420l_b"), - CLK_MSR_ID(59, "hcodec"), - CLK_MSR_ID(61, "gpio_msr"), - CLK_MSR_ID(62, "hevcb"), - CLK_MSR_ID(63, "dsi_meas"), - CLK_MSR_ID(64, "spicc_1"), - CLK_MSR_ID(65, "spicc_0"), - CLK_MSR_ID(66, "vid_lock"), - CLK_MSR_ID(67, "dsi_phy"), - CLK_MSR_ID(68, "hdcp22_esm"), - CLK_MSR_ID(69, "hdcp22_skp"), - CLK_MSR_ID(70, "pwm_f"), - CLK_MSR_ID(71, "pwm_e"), - CLK_MSR_ID(72, "pwm_d"), - CLK_MSR_ID(73, "pwm_c"), - CLK_MSR_ID(75, "hevcf"), - CLK_MSR_ID(77, "rng_ring_osc_0"), - CLK_MSR_ID(78, "rng_ring_osc_1"), - CLK_MSR_ID(79, "rng_ring_osc_2"), - CLK_MSR_ID(80, "rng_ring_osc_3"), - CLK_MSR_ID(81, "vapb"), - CLK_MSR_ID(82, "ge2d"), - CLK_MSR_ID(83, "co_rx"), - CLK_MSR_ID(84, "co_tx"), - CLK_MSR_ID(89, "hdmi_todig"), - CLK_MSR_ID(90, "hdmitx_sys"), - CLK_MSR_ID(91, "sys_cpub_div16"), - CLK_MSR_ID(92, "sys_pll_cpub_div16"), - CLK_MSR_ID(94, "eth_phy_rx"), - CLK_MSR_ID(95, "eth_phy_pll"), - CLK_MSR_ID(96, "vpu_b"), - CLK_MSR_ID(97, "cpu_b_tmp"), - CLK_MSR_ID(98, "ts"), - CLK_MSR_ID(99, "ring_osc_out_ee_3"), - CLK_MSR_ID(100, "ring_osc_out_ee_4"), - CLK_MSR_ID(101, "ring_osc_out_ee_5"), - CLK_MSR_ID(102, "ring_osc_out_ee_6"), - CLK_MSR_ID(103, "ring_osc_out_ee_7"), - CLK_MSR_ID(104, "ring_osc_out_ee_8"), - CLK_MSR_ID(105, "ring_osc_out_ee_9"), - CLK_MSR_ID(106, "ephy_test"), - CLK_MSR_ID(107, "au_dac_g128x"), - CLK_MSR_ID(108, "audio_locker_out"), - CLK_MSR_ID(109, "audio_locker_in"), - CLK_MSR_ID(110, "audio_tdmout_c_sclk"), - CLK_MSR_ID(111, "audio_tdmout_b_sclk"), - CLK_MSR_ID(112, "audio_tdmout_a_sclk"), - CLK_MSR_ID(113, "audio_tdmin_lb_sclk"), - CLK_MSR_ID(114, "audio_tdmin_c_sclk"), - CLK_MSR_ID(115, "audio_tdmin_b_sclk"), - CLK_MSR_ID(116, "audio_tdmin_a_sclk"), - CLK_MSR_ID(117, "audio_resample"), - CLK_MSR_ID(118, "audio_pdm_sys"), - CLK_MSR_ID(119, "audio_spdifout_b"), - CLK_MSR_ID(120, "audio_spdifout"), - CLK_MSR_ID(121, "audio_spdifin"), - CLK_MSR_ID(122, "audio_pdm_dclk"), -}; - -static const struct meson_msr_id clk_msr_sm1[] =3D { - CLK_MSR_ID(0, "ring_osc_out_ee_0"), - CLK_MSR_ID(1, "ring_osc_out_ee_1"), - CLK_MSR_ID(2, "ring_osc_out_ee_2"), - CLK_MSR_ID(3, "ring_osc_out_ee_3"), - CLK_MSR_ID(4, "gp0_pll"), - CLK_MSR_ID(5, "gp1_pll"), - CLK_MSR_ID(6, "enci"), - CLK_MSR_ID(7, "clk81"), - CLK_MSR_ID(8, "encp"), - CLK_MSR_ID(9, "encl"), - CLK_MSR_ID(10, "vdac"), - CLK_MSR_ID(11, "eth_tx"), - CLK_MSR_ID(12, "hifi_pll"), - CLK_MSR_ID(13, "mod_tcon"), - CLK_MSR_ID(14, "fec_0"), - CLK_MSR_ID(15, "fec_1"), - CLK_MSR_ID(16, "fec_2"), - CLK_MSR_ID(17, "sys_pll_div16"), - CLK_MSR_ID(18, "sys_cpu_div16"), - CLK_MSR_ID(19, "lcd_an_ph2"), - CLK_MSR_ID(20, "rtc_osc_out"), - CLK_MSR_ID(21, "lcd_an_ph3"), - CLK_MSR_ID(22, "eth_phy_ref"), - CLK_MSR_ID(23, "mpll_50m"), - CLK_MSR_ID(24, "eth_125m"), - CLK_MSR_ID(25, "eth_rmii"), - CLK_MSR_ID(26, "sc_int"), - CLK_MSR_ID(27, "in_mac"), - CLK_MSR_ID(28, "sar_adc"), - CLK_MSR_ID(29, "pcie_inp"), - CLK_MSR_ID(30, "pcie_inn"), - CLK_MSR_ID(31, "mpll_test_out"), - CLK_MSR_ID(32, "vdec"), - CLK_MSR_ID(34, "eth_mpll_50m"), - CLK_MSR_ID(35, "mali"), - CLK_MSR_ID(36, "hdmi_tx_pixel"), - CLK_MSR_ID(37, "cdac"), - CLK_MSR_ID(38, "vdin_meas"), - CLK_MSR_ID(39, "bt656"), - CLK_MSR_ID(40, "arm_ring_osc_out_4"), - CLK_MSR_ID(41, "eth_rx_or_rmii"), - CLK_MSR_ID(42, "mp0_out"), - CLK_MSR_ID(43, "fclk_div5"), - CLK_MSR_ID(44, "pwm_b"), - CLK_MSR_ID(45, "pwm_a"), - CLK_MSR_ID(46, "vpu"), - CLK_MSR_ID(47, "ddr_dpll_pt"), - CLK_MSR_ID(48, "mp1_out"), - CLK_MSR_ID(49, "mp2_out"), - CLK_MSR_ID(50, "mp3_out"), - CLK_MSR_ID(51, "sd_emmc_c"), - CLK_MSR_ID(52, "sd_emmc_b"), - CLK_MSR_ID(53, "sd_emmc_a"), - CLK_MSR_ID(54, "vpu_clkc"), - CLK_MSR_ID(55, "vid_pll_div_out"), - CLK_MSR_ID(56, "wave420l_a"), - CLK_MSR_ID(57, "wave420l_c"), - CLK_MSR_ID(58, "wave420l_b"), - CLK_MSR_ID(59, "hcodec"), - CLK_MSR_ID(60, "arm_ring_osc_out_5"), - CLK_MSR_ID(61, "gpio_msr"), - CLK_MSR_ID(62, "hevcb"), - CLK_MSR_ID(63, "dsi_meas"), - CLK_MSR_ID(64, "spicc_1"), - CLK_MSR_ID(65, "spicc_0"), - CLK_MSR_ID(66, "vid_lock"), - CLK_MSR_ID(67, "dsi_phy"), - CLK_MSR_ID(68, "hdcp22_esm"), - CLK_MSR_ID(69, "hdcp22_skp"), - CLK_MSR_ID(70, "pwm_f"), - CLK_MSR_ID(71, "pwm_e"), - CLK_MSR_ID(72, "pwm_d"), - CLK_MSR_ID(73, "pwm_c"), - CLK_MSR_ID(74, "arm_ring_osc_out_6"), - CLK_MSR_ID(75, "hevcf"), - CLK_MSR_ID(76, "arm_ring_osc_out_7"), - CLK_MSR_ID(77, "rng_ring_osc_0"), - CLK_MSR_ID(78, "rng_ring_osc_1"), - CLK_MSR_ID(79, "rng_ring_osc_2"), - CLK_MSR_ID(80, "rng_ring_osc_3"), - CLK_MSR_ID(81, "vapb"), - CLK_MSR_ID(82, "ge2d"), - CLK_MSR_ID(83, "co_rx"), - CLK_MSR_ID(84, "co_tx"), - CLK_MSR_ID(85, "arm_ring_osc_out_8"), - CLK_MSR_ID(86, "arm_ring_osc_out_9"), - CLK_MSR_ID(87, "mipi_dsi_phy"), - CLK_MSR_ID(88, "cis2_adapt"), - CLK_MSR_ID(89, "hdmi_todig"), - CLK_MSR_ID(90, "hdmitx_sys"), - CLK_MSR_ID(91, "nna_core"), - CLK_MSR_ID(92, "nna_axi"), - CLK_MSR_ID(93, "vad"), - CLK_MSR_ID(94, "eth_phy_rx"), - CLK_MSR_ID(95, "eth_phy_pll"), - CLK_MSR_ID(96, "vpu_b"), - CLK_MSR_ID(97, "cpu_b_tmp"), - CLK_MSR_ID(98, "ts"), - CLK_MSR_ID(99, "arm_ring_osc_out_10"), - CLK_MSR_ID(100, "arm_ring_osc_out_11"), - CLK_MSR_ID(101, "arm_ring_osc_out_12"), - CLK_MSR_ID(102, "arm_ring_osc_out_13"), - CLK_MSR_ID(103, "arm_ring_osc_out_14"), - CLK_MSR_ID(104, "arm_ring_osc_out_15"), - CLK_MSR_ID(105, "arm_ring_osc_out_16"), - CLK_MSR_ID(106, "ephy_test"), - CLK_MSR_ID(107, "au_dac_g128x"), - CLK_MSR_ID(108, "audio_locker_out"), - CLK_MSR_ID(109, "audio_locker_in"), - CLK_MSR_ID(110, "audio_tdmout_c_sclk"), - CLK_MSR_ID(111, "audio_tdmout_b_sclk"), - CLK_MSR_ID(112, "audio_tdmout_a_sclk"), - CLK_MSR_ID(113, "audio_tdmin_lb_sclk"), - CLK_MSR_ID(114, "audio_tdmin_c_sclk"), - CLK_MSR_ID(115, "audio_tdmin_b_sclk"), - CLK_MSR_ID(116, "audio_tdmin_a_sclk"), - CLK_MSR_ID(117, "audio_resample"), - CLK_MSR_ID(118, "audio_pdm_sys"), - CLK_MSR_ID(119, "audio_spdifout_b"), - CLK_MSR_ID(120, "audio_spdifout"), - CLK_MSR_ID(121, "audio_spdifin"), - CLK_MSR_ID(122, "audio_pdm_dclk"), - CLK_MSR_ID(123, "audio_resampled"), - CLK_MSR_ID(124, "earcrx_pll"), - CLK_MSR_ID(125, "earcrx_pll_test"), - CLK_MSR_ID(126, "csi_phy0"), - CLK_MSR_ID(127, "csi2_data"), -}; - -static const struct meson_msr_id clk_msr_c3[] =3D { - CLK_MSR_ID(0, "sys_clk"), - CLK_MSR_ID(1, "axi_clk"), - CLK_MSR_ID(2, "rtc_clk"), - CLK_MSR_ID(3, "p20_usb2_ckout"), - CLK_MSR_ID(4, "eth_mpll_test"), - CLK_MSR_ID(5, "sys_pll"), - CLK_MSR_ID(6, "cpu_clk_div16"), - CLK_MSR_ID(7, "ts_pll"), - CLK_MSR_ID(8, "fclk_div2"), - CLK_MSR_ID(9, "fclk_div2p5"), - CLK_MSR_ID(10, "fclk_div3"), - CLK_MSR_ID(11, "fclk_div4"), - CLK_MSR_ID(12, "fclk_div5"), - CLK_MSR_ID(13, "fclk_div7"), - CLK_MSR_ID(15, "fclk_50m"), - CLK_MSR_ID(16, "sys_oscin32k_i"), - CLK_MSR_ID(17, "mclk_pll"), - CLK_MSR_ID(19, "hifi_pll"), - CLK_MSR_ID(20, "gp0_pll"), - CLK_MSR_ID(21, "gp1_pll"), - CLK_MSR_ID(22, "eth_mppll_50m_ckout"), - CLK_MSR_ID(23, "sys_pll_div16"), - CLK_MSR_ID(24, "ddr_dpll_pt_clk"), - CLK_MSR_ID(26, "nna_core"), - CLK_MSR_ID(27, "rtc_sec_pulse_out"), - CLK_MSR_ID(28, "rtc_osc_clk_out"), - CLK_MSR_ID(29, "debug_in_clk"), - CLK_MSR_ID(30, "mod_eth_phy_ref_clk"), - CLK_MSR_ID(31, "mod_eth_tx_clk"), - CLK_MSR_ID(32, "eth_125m"), - CLK_MSR_ID(33, "eth_rmii"), - CLK_MSR_ID(34, "co_clkin_to_mac"), - CLK_MSR_ID(36, "co_rx_clk"), - CLK_MSR_ID(37, "co_tx_clk"), - CLK_MSR_ID(38, "eth_phy_rxclk"), - CLK_MSR_ID(39, "eth_phy_plltxclk"), - CLK_MSR_ID(40, "ephy_test_clk"), - CLK_MSR_ID(66, "vapb"), - CLK_MSR_ID(67, "ge2d"), - CLK_MSR_ID(68, "dewarpa"), - CLK_MSR_ID(70, "mipi_dsi_meas"), - CLK_MSR_ID(71, "dsi_phy"), - CLK_MSR_ID(79, "rama"), - CLK_MSR_ID(94, "vc9000e_core"), - CLK_MSR_ID(95, "vc9000e_sys"), - CLK_MSR_ID(96, "vc9000e_aclk"), - CLK_MSR_ID(97, "hcodec"), - CLK_MSR_ID(106, "deskew_pll_clk_div32_out"), - CLK_MSR_ID(107, "mipi_csi_phy_clk_out[0]"), - CLK_MSR_ID(108, "mipi_csi_phy_clk_out[1]"), - CLK_MSR_ID(110, "spifc"), - CLK_MSR_ID(111, "saradc"), - CLK_MSR_ID(112, "ts"), - CLK_MSR_ID(113, "sd_emmc_c"), - CLK_MSR_ID(114, "sd_emmc_b"), - CLK_MSR_ID(115, "sd_emmc_a"), - CLK_MSR_ID(116, "gpio_msr_clk"), - CLK_MSR_ID(117, "spicc_b"), - CLK_MSR_ID(118, "spicc_a"), - CLK_MSR_ID(122, "mod_audio_pdm_dclk_o"), - CLK_MSR_ID(124, "o_earcrx_dmac_clk"), - CLK_MSR_ID(125, "o_earcrx_cmdc_clk"), - CLK_MSR_ID(126, "o_earctx_dmac_clk"), - CLK_MSR_ID(127, "o_earctx_cmdc_clk"), - CLK_MSR_ID(128, "o_tohdmitx_bclk"), - CLK_MSR_ID(129, "o_tohdmitx_mclk"), - CLK_MSR_ID(130, "o_tohdmitx_spdif_clk"), - CLK_MSR_ID(131, "o_toacodec_bclk"), - CLK_MSR_ID(132, "o_toacodec_mclk"), - CLK_MSR_ID(133, "o_spdifout_b_mst_clk"), - CLK_MSR_ID(134, "o_spdifout_mst_clk"), - CLK_MSR_ID(135, "o_spdifin_mst_clk"), - CLK_MSR_ID(136, "o_audio_mclk"), - CLK_MSR_ID(137, "o_vad_clk"), - CLK_MSR_ID(138, "o_tdmout_d_sclk"), - CLK_MSR_ID(139, "o_tdmout_c_sclk"), - CLK_MSR_ID(140, "o_tdmout_b_sclk"), - CLK_MSR_ID(141, "o_tdmout_a_sclk"), - CLK_MSR_ID(142, "o_tdminb_1b_sclk"), - CLK_MSR_ID(143, "o_tdmin_1b_sclk"), - CLK_MSR_ID(144, "o_tdmin_d_sclk"), - CLK_MSR_ID(145, "o_tdmin_c_sclk"), - CLK_MSR_ID(146, "o_tdmin_b_sclk"), - CLK_MSR_ID(147, "o_tdmin_a_sclk"), - CLK_MSR_ID(148, "o_resampleb_clk"), - CLK_MSR_ID(149, "o_resamplea_clk"), - CLK_MSR_ID(150, "o_pdmb_sysclk"), - CLK_MSR_ID(151, "o_pdmb_dclk"), - CLK_MSR_ID(152, "o_pdm_sysclk"), - CLK_MSR_ID(153, "o_pdm_dclk"), - CLK_MSR_ID(154, "c_alockerb_out_clk"), - CLK_MSR_ID(155, "c_alockerb_in_clk"), - CLK_MSR_ID(156, "c_alocker_out_clk"), - CLK_MSR_ID(157, "c_alocker_in_clk"), - CLK_MSR_ID(158, "audio_mst_clk[34]"), - CLK_MSR_ID(159, "audio_mst_clk[35]"), - CLK_MSR_ID(160, "pwm_n"), - CLK_MSR_ID(161, "pwm_m"), - CLK_MSR_ID(162, "pwm_l"), - CLK_MSR_ID(163, "pwm_k"), - CLK_MSR_ID(164, "pwm_j"), - CLK_MSR_ID(165, "pwm_i"), - CLK_MSR_ID(166, "pwm_h"), - CLK_MSR_ID(167, "pwm_g"), - CLK_MSR_ID(168, "pwm_f"), - CLK_MSR_ID(169, "pwm_e"), - CLK_MSR_ID(170, "pwm_d"), - CLK_MSR_ID(171, "pwm_c"), - CLK_MSR_ID(172, "pwm_b"), - CLK_MSR_ID(173, "pwm_a"), - CLK_MSR_ID(174, "AU_DAC1_CLK_TO_GPIO"), - CLK_MSR_ID(175, "AU_ADC_CLK_TO_GPIO"), - CLK_MSR_ID(176, "rng_ring_osc_clk[0]"), - CLK_MSR_ID(177, "rng_ring_osc_clk[1]"), - CLK_MSR_ID(178, "rng_ring_osc_clk[2]"), - CLK_MSR_ID(179, "rng_ring_osc_clk[3]"), - CLK_MSR_ID(180, "sys_cpu_ring_osc_clk[0]"), - CLK_MSR_ID(181, "sys_cpu_ring_osc_clk[1]"), - CLK_MSR_ID(182, "sys_cpu_ring_osc_clk[2]"), - CLK_MSR_ID(183, "sys_cpu_ring_osc_clk[3]"), - CLK_MSR_ID(184, "sys_cpu_ring_osc_clk[4]"), - CLK_MSR_ID(185, "sys_cpu_ring_osc_clk[5]"), - CLK_MSR_ID(186, "sys_cpu_ring_osc_clk[6]"), - CLK_MSR_ID(187, "sys_cpu_ring_osc_clk[7]"), - CLK_MSR_ID(188, "sys_cpu_ring_osc_clk[8]"), - CLK_MSR_ID(189, "sys_cpu_ring_osc_clk[9]"), - CLK_MSR_ID(190, "sys_cpu_ring_osc_clk[10]"), - CLK_MSR_ID(191, "sys_cpu_ring_osc_clk[11]"), - CLK_MSR_ID(192, "am_ring_osc_clk_out[12](dmc)"), - CLK_MSR_ID(193, "am_ring_osc_clk_out[13](rama)"), - CLK_MSR_ID(194, "am_ring_osc_clk_out[14](nna)"), - CLK_MSR_ID(195, "am_ring_osc_clk_out[15](nna)"), - CLK_MSR_ID(200, "rng_ring_osc_clk_1[0]"), - CLK_MSR_ID(201, "rng_ring_osc_clk_1[1]"), - CLK_MSR_ID(202, "rng_ring_osc_clk_1[2]"), - CLK_MSR_ID(203, "rng_ring_osc_clk_1[3]"), - -}; - -static const struct meson_msr_id clk_msr_s4[] =3D { - CLK_MSR_ID(0, "sys_clk"), - CLK_MSR_ID(1, "axi_clk"), - CLK_MSR_ID(2, "rtc_clk"), - CLK_MSR_ID(5, "mali"), - CLK_MSR_ID(6, "cpu_clk_div16"), - CLK_MSR_ID(7, "ceca_clk"), - CLK_MSR_ID(8, "cecb_clk"), - CLK_MSR_ID(10, "fclk_div5"), - CLK_MSR_ID(11, "mpll0"), - CLK_MSR_ID(12, "mpll1"), - CLK_MSR_ID(13, "mpll2"), - CLK_MSR_ID(14, "mpll3"), - CLK_MSR_ID(15, "fclk_50m"), - CLK_MSR_ID(16, "pcie_clk_inp"), - CLK_MSR_ID(17, "pcie_clk_inn"), - CLK_MSR_ID(18, "mpll_clk_test_out"), - CLK_MSR_ID(19, "hifi_pll"), - CLK_MSR_ID(20, "gp0_pll"), - CLK_MSR_ID(21, "gp1_pll"), - CLK_MSR_ID(22, "eth_mppll_50m_ckout"), - CLK_MSR_ID(23, "sys_pll_div16"), - CLK_MSR_ID(24, "ddr_dpll_pt_clk"), - CLK_MSR_ID(30, "mod_eth_phy_ref_clk"), - CLK_MSR_ID(31, "mod_eth_tx_clk"), - CLK_MSR_ID(32, "eth_125m"), - CLK_MSR_ID(33, "eth_rmii"), - CLK_MSR_ID(34, "co_clkin_to_mac"), - CLK_MSR_ID(35, "mod_eth_rx_clk_rmii"), - CLK_MSR_ID(36, "co_rx_clk"), - CLK_MSR_ID(37, "co_tx_clk"), - CLK_MSR_ID(38, "eth_phy_rxclk"), - CLK_MSR_ID(39, "eth_phy_plltxclk"), - CLK_MSR_ID(40, "ephy_test_clk"), - CLK_MSR_ID(50, "vid_pll_div_clk_out"), - CLK_MSR_ID(51, "enci"), - CLK_MSR_ID(52, "encp"), - CLK_MSR_ID(53, "encl"), - CLK_MSR_ID(54, "vdac"), - CLK_MSR_ID(55, "cdac_clk_c"), - CLK_MSR_ID(56, "mod_tcon_clko"), - CLK_MSR_ID(57, "lcd_an_clk_ph2"), - CLK_MSR_ID(58, "lcd_an_clk_ph3"), - CLK_MSR_ID(59, "hdmitx_pixel"), - CLK_MSR_ID(60, "vdin_meas"), - CLK_MSR_ID(61, "vpu"), - CLK_MSR_ID(62, "vpu_clkb"), - CLK_MSR_ID(63, "vpu_clkb_tmp"), - CLK_MSR_ID(64, "vpu_clkc"), - CLK_MSR_ID(65, "vid_lock"), - CLK_MSR_ID(66, "vapb"), - CLK_MSR_ID(67, "ge2d"), - CLK_MSR_ID(68, "cts_hdcp22_esmclk"), - CLK_MSR_ID(69, "cts_hdcp22_skpclk"), - CLK_MSR_ID(76, "hdmitx_tmds"), - CLK_MSR_ID(77, "hdmitx_sys_clk"), - CLK_MSR_ID(78, "hdmitx_fe_clk"), - CLK_MSR_ID(79, "rama"), - CLK_MSR_ID(93, "vdec"), - CLK_MSR_ID(99, "hevcf"), - CLK_MSR_ID(100, "demod_core"), - CLK_MSR_ID(101, "adc_extclk_in"), - CLK_MSR_ID(102, "cts_demod_core_t2_clk"), - CLK_MSR_ID(103, "adc_dpll_intclk"), - CLK_MSR_ID(104, "adc_dpll_clk_b3"), - CLK_MSR_ID(105, "s2_adc_clk"), - CLK_MSR_ID(106, "deskew_pll_clk_div32_out"), - CLK_MSR_ID(110, "sc"), - CLK_MSR_ID(111, "sar_adc"), - CLK_MSR_ID(113, "sd_emmc_c"), - CLK_MSR_ID(114, "sd_emmc_b"), - CLK_MSR_ID(115, "sd_emmc_a"), - CLK_MSR_ID(116, "gpio_msr_clk"), - CLK_MSR_ID(118, "spicc0"), - CLK_MSR_ID(121, "ts"), - CLK_MSR_ID(130, "audio_vad_clk"), - CLK_MSR_ID(131, "acodec_dac_clk_x128"), - CLK_MSR_ID(132, "audio_locker_in_clk"), - CLK_MSR_ID(133, "audio_locker_out_clk"), - CLK_MSR_ID(134, "audio_tdmout_c_sclk"), - CLK_MSR_ID(135, "audio_tdmout_b_sclk"), - CLK_MSR_ID(136, "audio_tdmout_a_sclk"), - CLK_MSR_ID(137, "audio_tdmin_lb_sclk"), - CLK_MSR_ID(138, "audio_tdmin_c_sclk"), - CLK_MSR_ID(139, "audio_tdmin_b_sclk"), - CLK_MSR_ID(140, "audio_tdmin_a_sclk"), - CLK_MSR_ID(141, "audio_resamplea_clk"), - CLK_MSR_ID(142, "audio_pdm_sysclk"), - CLK_MSR_ID(143, "audio_spdifout_b_mst_clk"), - CLK_MSR_ID(144, "audio_spdifout_mst_clk"), - CLK_MSR_ID(145, "audio_spdifin_mst_clk"), - CLK_MSR_ID(146, "audio_pdm_dclk"), - CLK_MSR_ID(147, "audio_resampleb_clk"), - CLK_MSR_ID(160, "pwm_j"), - CLK_MSR_ID(161, "pwm_i"), - CLK_MSR_ID(162, "pwm_h"), - CLK_MSR_ID(163, "pwm_g"), - CLK_MSR_ID(164, "pwm_f"), - CLK_MSR_ID(165, "pwm_e"), - CLK_MSR_ID(166, "pwm_d"), - CLK_MSR_ID(167, "pwm_c"), - CLK_MSR_ID(168, "pwm_b"), - CLK_MSR_ID(169, "pwm_a"), - CLK_MSR_ID(176, "rng_ring_0"), - CLK_MSR_ID(177, "rng_ring_1"), - CLK_MSR_ID(178, "rng_ring_2"), - CLK_MSR_ID(179, "rng_ring_3"), - CLK_MSR_ID(180, "dmc_osc_ring(LVT16)"), - CLK_MSR_ID(181, "gpu_osc_ring0(LVT16)"), - CLK_MSR_ID(182, "gpu_osc_ring1(ULVT16)"), - CLK_MSR_ID(183, "gpu_osc_ring2(SLVT16)"), - CLK_MSR_ID(184, "vpu_osc_ring0(SVT24)"), - CLK_MSR_ID(185, "vpu_osc_ring1(LVT20)"), - CLK_MSR_ID(186, "vpu_osc_ring2(LVT16)"), - CLK_MSR_ID(187, "dos_osc_ring0(SVT24)"), - CLK_MSR_ID(188, "dos_osc_ring1(SVT16)"), - CLK_MSR_ID(189, "dos_osc_ring2(LVT16)"), - CLK_MSR_ID(190, "dos_osc_ring3(ULVT20)"), - CLK_MSR_ID(192, "axi_sram_osc_ring(SVT16)"), - CLK_MSR_ID(193, "demod_osc_ring0"), - CLK_MSR_ID(194, "demod_osc_ring1"), - CLK_MSR_ID(195, "sar_osc_ring"), - CLK_MSR_ID(196, "sys_cpu_osc_ring0"), - CLK_MSR_ID(197, "sys_cpu_osc_ring1"), - CLK_MSR_ID(198, "sys_cpu_osc_ring2"), - CLK_MSR_ID(199, "sys_cpu_osc_ring3"), - CLK_MSR_ID(200, "sys_cpu_osc_ring4"), - CLK_MSR_ID(201, "sys_cpu_osc_ring5"), - CLK_MSR_ID(202, "sys_cpu_osc_ring6"), - CLK_MSR_ID(203, "sys_cpu_osc_ring7"), - CLK_MSR_ID(204, "sys_cpu_osc_ring8"), - CLK_MSR_ID(205, "sys_cpu_osc_ring9"), - CLK_MSR_ID(206, "sys_cpu_osc_ring10"), - CLK_MSR_ID(207, "sys_cpu_osc_ring11"), - CLK_MSR_ID(208, "sys_cpu_osc_ring12"), - CLK_MSR_ID(209, "sys_cpu_osc_ring13"), - CLK_MSR_ID(210, "sys_cpu_osc_ring14"), - CLK_MSR_ID(211, "sys_cpu_osc_ring15"), - CLK_MSR_ID(212, "sys_cpu_osc_ring16"), - CLK_MSR_ID(213, "sys_cpu_osc_ring17"), - CLK_MSR_ID(214, "sys_cpu_osc_ring18"), - CLK_MSR_ID(215, "sys_cpu_osc_ring19"), - CLK_MSR_ID(216, "sys_cpu_osc_ring20"), - CLK_MSR_ID(217, "sys_cpu_osc_ring21"), - CLK_MSR_ID(218, "sys_cpu_osc_ring22"), - CLK_MSR_ID(219, "sys_cpu_osc_ring23"), - CLK_MSR_ID(220, "sys_cpu_osc_ring24"), - CLK_MSR_ID(221, "sys_cpu_osc_ring25"), - CLK_MSR_ID(222, "sys_cpu_osc_ring26"), - CLK_MSR_ID(223, "sys_cpu_osc_ring27"), - + struct meson_msr_data *data; }; =20 static int meson_measure_id(struct meson_msr_id *clk_msr_id, unsigned int duration) { struct meson_msr *priv =3D clk_msr_id->priv; - const struct msr_reg_offset *reg =3D priv->data.reg; + const struct msr_reg_offset *reg =3D priv->data->reg; unsigned int val; int ret; =20 @@ -882,7 +147,7 @@ DEFINE_SHOW_ATTRIBUTE(clk_msr); static int clk_msr_summary_show(struct seq_file *s, void *data) { struct meson_msr_id *msr_table =3D s->private; - unsigned int msr_count =3D msr_table->priv->data.msr_count; + unsigned int msr_count =3D msr_table->priv->data->msr_count; unsigned int precision =3D 0; int val, i; =20 @@ -905,6 +170,68 @@ static int clk_msr_summary_show(struct seq_file *s, vo= id *data) } DEFINE_SHOW_ATTRIBUTE(clk_msr_summary); =20 +static const struct msr_reg_offset msr_reg_offset =3D { + .duty_val =3D 0x0, + .freq_ctrl =3D 0x4, + .duty_ctrl =3D 0x8, + .freq_val =3D 0xc, +}; + +static const struct msr_reg_offset msr_reg_offset_v2 =3D { + .freq_ctrl =3D 0x0, + .duty_ctrl =3D 0x4, + .freq_val =3D 0x8, + .duty_val =3D 0x18, +}; + +static struct meson_msr_data *of_get_clkmsr_table(struct device *dev, + struct device_node *node, + struct meson_msr *priv) +{ + struct meson_msr_data *msr_data; + int id_count =3D of_property_count_u32_elems(node, "clkmsr-indices"); + int i, ret; + + if (id_count <=3D 0) + return NULL; + + msr_data =3D devm_kzalloc(dev, sizeof(*msr_data), GFP_KERNEL); + if (!msr_data) + return ERR_PTR(-ENOMEM); + + msr_data->msr_count =3D id_count; + msr_data->msr_table =3D devm_kcalloc(dev, id_count, + sizeof(struct meson_msr_id), + GFP_KERNEL); + if (!msr_data->msr_table) + return ERR_PTR(ENOMEM); + + for (i =3D 0; i < id_count; i++) { + ret =3D of_property_read_u32_index(node, "clkmsr-indices", i, + &msr_data->msr_table[i].id); + if (ret) { + dev_err(dev, "Invalid clkmsr-indices, index =3D %d\n", i); + return ERR_PTR(ret); + } + + ret =3D of_property_read_string_index(node, "clkmsr-names", i, + &msr_data->msr_table[i].name); + if (ret) { + dev_err(dev, "Invalid clkmsr-names, index =3D %d\n", i); + return ERR_PTR(ret); + } + + msr_data->msr_table[i].priv =3D priv; + } + + if (of_property_present(node, "clkmsr-reg-v2")) + msr_data->reg =3D &msr_reg_offset_v2; + else + msr_data->reg =3D &msr_reg_offset; + + return msr_data; +} + static struct regmap_config meson_clk_msr_regmap_config =3D { .reg_bits =3D 32, .val_bits =3D 32, @@ -913,7 +240,7 @@ static struct regmap_config meson_clk_msr_regmap_config= =3D { =20 static int meson_msr_probe(struct platform_device *pdev) { - const struct meson_msr_data *match_data; + struct meson_msr_data *match_data; struct meson_msr *priv; struct dentry *root, *clks; struct resource *res; @@ -925,23 +252,13 @@ static int meson_msr_probe(struct platform_device *pd= ev) if (!priv) return -ENOMEM; =20 - match_data =3D device_get_match_data(&pdev->dev); - if (!match_data) { + match_data =3D of_get_clkmsr_table(&pdev->dev, dev_of_node(&pdev->dev), + priv); + if (IS_ERR_OR_NULL(match_data)) { dev_err(&pdev->dev, "failed to get match data\n"); - return -ENODEV; + return PTR_ERR(match_data); } =20 - priv->data.msr_table =3D devm_kcalloc(&pdev->dev, - match_data->msr_count, - sizeof(struct meson_msr_id), - GFP_KERNEL); - if (!priv->data.msr_table) - return -ENOMEM; - - memcpy(priv->data.msr_table, match_data->msr_table, - match_data->msr_count * sizeof(struct meson_msr_id)); - priv->data.msr_count =3D match_data->msr_count; - base =3D devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(base)) return PTR_ERR(base); @@ -952,121 +269,51 @@ static int meson_msr_probe(struct platform_device *p= dev) if (IS_ERR(priv->regmap)) return PTR_ERR(priv->regmap); =20 - priv->data.reg =3D devm_kzalloc(&pdev->dev, sizeof(struct msr_reg_offset), - GFP_KERNEL); - if (!priv->data.reg) - return -ENOMEM; - - memcpy((void *)priv->data.reg, match_data->reg, - sizeof(struct msr_reg_offset)); + priv->data =3D match_data; =20 root =3D debugfs_create_dir("meson-clk-msr", NULL); clks =3D debugfs_create_dir("clks", root); =20 debugfs_create_file("measure_summary", 0444, root, - priv->data.msr_table, &clk_msr_summary_fops); + priv->data->msr_table, &clk_msr_summary_fops); =20 - for (i =3D 0 ; i < priv->data.msr_count ; ++i) { - if (!priv->data.msr_table[i].name) + for (i =3D 0 ; i < priv->data->msr_count ; ++i) { + if (!priv->data->msr_table[i].name) continue; =20 - priv->data.msr_table[i].priv =3D priv; + priv->data->msr_table[i].priv =3D priv; =20 - debugfs_create_file(priv->data.msr_table[i].name, 0444, clks, - &priv->data.msr_table[i], &clk_msr_fops); + debugfs_create_file(priv->data->msr_table[i].name, 0444, clks, + &priv->data->msr_table[i], &clk_msr_fops); } =20 return 0; } =20 -static const struct msr_reg_offset msr_reg_offset =3D { - .duty_val =3D 0x0, - .freq_ctrl =3D 0x4, - .duty_ctrl =3D 0x8, - .freq_val =3D 0xc, -}; - -static const struct meson_msr_data clk_msr_gx_data =3D { - .msr_table =3D (void *)clk_msr_gx, - .msr_count =3D ARRAY_SIZE(clk_msr_gx), - .reg =3D &msr_reg_offset, -}; - -static const struct meson_msr_data clk_msr_m8_data =3D { - .msr_table =3D (void *)clk_msr_m8, - .msr_count =3D ARRAY_SIZE(clk_msr_m8), - .reg =3D &msr_reg_offset, -}; - -static const struct meson_msr_data clk_msr_axg_data =3D { - .msr_table =3D (void *)clk_msr_axg, - .msr_count =3D ARRAY_SIZE(clk_msr_axg), - .reg =3D &msr_reg_offset, -}; - -static const struct meson_msr_data clk_msr_g12a_data =3D { - .msr_table =3D (void *)clk_msr_g12a, - .msr_count =3D ARRAY_SIZE(clk_msr_g12a), - .reg =3D &msr_reg_offset, -}; - -static const struct meson_msr_data clk_msr_sm1_data =3D { - .msr_table =3D (void *)clk_msr_sm1, - .msr_count =3D ARRAY_SIZE(clk_msr_sm1), - .reg =3D &msr_reg_offset, -}; - -static const struct msr_reg_offset msr_reg_offset_v2 =3D { - .freq_ctrl =3D 0x0, - .duty_ctrl =3D 0x4, - .freq_val =3D 0x8, - .duty_val =3D 0x18, -}; - -static const struct meson_msr_data clk_msr_c3_data =3D { - .msr_table =3D (void *)clk_msr_c3, - .msr_count =3D ARRAY_SIZE(clk_msr_c3), - .reg =3D &msr_reg_offset_v2, -}; - -static const struct meson_msr_data clk_msr_s4_data =3D { - .msr_table =3D (void *)clk_msr_s4, - .msr_count =3D ARRAY_SIZE(clk_msr_s4), - .reg =3D &msr_reg_offset_v2, -}; - static const struct of_device_id meson_msr_match_table[] =3D { { .compatible =3D "amlogic,meson-gx-clk-measure", - .data =3D &clk_msr_gx_data, }, { .compatible =3D "amlogic,meson8-clk-measure", - .data =3D &clk_msr_m8_data, }, { .compatible =3D "amlogic,meson8b-clk-measure", - .data =3D &clk_msr_m8_data, }, { .compatible =3D "amlogic,meson-axg-clk-measure", - .data =3D &clk_msr_axg_data, }, { .compatible =3D "amlogic,meson-g12a-clk-measure", - .data =3D &clk_msr_g12a_data, }, { .compatible =3D "amlogic,meson-sm1-clk-measure", - .data =3D &clk_msr_sm1_data, }, { .compatible =3D "amlogic,c3-clk-measure", - .data =3D &clk_msr_c3_data, }, { .compatible =3D "amlogic,s4-clk-measure", - .data =3D &clk_msr_s4_data, }, { /* sentinel */ } }; --=20 2.42.0 From nobody Sat Oct 4 14:13:12 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A5073225A4F; Fri, 15 Aug 2025 08:37:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247061; cv=none; b=iN6+knmcC8+26DhOzIXRmHzKIb05nI/2F3RAXCzLx5rLhtE5e8e+u/N6/56XiBqjUZLnAEeLCigE5lsRy0tG6dl2vyxaXsJAX0DfPvwwVtPKxrw+cRYO5Cy7l28FIJN8xnKc3sSGX8DS8XqhTU/bn20tynEI8WPejOi8t2S1A1M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247061; c=relaxed/simple; bh=Vag6wGtu+suGJmuhRU5XEAgwSSUZw7icX5H63EyrARo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=fnzznP/7pOJ/W1SyO8B18kbsyJGiq3Ni547zecfA/cTdZi2RxyTKhHIRWL2zheXwI8tI85+WOwruIRbG9DaeXOxXlkQcnUx/PqQlydQGbbJyvsgaB4CEFNdvDi+u6PKKyV9sqodEpZ5KcugsO9lvug5eWyQ91Ke/DbLeFRvUrEg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=KIQskRPg; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KIQskRPg" Received: by smtp.kernel.org (Postfix) with ESMTPS id 53C51C4CEF8; Fri, 15 Aug 2025 08:37:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1755247061; bh=Vag6wGtu+suGJmuhRU5XEAgwSSUZw7icX5H63EyrARo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=KIQskRPgr6ey4+Awv/m0V64oz39jwPYMPXd1XTv6HGMo5WEpP8w85zi1I2oj9plPH J5rsm1lujvG0oD8qFCDli1psAJfGj+Ka48zYGTKJYxO2ydYUN8NXJca3XtY1Qpnmtu cSESLT6PA84R449Wp9s10ozeMHgfw19Gjf743SFcS1Fr0PEH6oJhOsZXZkJvOhHbyK biDfQuk5YNf8xzrK7fqhF9XB/LLx0w9soSmzUULL8UvtfS2R9/bML2a877ok2TV/n0 01PDMryhqYi5Kcls1LB+JXgPwQX1Iai7nzyu8xgMZHf2w2ac53wHsTypor4fzPZtw1 8+gn0jdj/bl2Q== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47018CA0EE0; Fri, 15 Aug 2025 08:37:41 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 15 Aug 2025 16:37:29 +0800 Subject: [PATCH 03/13] ARM: dts: amlogic: add clk-measure IDs and names for meson SoC family Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250815-add-more-socs-to-support-clk_measure-v1-3-59f04ba67457@amlogic.com> References: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> In-Reply-To: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755247057; l=4791; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=l3K7Yyi1QbVnRco0ODiFhzNHVuFGmS+WerLaTtYEH3c=; b=TrZmR2cg/qIqhAS3j+OceUmOc0G8xq6bmRF+Evy0oSHZU1h9Vjc2E1+VmdaPFXyyHZ4HCSZov /hyPeKpDH24CCDnFx0uECIES85Ac/7fJn4dTJFn+lMSTbVaj3RbnT2I X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu In the clk-measure driver, the method has been changed to obtain the supported IDs and their corresponding names for SoC clk-measure through DTS, adding support for mes8 and mes8b here. Signed-off-by: Chuan Liu --- arch/arm/boot/dts/amlogic/meson8.dtsi | 92 ++++++++++++++++++++++++++++++= ++++ arch/arm/boot/dts/amlogic/meson8b.dtsi | 92 ++++++++++++++++++++++++++++++= ++++ 2 files changed, 184 insertions(+) diff --git a/arch/arm/boot/dts/amlogic/meson8.dtsi b/arch/arm/boot/dts/amlo= gic/meson8.dtsi index a609b5a0fda4..2f9ecd2eb4cf 100644 --- a/arch/arm/boot/dts/amlogic/meson8.dtsi +++ b/arch/arm/boot/dts/amlogic/meson8.dtsi @@ -462,6 +462,98 @@ pwm_ef: pwm@86c0 { clock-measure@8758 { compatible =3D "amlogic,meson8-clk-measure"; reg =3D <0x8758 0x1c>; + clkmsr-indices =3D <0>, + <1>, + <2>, + <3>, + <6>, + <7>, + <8>, + <9>, + <11>, + <13>, + <14>, + <15>, + <16>, + <18>, + <19>, + <20>, + <21>, + <22>, + <23>, + <24>, + <26>, + <28>, + <30>, + <31>, + <32>, + <33>, + <34>, + <35>, + <36>, + <38>, + <39>, + <40>, + <41>, + <42>, + <43>, + <44>, + <45>, + <46>, + <47>, + <48>, + <49>, + <59>, + <60>, + <61>, + <62>, + <63>; + clkmsr-names =3D "ring_osc_out_ee0", + "ring_osc_out_ee1", + "ring_osc_out_ee2", + "a9_ring_osck", + "vid_pll", + "clk81", + "encp", + "encl", + "eth_rmii", + "amclk", + "fec_clk_0", + "fec_clk_1", + "fec_clk_2", + "a9_clk_div16", + "hdmi_sys", + "rtc_osc_clk_out", + "i2s_clk_in_src0", + "clk_rmii_from_pad", + "hdmi_ch0_tmds", + "lvds_fifo", + "sc_clk_int", + "sar_adc", + "mpll_clk_test_out", + "audac_clkpi", + "vdac", + "sdhc_rx", + "sdhc_sd", + "mali", + "hdmi_tx_pixel", + "vdin_meas", + "pcm_sclk", + "pcm_mclk", + "eth_rx_tx", + "pwm_d", + "pwm_c", + "pwm_b", + "pwm_a", + "pcm2_sclk", + "ddr_dpll_pt", + "pwm_f", + "pwm_e", + "hcodec", + "usb_32k_alt", + "gpio", + "vid2_pll", + "mipi_csi_cfg"; }; =20 pinctrl_cbus: pinctrl@8030 { diff --git a/arch/arm/boot/dts/amlogic/meson8b.dtsi b/arch/arm/boot/dts/aml= ogic/meson8b.dtsi index 2d77b9876bf4..74fd000569a2 100644 --- a/arch/arm/boot/dts/amlogic/meson8b.dtsi +++ b/arch/arm/boot/dts/amlogic/meson8b.dtsi @@ -416,6 +416,98 @@ pwm_ef: pwm@86c0 { clock-measure@8758 { compatible =3D "amlogic,meson8b-clk-measure"; reg =3D <0x8758 0x1c>; + clkmsr-indices =3D <0>, + <1>, + <2>, + <3>, + <6>, + <7>, + <8>, + <9>, + <11>, + <13>, + <14>, + <15>, + <16>, + <18>, + <19>, + <20>, + <21>, + <22>, + <23>, + <24>, + <26>, + <28>, + <30>, + <31>, + <32>, + <33>, + <34>, + <35>, + <36>, + <38>, + <39>, + <40>, + <41>, + <42>, + <43>, + <44>, + <45>, + <46>, + <47>, + <48>, + <49>, + <59>, + <60>, + <61>, + <62>, + <63>; + clkmsr-names =3D "ring_osc_out_ee0", + "ring_osc_out_ee1", + "ring_osc_out_ee2", + "a9_ring_osck", + "vid_pll", + "clk81", + "encp", + "encl", + "eth_rmii", + "amclk", + "fec_clk_0", + "fec_clk_1", + "fec_clk_2", + "a9_clk_div16", + "hdmi_sys", + "rtc_osc_clk_out", + "i2s_clk_in_src0", + "clk_rmii_from_pad", + "hdmi_ch0_tmds", + "lvds_fifo", + "sc_clk_int", + "sar_adc", + "mpll_clk_test_out", + "audac_clkpi", + "vdac", + "sdhc_rx", + "sdhc_sd", + "mali", + "hdmi_tx_pixel", + "vdin_meas", + "pcm_sclk", + "pcm_mclk", + "eth_rx_tx", + "pwm_d", + "pwm_c", + "pwm_b", + "pwm_a", + "pcm2_sclk", + "ddr_dpll_pt", + "pwm_f", + "pwm_e", + "hcodec", + "usb_32k_alt", + "gpio", + "vid2_pll", + "mipi_csi_cfg"; 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Fri, 15 Aug 2025 08:37:41 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 15 Aug 2025 16:37:30 +0800 Subject: [PATCH 04/13] arm64: dts: amlogic: add clk-measure IDs and names for Amlogic SoCs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250815-add-more-socs-to-support-clk_measure-v1-4-59f04ba67457@amlogic.com> References: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> In-Reply-To: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755247057; l=31530; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=/74iuxDUmjR0pQ+YGmzEFkR8awBm8pZpSTOR7ZHIEkU=; b=4vRtJBQugrcnbJVCOYi5eembF4REhc4su+qKhn4hnOLzKlJAWMTHTQcE4dD/5vFPJBMqn1yy0 0rbDR6iDLttAKatI87j+TsH8yz7ZfAYSgmqRmOGwsxANi0TEJX/ZvoL X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add clk-measure IDs and names to the DTS of all Amlogic SoCs. Signed-off-by: Chuan Liu --- arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi | 273 +++++++++++++++++++++++++ arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 142 +++++++++++++ arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 229 +++++++++++++++++++++ arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 134 +++++++++++++ arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 299 ++++++++++++++++++++++++= ++++ arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 254 +++++++++++++++++++++++ 6 files changed, 1331 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-c3.dtsi index cb9ea3ca6ee0..ab9ebabce171 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi @@ -763,6 +763,279 @@ internal_ephy: ethernet_phy@8 { clk_msr: clock-measure@48000 { compatible =3D "amlogic,c3-clk-measure"; reg =3D <0x0 0x48000 0x0 0x1c>; + clkmsr-reg-v2; + clkmsr-indices =3D <0>, + <1>, + <2>, + <3>, + <4>, + <5>, + <6>, + <7>, + <8>, + <9>, + <10>, + <11>, + <12>, + <13>, + <15>, + <16>, + <17>, + <19>, + <20>, + <21>, + <22>, + <23>, + <24>, + <26>, + <27>, + <28>, + <29>, + <30>, + <31>, + <32>, + <33>, + <34>, + <36>, + <37>, + <38>, + <39>, + <40>, + <66>, + <67>, + <68>, + <70>, + <71>, + <79>, + <94>, + <95>, + <96>, + <97>, + <106>, + <107>, + <108>, + <110>, + <111>, + <112>, + <113>, + <114>, + <115>, + <116>, + <117>, + <118>, + <122>, + <124>, + <125>, + <126>, + <127>, + <128>, + <129>, + <130>, + <131>, + <132>, + <133>, + <134>, + <135>, + <136>, + <137>, + <138>, + <139>, + <140>, + <141>, + <142>, + <143>, + <144>, + <145>, + <146>, + <147>, + <148>, + <149>, + <150>, + <151>, + <152>, + <153>, + <154>, + <155>, + <156>, + <157>, + <158>, + <159>, + <160>, + <161>, + <162>, + <163>, + <164>, + <165>, + <166>, + <167>, + <168>, + <169>, + <170>, + <171>, + <172>, + <173>, + <174>, + <175>, + <176>, + <177>, + <178>, + <179>, + <180>, + <181>, + <182>, + <183>, + <184>, + <185>, + <186>, + <187>, + <188>, + <189>, + <190>, + <191>, + <192>, + <193>, + <194>, + <195>, + <200>, + <201>, + <202>, + <203>; + clkmsr-names =3D "sys_clk", + "axi_clk", + "rtc_clk", + "p20_usb2_ckout", + "eth_mpll_test", + "sys_pll", + "cpu_clk_div16", + "ts_pll", + "fclk_div2", + "fclk_div2p5", + "fclk_div3", + "fclk_div4", + "fclk_div5", + "fclk_div7", + "fclk_50m", + "sys_oscin32k_i", + "mclk_pll", + "hifi_pll", + "gp0_pll", + "gp1_pll", + "eth_mppll_50m_ckout", + "sys_pll_div16", + "ddr_dpll_pt_clk", + "nna_core", + "rtc_sec_pulse_out", + "rtc_osc_clk_out", + "debug_in_clk", + "mod_eth_phy_ref_clk", + "mod_eth_tx_clk", + "eth_125m", + "eth_rmii", + "co_clkin_to_mac", + "co_rx_clk", + "co_tx_clk", + "eth_phy_rxclk", + "eth_phy_plltxclk", + "ephy_test_clk", + "vapb", + "ge2d", + "dewarpa", + "mipi_dsi_meas", + "dsi_phy", + "rama", + "vc9000e_core", + "vc9000e_sys", + "vc9000e_aclk", + "hcodec", + "deskew_pll_clk_div32_out", + "mipi_csi_phy_clk_out[0]", + "mipi_csi_phy_clk_out[1]", + "spifc", + "saradc", + "ts", + "sd_emmc_c", + "sd_emmc_b", + "sd_emmc_a", + "gpio_msr_clk", + "spicc_b", + "spicc_a", + "mod_audio_pdm_dclk_o", + "o_earcrx_dmac_clk", + "o_earcrx_cmdc_clk", + "o_earctx_dmac_clk", + "o_earctx_cmdc_clk", + "o_tohdmitx_bclk", + "o_tohdmitx_mclk", + "o_tohdmitx_spdif_clk", + "o_toacodec_bclk", + "o_toacodec_mclk", + "o_spdifout_b_mst_clk", + "o_spdifout_mst_clk", + "o_spdifin_mst_clk", + "o_audio_mclk", + "o_vad_clk", + "o_tdmout_d_sclk", + "o_tdmout_c_sclk", + "o_tdmout_b_sclk", + "o_tdmout_a_sclk", + "o_tdminb_1b_sclk", + "o_tdmin_1b_sclk", + "o_tdmin_d_sclk", + "o_tdmin_c_sclk", + "o_tdmin_b_sclk", + "o_tdmin_a_sclk", + "o_resampleb_clk", + "o_resamplea_clk", + "o_pdmb_sysclk", + "o_pdmb_dclk", + "o_pdm_sysclk", + "o_pdm_dclk", + "c_alockerb_out_clk", + "c_alockerb_in_clk", + "c_alocker_out_clk", + "c_alocker_in_clk", + "audio_mst_clk[34]", + "audio_mst_clk[35]", + "pwm_n", + "pwm_m", + "pwm_l", + "pwm_k", + "pwm_j", + "pwm_i", + "pwm_h", + "pwm_g", + "pwm_f", + "pwm_e", + "pwm_d", + "pwm_c", + "pwm_b", + "pwm_a", + "AU_DAC1_CLK_TO_GPIO", + "AU_ADC_CLK_TO_GPIO", + "rng_ring_osc_clk[0]", + "rng_ring_osc_clk[1]", + "rng_ring_osc_clk[2]", + "rng_ring_osc_clk[3]", + "sys_cpu_ring_osc_clk[0]", + "sys_cpu_ring_osc_clk[1]", + "sys_cpu_ring_osc_clk[2]", + "sys_cpu_ring_osc_clk[3]", + "sys_cpu_ring_osc_clk[4]", + "sys_cpu_ring_osc_clk[5]", + "sys_cpu_ring_osc_clk[6]", + "sys_cpu_ring_osc_clk[7]", + "sys_cpu_ring_osc_clk[8]", + "sys_cpu_ring_osc_clk[9]", + "sys_cpu_ring_osc_clk[10]", + "sys_cpu_ring_osc_clk[11]", + "am_ring_osc_clk_out[12](dmc)", + "am_ring_osc_clk_out[13](rama)", + "am_ring_osc_clk_out[14](nna)", + "am_ring_osc_clk_out[15](nna)", + "rng_ring_osc_clk_1[0]", + "rng_ring_osc_clk_1[1]", + "rng_ring_osc_clk_1[2]", + "rng_ring_osc_clk_1[3]"; }; =20 spicc0: spi@50000 { diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/d= ts/amlogic/meson-axg.dtsi index 2df143aa77ce..d4a4a037e0f6 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -1860,6 +1860,148 @@ spicc1: spi@15000 { clk_msr: clock-measure@18000 { compatible =3D "amlogic,meson-axg-clk-measure"; reg =3D <0x0 0x18000 0x0 0x10>; + clkmsr-indices =3D <0>, + <1>, + <2>, + <3>, + <4>, + <5>, + <7>, + <9>, + <17>, + <18>, + <20>, + <23>, + <28>, + <31>, + <40>, + <41>, + <42>, + <43>, + <44>, + <45>, + <46>, + <47>, + <48>, + <49>, + <50>, + <51>, + <52>, + <61>, + <66>, + <67>, + <68>, + <69>, + <70>, + <71>, + <72>, + <73>, + <74>, + <75>, + <76>, + <77>, + <78>, + <79>, + <80>, + <81>, + <82>, + <84>, + <85>, + <86>, + <87>, + <88>, + <89>, + <90>, + <91>, + <92>, + <93>, + <94>, + <95>, + <96>, + <97>, + <98>, + <99>, + <100>, + <101>, + <102>, + <103>, + <104>, + <105>, + <106>, + <107>, + <108>, + <109>; + clkmsr-names =3D "ring_osc_out_ee_0", + "ring_osc_out_ee_1", + "ring_osc_out_ee_2", + "a53_ring_osc", + "gp0_pll", + "gp1_pll", + "clk81", + "encl", + "sys_pll_div16", + "sys_cpu_div16", + "rtc_osc_out", + "mmc_clk", + "sar_adc", + "mpll_test_out", + "mod_eth_tx_clk", + "mod_eth_rx_clk_rmii", + "mp0_out", + "fclk_div5", + "pwm_b", + "pwm_a", + "vpu", + "ddr_dpll_pt", + "mp1_out", + "mp2_out", + "mp3_out", + "sd_emmm_c", + "sd_emmc_b", + "gpio_msr", + "audio_slv_lrclk_c", + "audio_slv_lrclk_b", + "audio_slv_lrclk_a", + "audio_slv_sclk_c", + "audio_slv_sclk_b", + "audio_slv_sclk_a", + "pwm_d", + "pwm_c", + "wifi_beacon", + "tdmin_lb_lrcl", + "tdmin_lb_sclk", + "rng_ring_osc_0", + "rng_ring_osc_1", + "rng_ring_osc_2", + "rng_ring_osc_3", + "vapb", + "ge2d", + "audio_resample", + "audio_pdm_sys", + "audio_spdifout", + "audio_spdifin", + "audio_lrclk_f", + "audio_lrclk_e", + "audio_lrclk_d", + "audio_lrclk_c", + "audio_lrclk_b", + "audio_lrclk_a", + "audio_sclk_f", + "audio_sclk_e", + "audio_sclk_d", + "audio_sclk_c", + "audio_sclk_b", + "audio_sclk_a", + "audio_mclk_f", + "audio_mclk_e", + "audio_mclk_d", + "audio_mclk_c", + "audio_mclk_b", + "audio_mclk_a", + "pcie_refclk_n", + "pcie_refclk_p", + "audio_locker_out", + "audio_locker_in"; }; =20 i2c3: i2c@1c000 { diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/= dts/amlogic/meson-g12a.dtsi index deee61dbe074..6e288ee31d32 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -120,3 +120,232 @@ map1 { &pmu { compatible =3D "amlogic,g12a-ddr-pmu"; }; + +&clk_msr { + clkmsr-indices =3D <0>, + <1>, + <2>, + <3>, + <4>, + <6>, + <7>, + <8>, + <9>, + <10>, + <11>, + <12>, + <13>, + <14>, + <15>, + <16>, + <17>, + <18>, + <19>, + <20>, + <21>, + <22>, + <23>, + <24>, + <25>, + <26>, + <27>, + <28>, + <29>, + <30>, + <31>, + <32>, + <33>, + <34>, + <35>, + <36>, + <37>, + <38>, + <39>, + <41>, + <42>, + <43>, + <44>, + <45>, + <46>, + <47>, + <48>, + <49>, + <50>, + <51>, + <52>, + <53>, + <54>, + <55>, + <56>, + <57>, + <58>, + <59>, + <61>, + <62>, + <63>, + <64>, + <65>, + <66>, + <67>, + <68>, + <69>, + <70>, + <71>, + <72>, + <73>, + <75>, + <77>, + <78>, + <79>, + <80>, + <81>, + <82>, + <83>, + <84>, + <89>, + <90>, + <91>, + <92>, + <94>, + <95>, + <96>, + <97>, + <98>, + <99>, + <100>, + <101>, + <102>, + <103>, + <104>, + <105>, + <106>, + <107>, + <108>, + <109>, + <110>, + <111>, + <112>, + <113>, + <114>, + <115>, + <116>, + <117>, + <118>, + <119>, + <120>, + <121>, + <122>; + clkmsr-names =3D "ring_osc_out_ee_0", + "ring_osc_out_ee_1", + "ring_osc_out_ee_2", + "sys_cpu_ring_osc", + "gp0_pll", + "enci", + "clk81", + "encp", + "encl", + "vdac", + "eth_tx", + "hifi_pll", + "mod_tcon", + "fec_0", + "fec_1", + "fec_2", + "sys_pll_div16", + "sys_cpu_div16", + "lcd_an_ph2", + "rtc_osc_out", + "lcd_an_ph3", + "eth_phy_ref", + "mpll_50m", + "eth_125m", + "eth_rmii", + "sc_int", + "in_mac", + "sar_adc", + "pcie_inp", + "pcie_inn", + "mpll_test_out", + "vdec", + "sys_cpu_ring_osc_1", + "eth_mpll_50m", + "mali", + "hdmi_tx_pixel", + "cdac", + "vdin_meas", + "bt656", + "eth_rx_or_rmii", + "mp0_out", + "fclk_div5", + "pwm_b", + "pwm_a", + "vpu", + "ddr_dpll_pt", + "mp1_out", + "mp2_out", + "mp3_out", + "sd_emmc_c", + "sd_emmc_b", + "sd_emmc_a", + "vpu_clkc", + "vid_pll_div_out", + "wave420l_a", + "wave420l_c", + "wave420l_b", + "hcodec", + "gpio_msr", + "hevcb", + "dsi_meas", + "spicc_1", + "spicc_0", + "vid_lock", + "dsi_phy", + "hdcp22_esm", + "hdcp22_skp", + "pwm_f", + "pwm_e", + "pwm_d", + "pwm_c", + "hevcf", + "rng_ring_osc_0", + "rng_ring_osc_1", + "rng_ring_osc_2", + "rng_ring_osc_3", + "vapb", + "ge2d", + "co_rx", + "co_tx", + "hdmi_todig", + "hdmitx_sys", + "sys_cpub_div16", + "sys_pll_cpub_div16", + "eth_phy_rx", + "eth_phy_pll", + "vpu_b", + "cpu_b_tmp", + "ts", + "ring_osc_out_ee_3", + "ring_osc_out_ee_4", + "ring_osc_out_ee_5", + "ring_osc_out_ee_6", + "ring_osc_out_ee_7", + "ring_osc_out_ee_8", + "ring_osc_out_ee_9", + "ephy_test", + "au_dac_g128x", + "audio_locker_out", + "audio_locker_in", + "audio_tdmout_c_sclk", + "audio_tdmout_b_sclk", + "audio_tdmout_a_sclk", + "audio_tdmin_lb_sclk", + "audio_tdmin_c_sclk", + "audio_tdmin_b_sclk", + "audio_tdmin_a_sclk", + "audio_resample", + "audio_pdm_sys", + "audio_spdifout_b", + "audio_spdifout", + "audio_spdifin", + "audio_pdm_dclk"; +}; diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dt= s/amlogic/meson-gx.dtsi index 7d99ca44e660..4510e3403174 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi @@ -367,6 +367,140 @@ uart_C: serial@8700 { clock-measure@8758 { compatible =3D "amlogic,meson-gx-clk-measure"; reg =3D <0x0 0x8758 0x0 0x10>; + clkmsr-indices =3D <0>, + <1>, + <2>, + <3>, + <4>, + <6>, + <7>, + <8>, + <9>, + <10>, + <11>, + <12>, + <13>, + <14>, + <15>, + <16>, + <17>, + <18>, + <19>, + <20>, + <21>, + <22>, + <23>, + <26>, + <28>, + <31>, + <32>, + <35>, + <36>, + <37>, + <38>, + <39>, + <40>, + <41>, + <42>, + <43>, + <44>, + <45>, + <46>, + <47>, + <48>, + <49>, + <50>, + <51>, + <52>, + <53>, + <55>, + <56>, + <57>, + <58>, + <59>, + <60>, + <61>, + <62>, + <66>, + <70>, + <71>, + <72>, + <73>, + <75>, + <76>, + <77>, + <78>, + <79>, + <80>, + <81>, + <82>; + clkmsr-names =3D "ring_osc_out_ee_0", + "ring_osc_out_ee_1", + "ring_osc_out_ee_2", + "a53_ring_osc", + "gp0_pll", + "enci", + "clk81", + "encp", + "encl", + "vdac", + "rgmii_tx", + "pdm", + "amclk", + "fec_0", + "fec_1", + "fec_2", + "sys_pll_div16", + "sys_cpu_div16", + "hdmitx_sys", + "rtc_osc_out", + "i2s_in_src0", + "eth_phy_ref", + "hdmi_todig", + "sc_int", + "sar_adc", + "mpll_test_out", + "vdec", + "mali", + "hdmi_tx_pixel", + "i958", + "vdin_meas", + "pcm_sclk", + "pcm_mclk", + "eth_rx_or_rmii", + "mp0_out", + "fclk_div5", + "pwm_b", + "pwm_a", + "vpu", + "ddr_dpll_pt", + "mp1_out", + "mp2_out", + "mp3_out", + "nand_core", + "sd_emmc_b", + "sd_emmc_a", + "vid_pll_div_out", + "cci", + "wave420l_c", + "wave420l_b", + "hcodec", + "alt_32k", + "gpio_msr", + "hevc", + "vid_lock", + "pwm_f", + "pwm_e", + "pwm_d", + "pwm_c", + "aoclkx2_int", + "aoclk_int", + "rng_ring_osc_0", + "rng_ring_osc_1", + "rng_ring_osc_2", + "rng_ring_osc_3", + "vapb", + "ge2d"; }; =20 i2c_B: i2c@87c0 { diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dt= s/amlogic/meson-s4.dtsi index 9d99ed2994df..21a9fb27ee3f 100644 --- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi @@ -632,6 +632,305 @@ internal_ephy: ethernet-phy@8 { clk_msr: clock-measure@48000 { compatible =3D "amlogic,s4-clk-measure"; reg =3D <0x0 0x48000 0x0 0x1c>; + clkmsr-reg-v2; + clkmsr-indices =3D <0>, + <1>, + <2>, + <5>, + <6>, + <7>, + <8>, + <10>, + <11>, + <12>, + <13>, + <14>, + <15>, + <16>, + <17>, + <18>, + <19>, + <20>, + <21>, + <22>, + <23>, + <24>, + <30>, + <31>, + <32>, + <33>, + <34>, + <35>, + <36>, + <37>, + <38>, + <39>, + <40>, + <50>, + <51>, + <52>, + <53>, + <54>, + <55>, + <56>, + <57>, + <58>, + <59>, + <60>, + <61>, + <62>, + <63>, + <64>, + <65>, + <66>, + <67>, + <68>, + <69>, + <76>, + <77>, + <78>, + <79>, + <93>, + <99>, + <100>, + <101>, + <102>, + <103>, + <104>, + <105>, + <106>, + <110>, + <111>, + <113>, + <114>, + <115>, + <116>, + <118>, + <121>, + <130>, + <131>, + <132>, + <133>, + <134>, + <135>, + <136>, + <137>, + <138>, + <139>, + <140>, + <141>, + <142>, + <143>, + <144>, + <145>, + <146>, + <147>, + <160>, + <161>, + <162>, + <163>, + <164>, + <165>, + <166>, + <167>, + <168>, + <169>, + <176>, + <177>, + <178>, + <179>, + <180>, + <181>, + <182>, + <183>, + <184>, + <185>, + <186>, + <187>, + <188>, + <189>, + <190>, + <192>, + <193>, + <194>, + <195>, + <196>, + <197>, + <198>, + <199>, + <200>, + <201>, + <202>, + <203>, + <204>, + <205>, + <206>, + <207>, + <208>, + <209>, + <210>, + <211>, + <212>, + <213>, + <214>, + <215>, + <216>, + <217>, + <218>, + <219>, + <220>, + <221>, + <222>, + <223>; + clkmsr-names =3D "sys_clk", + "axi_clk", + "rtc_clk", + "mali", + "cpu_clk_div16", + "ceca_clk", + "cecb_clk", + "fclk_div5", + "mpll0", + "mpll1", + "mpll2", + "mpll3", + "fclk_50m", + "pcie_clk_inp", + "pcie_clk_inn", + "mpll_clk_test_out", + "hifi_pll", + "gp0_pll", + "gp1_pll", + "eth_mppll_50m_ckout", + "sys_pll_div16", + "ddr_dpll_pt_clk", + "mod_eth_phy_ref_clk", + "mod_eth_tx_clk", + "eth_125m", + "eth_rmii", + "co_clkin_to_mac", + "mod_eth_rx_clk_rmii", + "co_rx_clk", + "co_tx_clk", + "eth_phy_rxclk", + "eth_phy_plltxclk", + "ephy_test_clk", + "vid_pll_div_clk_out", + "enci", + "encp", + "encl", + "vdac", + "cdac_clk_c", + "mod_tcon_clko", + "lcd_an_clk_ph2", + "lcd_an_clk_ph3", + "hdmitx_pixel", + "vdin_meas", + "vpu", + "vpu_clkb", + "vpu_clkb_tmp", + "vpu_clkc", + "vid_lock", + "vapb", + "ge2d", + "cts_hdcp22_esmclk", + "cts_hdcp22_skpclk", + "hdmitx_tmds", + "hdmitx_sys_clk", + "hdmitx_fe_clk", + "rama", + "vdec", + "hevcf", + "demod_core", + "adc_extclk_in", + "cts_demod_core_t2_clk", + "adc_dpll_intclk", + "adc_dpll_clk_b3", + "s2_adc_clk", + "deskew_pll_clk_div32_out", + "sc", + "sar_adc", + "sd_emmc_c", + "sd_emmc_b", + "sd_emmc_a", + "gpio_msr_clk", + "spicc0", + "ts", + "audio_vad_clk", + "acodec_dac_clk_x128", + "audio_locker_in_clk", + "audio_locker_out_clk", + "audio_tdmout_c_sclk", + "audio_tdmout_b_sclk", + "audio_tdmout_a_sclk", + "audio_tdmin_lb_sclk", + "audio_tdmin_c_sclk", + "audio_tdmin_b_sclk", + "audio_tdmin_a_sclk", + "audio_resamplea_clk", + "audio_pdm_sysclk", + "audio_spdifout_b_mst_clk", + "audio_spdifout_mst_clk", + "audio_spdifin_mst_clk", + "audio_pdm_dclk", + "audio_resampleb_clk", + "pwm_j", + "pwm_i", + "pwm_h", + "pwm_g", + "pwm_f", + "pwm_e", + "pwm_d", + "pwm_c", + "pwm_b", + "pwm_a", + "rng_ring_0", + "rng_ring_1", + "rng_ring_2", + "rng_ring_3", + "dmc_osc_ring(LVT16)", + "gpu_osc_ring0(LVT16)", + "gpu_osc_ring1(ULVT16)", + "gpu_osc_ring2(SLVT16)", + "vpu_osc_ring0(SVT24)", + "vpu_osc_ring1(LVT20)", + "vpu_osc_ring2(LVT16)", + "dos_osc_ring0(SVT24)", + "dos_osc_ring1(SVT16)", + "dos_osc_ring2(LVT16)", + "dos_osc_ring3(ULVT20)", + "axi_sram_osc_ring(SVT16)", + "demod_osc_ring0", + "demod_osc_ring1", + "sar_osc_ring", + "sys_cpu_osc_ring0", + "sys_cpu_osc_ring1", + "sys_cpu_osc_ring2", + "sys_cpu_osc_ring3", + "sys_cpu_osc_ring4", + "sys_cpu_osc_ring5", + "sys_cpu_osc_ring6", + "sys_cpu_osc_ring7", + "sys_cpu_osc_ring8", + "sys_cpu_osc_ring9", + "sys_cpu_osc_ring10", + "sys_cpu_osc_ring11", + "sys_cpu_osc_ring12", + "sys_cpu_osc_ring13", + "sys_cpu_osc_ring14", + "sys_cpu_osc_ring15", + "sys_cpu_osc_ring16", + "sys_cpu_osc_ring17", + "sys_cpu_osc_ring18", + "sys_cpu_osc_ring19", + "sys_cpu_osc_ring20", + "sys_cpu_osc_ring21", + "sys_cpu_osc_ring22", + "sys_cpu_osc_ring23", + "sys_cpu_osc_ring24", + "sys_cpu_osc_ring25", + "sys_cpu_osc_ring26", + "sys_cpu_osc_ring27"; }; =20 spicc0: spi@50000 { diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/d= ts/amlogic/meson-sm1.dtsi index 966ebb19cc55..8ecf876c73ee 100644 --- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi @@ -479,6 +479,260 @@ &cecb_AO { =20 &clk_msr { compatible =3D "amlogic,meson-sm1-clk-measure"; + clkmsr-indices =3D <0>, + <1>, + <2>, + <3>, + <4>, + <5>, + <6>, + <7>, + <8>, + <9>, + <10>, + <11>, + <12>, + <13>, + <14>, + <15>, + <16>, + <17>, + <18>, + <19>, + <20>, + <21>, + <22>, + <23>, + <24>, + <25>, + <26>, + <27>, + <28>, + <29>, + <30>, + <31>, + <32>, + <34>, + <35>, + <36>, + <37>, + <38>, + <39>, + <40>, + <41>, + <42>, + <43>, + <44>, + <45>, + <46>, + <47>, + <48>, + <49>, + <50>, + <51>, + <52>, + <53>, + <54>, + <55>, + <56>, + <57>, + <58>, + <59>, + <60>, + <61>, + <62>, + <63>, + <64>, + <65>, + <66>, + <67>, + <68>, + <69>, + <70>, + <71>, + <72>, + <73>, + <74>, + <75>, + <76>, + <77>, + <78>, + <79>, + <80>, + <81>, + <82>, + <83>, + <84>, + <85>, + <86>, + <87>, + <88>, + <89>, + <90>, + <91>, + <92>, + <93>, + <94>, + <95>, + <96>, + <97>, + <98>, + <99>, + <100>, + <101>, + <102>, + <103>, + <104>, + <105>, + <106>, + <107>, + <108>, + <109>, + <110>, + <111>, + <112>, + <113>, + <114>, + <115>, + <116>, + <117>, + <118>, + <119>, + <120>, + <121>, + <122>, + <123>, + <124>, + <125>, + <126>, + <127>; + clkmsr-names =3D "ring_osc_out_ee_0", + "ring_osc_out_ee_1", + "ring_osc_out_ee_2", + "ring_osc_out_ee_3", + "gp0_pll", + "gp1_pll", + "enci", + "clk81", + "encp", + "encl", + "vdac", + "eth_tx", + "hifi_pll", + "mod_tcon", + "fec_0", + "fec_1", + "fec_2", + "sys_pll_div16", + "sys_cpu_div16", + "lcd_an_ph2", + "rtc_osc_out", + "lcd_an_ph3", + "eth_phy_ref", + "mpll_50m", + "eth_125m", + "eth_rmii", + "sc_int", + "in_mac", + "sar_adc", + "pcie_inp", + "pcie_inn", + "mpll_test_out", + "vdec", + "eth_mpll_50m", + "mali", + "hdmi_tx_pixel", + "cdac", + "vdin_meas", + "bt656", + "arm_ring_osc_out_4", + "eth_rx_or_rmii", + "mp0_out", + "fclk_div5", + "pwm_b", + "pwm_a", + "vpu", + "ddr_dpll_pt", + "mp1_out", + "mp2_out", + "mp3_out", + "sd_emmc_c", + "sd_emmc_b", + "sd_emmc_a", + "vpu_clkc", + "vid_pll_div_out", + "wave420l_a", + "wave420l_c", + "wave420l_b", + "hcodec", + "arm_ring_osc_out_5", + "gpio_msr", + "hevcb", + "dsi_meas", + "spicc_1", + "spicc_0", + "vid_lock", + "dsi_phy", + "hdcp22_esm", + "hdcp22_skp", + "pwm_f", + "pwm_e", + "pwm_d", + "pwm_c", + "arm_ring_osc_out_6", + "hevcf", + "arm_ring_osc_out_7", + "rng_ring_osc_0", + "rng_ring_osc_1", + "rng_ring_osc_2", + "rng_ring_osc_3", + "vapb", + "ge2d", + "co_rx", + "co_tx", + "arm_ring_osc_out_8", + "arm_ring_osc_out_9", + "mipi_dsi_phy", + "cis2_adapt", + "hdmi_todig", + "hdmitx_sys", + "nna_core", + "nna_axi", + "vad", + "eth_phy_rx", + "eth_phy_pll", + "vpu_b", + "cpu_b_tmp", + "ts", + "arm_ring_osc_out_10", + "arm_ring_osc_out_11", + "arm_ring_osc_out_12", + "arm_ring_osc_out_13", + "arm_ring_osc_out_14", + "arm_ring_osc_out_15", + "arm_ring_osc_out_16", + "ephy_test", + "au_dac_g128x", + "audio_locker_out", + "audio_locker_in", + "audio_tdmout_c_sclk", + "audio_tdmout_b_sclk", + "audio_tdmout_a_sclk", + "audio_tdmin_lb_sclk", + "audio_tdmin_c_sclk", + "audio_tdmin_b_sclk", + "audio_tdmin_a_sclk", + "audio_resample", + "audio_pdm_sys", + "audio_spdifout_b", + "audio_spdifout", + "audio_spdifin", + "audio_pdm_dclk", + "audio_resampled", + "earcrx_pll", + "earcrx_pll_test", + "csi_phy0", + "csi2_data"; }; =20 =20 --=20 2.42.0 From nobody Sat Oct 4 14:13:12 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DF07423ABBB; Fri, 15 Aug 2025 08:37:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247062; cv=none; b=CKNZ+BHvzAt1zM9FwyswaNRC4ioD5j0TYiz+ppNkiukhAQ/Uisg+hcQQVKTVUbYMmpmvV3GEjinURjV1GictZYvpxVbVnYnqX2sRM8OKTyIU72wM4Fh+7hb6KVmoAGB/dcgZI4qDuODRAfQa3l7jhrMHtXb1cO/TFEsIlzYoWF8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247062; c=relaxed/simple; bh=nCRulO6K/H4lFvEhCNrgEuQoW1aO9yFrduMC+IOo29c=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=hXiQsnqOIugMAz5kHl0oSKnmVC2oyJ1IXmgr+GCisy4Gsvndt7zc+UST8HhkwZXFUcBOn1hcBrmJPuaoFNhRKc2g8KKaHdg/sZzd3YNkKssWIK5qTBCcaU3XbWj0qWcjW5k+pZgd6kiAOP39QDJRFch22gbYk+4+tz2OY6q4fo0= ARC-Authentication-Results: i=1; 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Fri, 15 Aug 2025 08:37:41 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 15 Aug 2025 16:37:31 +0800 Subject: [PATCH 05/13] dt-bindings: soc: amlogic: Unify the compatible property for clk-measure Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250815-add-more-socs-to-support-clk_measure-v1-5-59f04ba67457@amlogic.com> References: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> In-Reply-To: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755247057; l=1771; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=WLsFB3kZYI5SRTtCiEJNIQMGbbEEbhu5OiVfqIrbRCU=; b=15BeFKwtMUW4Xf1NqNuNqnhEhMKHY/rAApALIEl3odOLL/43sqwREMcPMGqW3A7x/6AJvI4oR U3KLtA0rnWGCvCtUm3EXXlqWfXYYS9nC2B8xxigjirG1/dmavcx3I62 X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu The clk-measure IPs across Amlogic SoCs have minimal differences, so they can be managed with a unified compatible property. Signed-off-by: Chuan Liu --- .../bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml | 14 +++-------= ---- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx= -clk-measure.yaml b/Documentation/devicetree/bindings/soc/amlogic/amlogic,m= eson-gx-clk-measure.yaml index 1c9d37eef5f0..a7927acde2fe 100644 --- a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-me= asure.yaml +++ b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-me= asure.yaml @@ -15,15 +15,7 @@ maintainers: =20 properties: compatible: - enum: - - amlogic,meson-gx-clk-measure - - amlogic,meson8-clk-measure - - amlogic,meson8b-clk-measure - - amlogic,meson-axg-clk-measure - - amlogic,meson-g12a-clk-measure - - amlogic,meson-sm1-clk-measure - - amlogic,c3-clk-measure - - amlogic,s4-clk-measure + const: amlogic,clk-measure =20 reg: maxItems: 1 @@ -67,7 +59,7 @@ examples: * offsets. */ clock-measure@8758 { - compatible =3D "amlogic,meson-gx-clk-measure"; + compatible =3D "amlogic,clk-measure"; reg =3D <0x8758 0x10>; clkmsr-indices =3D <0>, <1>, @@ -82,7 +74,7 @@ examples: * Example 2: clk-measure uses V2 version register address offsets. */ clock-measure@48000 { - compatible =3D "amlogic,c3-clk-measure"; + compatible =3D "amlogic,clk-measure"; reg =3D <0x48000 0x1c>; clkmsr-reg-v2; clkmsr-indices =3D <0>, --=20 2.42.0 From nobody Sat Oct 4 14:13:12 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DEFD723A9BE; Fri, 15 Aug 2025 08:37:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247062; cv=none; b=jI1IqGr9no4/T5sW+Bpg9YHFFGqXuDYfsYe5oQ6rmcpSsiYudQaMSMTlbzTNxH/hNhgOh5yJvHohYHezVqAxtvMoszaNM0kmplr5ZgRrqVdb2BHVcBFtF31znlvYyRr6uCU4N00nxlUwinQpwFoNvC2hqqo+rfxDbgD6+iY3tCQ= ARC-Message-Signature: i=1; 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b=IpWuSp5SoLQJe/9tIsFQHf0gmPvzBJRZL4k8Em73ETJV3LVsFPpr5m2/5O91ngKmX QHZpmjsNQyFlsHQGTPzhRubSg9sUVuB1DxUNebOZlyjU4+t5NpmFkDVes7+HF7fZG1 ohvl00r9NRaobfsbXDSi0HGm4XVkaa7Ed8W+vWJD5K2eEEr/ufNqxTy+aQZvVVAAuk 8OzBgj0xFIuNGzQ0DQacQMubpnNVI2UJp0rQdBm2KFRRrhyRZvqnPxfZjVk50txNgK n8qyF8AuDcKJfbEqhKsJPoSic3Fc7p6/tdhReHAKerVrwc77FukyFcpGzSuELa9rNx k/dFZre/MYyoA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F2C7CA0EE4; Fri, 15 Aug 2025 08:37:41 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 15 Aug 2025 16:37:32 +0800 Subject: [PATCH 06/13] soc: amlogic: clk-measure: Unify the compatible property Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250815-add-more-socs-to-support-clk_measure-v1-6-59f04ba67457@amlogic.com> References: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> In-Reply-To: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755247057; l=1243; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=0eEPVOYjuBKHP/v29Jhs15ySgwAKkYRM0UAoAkVVptI=; b=w5p2xKfbh6z56WSYU5ZafMzFPC+EGumxKh+Ixvc4DqIg3NuGpxaEkMcSlMCGGj8XeqMlAmup6 tvRqqTQbYEjD0o6iaUTAx+p1HW8LJoy1QBm9o9TPulukjmKQ89dnunU X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu The clk-measure IPs across Amlogic SoCs have minimal differences, so they can be managed with a unified compatible property. Signed-off-by: Chuan Liu --- drivers/soc/amlogic/meson-clk-measure.c | 23 +---------------------- 1 file changed, 1 insertion(+), 22 deletions(-) diff --git a/drivers/soc/amlogic/meson-clk-measure.c b/drivers/soc/amlogic/= meson-clk-measure.c index 4d91d463d2a5..6927f87b99cc 100644 --- a/drivers/soc/amlogic/meson-clk-measure.c +++ b/drivers/soc/amlogic/meson-clk-measure.c @@ -292,28 +292,7 @@ static int meson_msr_probe(struct platform_device *pde= v) =20 static const struct of_device_id meson_msr_match_table[] =3D { { - .compatible =3D "amlogic,meson-gx-clk-measure", - }, - { - .compatible =3D "amlogic,meson8-clk-measure", - }, - { - .compatible =3D "amlogic,meson8b-clk-measure", - }, - { - .compatible =3D "amlogic,meson-axg-clk-measure", - }, - { - .compatible =3D "amlogic,meson-g12a-clk-measure", - }, - { - .compatible =3D "amlogic,meson-sm1-clk-measure", - }, - { - .compatible =3D "amlogic,c3-clk-measure", - }, - { - .compatible =3D "amlogic,s4-clk-measure", + .compatible =3D "amlogic,clk-measure", }, { /* sentinel */ } }; --=20 2.42.0 From nobody Sat Oct 4 14:13:12 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CF55C238D57; Fri, 15 Aug 2025 08:37:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247061; cv=none; b=vBvQNNTnKIicNl8Is2YHHjfk7pd49tSM9ZozWi1sUPaivdLZUCHD2oj1jjAjFFB4+6uB4LnWGmcFk2X+bW6ztUt3fYRAdVjB/+c1CkrV+Yk6LvAGWwsTutZqk2hTB1ipDUDvWPQaQiohhetNqhmUgx9k1/0fO2by676lUqs0wgw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247061; c=relaxed/simple; bh=HXEA9l6YKygvEuv8M/1chWcv0RBJVJ1iSq+R8A6ihQc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=njEoeDqPTFz8FkUBYh2A+DPasZFT22uL9Ktz9VaMN2MsL/fjgP7+/mvkSzV2pyWTaIG3uYLn7g/wFdygu/YKZa/Qn79GEeVxRTaeWpo4elWBQ70B7PjgT2XdrKapKN1tgnBP4bxtiO4DxQRACnHLs1Re07PRfH3OS7RXpcUTUwM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=bSvE7d5T; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="bSvE7d5T" Received: by smtp.kernel.org (Postfix) with ESMTPS id 8531BC116B1; Fri, 15 Aug 2025 08:37:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1755247061; bh=HXEA9l6YKygvEuv8M/1chWcv0RBJVJ1iSq+R8A6ihQc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=bSvE7d5TakjlIb8jEIxsvTW1b0Kf3uGEyNv+PL1hKILLgwp82aP3iFdmO/0+pirhL vpNItUZH9tT98ak0RnGqPUNHYlPDet+gZ/GYrDIukTxZdEOvxweQLxN+jC/GmSVeIO n/UIc0c8RfSNIHlJvpur+dkhSdsyWHFmt9OKrNg1fOQIIxMhMioEUXsa2rcvDU/638 iZU3wCrbLMgEZoskQ1TJF4NUsNA64jXiLLmGpaYjIhbxB5ogjQu76xwEoDbHM+h0NV gmYGZtGtCQql520sH9+6l6yLH5geR3q/2q0wbP/BjsCfaQ3H1ZnFls/or5ZK9DN3EF /2C7+EXEV8EdQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7AE9ECA0ED1; Fri, 15 Aug 2025 08:37:41 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 15 Aug 2025 16:37:33 +0800 Subject: [PATCH 07/13] ARM: dts: amlogic: Unify the compatible property for clk-measure Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250815-add-more-socs-to-support-clk_measure-v1-7-59f04ba67457@amlogic.com> References: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> In-Reply-To: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755247057; l=1245; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=ogLhza13Z3+sRdNuog3wi18IBAswOBl0lnCwSfN1OrY=; b=I/pWu4T97rWRApNMfafG00zPnjp6BitC2JwcExuQmhW9xDCyeJcyQ2yhM37tCrDcoUd2rnXUb fGhA362SrvHB/Xc4jqb9tkx1TFny57iIjqx6o3+bwhiHTlcLanyy9i6 X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu The clk-measure IPs across Amlogic SoCs have minimal differences, so they can be managed with a unified compatible property. Signed-off-by: Chuan Liu --- arch/arm/boot/dts/amlogic/meson8.dtsi | 2 +- arch/arm/boot/dts/amlogic/meson8b.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/amlogic/meson8.dtsi b/arch/arm/boot/dts/amlo= gic/meson8.dtsi index 2f9ecd2eb4cf..db47e1de0b20 100644 --- a/arch/arm/boot/dts/amlogic/meson8.dtsi +++ b/arch/arm/boot/dts/amlogic/meson8.dtsi @@ -460,7 +460,7 @@ pwm_ef: pwm@86c0 { }; =20 clock-measure@8758 { - compatible =3D "amlogic,meson8-clk-measure"; + compatible =3D "amlogic,clk-measure"; reg =3D <0x8758 0x1c>; clkmsr-indices =3D <0>, <1>, diff --git a/arch/arm/boot/dts/amlogic/meson8b.dtsi b/arch/arm/boot/dts/aml= ogic/meson8b.dtsi index 74fd000569a2..3b1d2d2ad7a2 100644 --- a/arch/arm/boot/dts/amlogic/meson8b.dtsi +++ b/arch/arm/boot/dts/amlogic/meson8b.dtsi @@ -414,7 +414,7 @@ pwm_ef: pwm@86c0 { }; =20 clock-measure@8758 { - compatible =3D "amlogic,meson8b-clk-measure"; + compatible =3D "amlogic,clk-measure"; reg =3D <0x8758 0x1c>; clkmsr-indices =3D <0>, <1>, --=20 2.42.0 From nobody Sat Oct 4 14:13:12 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 015E624502C; Fri, 15 Aug 2025 08:37:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247062; cv=none; b=lKc2UOOAIy8mw9BCPCIJekmV7eSTPcG/Qp+kk7ZikAT5QqNx9AS3XsKIS7fSLJQUUgmMFAPMqiIArJ6kr3ONTO6e9IQKGmiQg0HK93Wtnq5wRhC3WNqsXyYtSyh7ROkqlFiNr2Us5EkVUDnRBN6W4bVS79K+Tx11Yss1YCh5SbQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247062; c=relaxed/simple; bh=5yLR73S69Dza2YSwslzv9M45RT0dAh/D/n8Q4U3GUj0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=FqppHdaqI1donjGxYGT2RNHU9PiP4aOwnlwKmfGkQ/mNt+dgCxiD5/EyOE9ZxrSSeFNGP7cn+M+ZOPH9VqyMZQemMgNTvxyapHDWYC/03pPr9aAzjbdv2r/LzxM+vEuFLqGy6ajvshCcdgGaXXs8oYGm21Ajl3oD86qkiDK7RZ4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=jGXrrp0q; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="jGXrrp0q" Received: by smtp.kernel.org (Postfix) with ESMTPS id 8E7DFC19422; Fri, 15 Aug 2025 08:37:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1755247061; bh=5yLR73S69Dza2YSwslzv9M45RT0dAh/D/n8Q4U3GUj0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=jGXrrp0qxYVImzDOQxKoRu1G+G/wn+x6tJfhfm46tNT4S/i3tOyLlE4risb1tZMXV Adeiw2ZwJV71e7hyUHJM4KnXgxYS47Ep8eWkMGdkkaeX4pDs1PVXl1+5dV7BDT2lEn 792VQrF796kBZcvVmMSrtqh/yrTLbU1ys61SeOV59TjTxJUDGqMwxT3bCsXWbdvtHf eTJKIg1CbWZYn61uNmts4NINgU+KoPdks7kdMgTsrdhWS4eDqm7NDfFtFGcMNJME5Y ev3SNdg4wnB61cw790tQhIFnZGVh7CTmI+ftnI0l3kvEJr4YNoDbxfwDWJf+ytlBBu veWW4YsR2ffnA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 869CECA0EE6; Fri, 15 Aug 2025 08:37:41 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 15 Aug 2025 16:37:34 +0800 Subject: [PATCH 08/13] arm64: dts: amlogic: Unify the compatible property for clk-measure Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250815-add-more-socs-to-support-clk_measure-v1-8-59f04ba67457@amlogic.com> References: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> In-Reply-To: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755247057; l=3522; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=EHJwnnddK5r6qztNb2TJl7JYxmXy90quB+2alicslFc=; b=zv242H2x9f/LEwB89LfCTL3Z61M1JxVpanUqgW4kxMvHUmoNhs0D9AxOm8Z5gvO/ddNsWqG0v va6BgMWpjgGDcMk0PIbiWWiDNCXJscS56n/rDO9UWGfJHIWQNOfPSMD X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu The clk-measure IPs across Amlogic SoCs have minimal differences, so they can be managed with a unified compatible property. Signed-off-by: Chuan Liu --- arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi | 2 +- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 2 +- arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 2 +- arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 2 +- arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 2 +- arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 1 - 6 files changed, 5 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-c3.dtsi index ab9ebabce171..570cac451d63 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi @@ -761,7 +761,7 @@ internal_ephy: ethernet_phy@8 { }; =20 clk_msr: clock-measure@48000 { - compatible =3D "amlogic,c3-clk-measure"; + compatible =3D "amlogic,clk-measure"; reg =3D <0x0 0x48000 0x0 0x1c>; clkmsr-reg-v2; clkmsr-indices =3D <0>, diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/d= ts/amlogic/meson-axg.dtsi index d4a4a037e0f6..e939ec6186c6 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -1858,7 +1858,7 @@ spicc1: spi@15000 { }; =20 clk_msr: clock-measure@18000 { - compatible =3D "amlogic,meson-axg-clk-measure"; + compatible =3D "amlogic,clk-measure"; reg =3D <0x0 0x18000 0x0 0x10>; clkmsr-indices =3D <0>, <1>, diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64= /boot/dts/amlogic/meson-g12-common.dtsi index dcc927a9da80..54220f105a4d 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -2385,7 +2385,7 @@ i2c0: i2c@1f000 { }; =20 clk_msr: clock-measure@18000 { - compatible =3D "amlogic,meson-g12a-clk-measure"; + compatible =3D "amlogic,clk-measure"; reg =3D <0x0 0x18000 0x0 0x10>; }; =20 diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dt= s/amlogic/meson-gx.dtsi index 4510e3403174..4330a6284873 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi @@ -365,7 +365,7 @@ uart_C: serial@8700 { }; =20 clock-measure@8758 { - compatible =3D "amlogic,meson-gx-clk-measure"; + compatible =3D "amlogic,clk-measure"; reg =3D <0x0 0x8758 0x0 0x10>; clkmsr-indices =3D <0>, <1>, diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dt= s/amlogic/meson-s4.dtsi index 21a9fb27ee3f..8df234ad78e8 100644 --- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi @@ -630,7 +630,7 @@ internal_ephy: ethernet-phy@8 { }; =20 clk_msr: clock-measure@48000 { - compatible =3D "amlogic,s4-clk-measure"; + compatible =3D "amlogic,clk-measure"; reg =3D <0x0 0x48000 0x0 0x1c>; clkmsr-reg-v2; clkmsr-indices =3D <0>, diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/d= ts/amlogic/meson-sm1.dtsi index 8ecf876c73ee..2279237db793 100644 --- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi @@ -478,7 +478,6 @@ &cecb_AO { }; =20 &clk_msr { - compatible =3D "amlogic,meson-sm1-clk-measure"; clkmsr-indices =3D <0>, <1>, <2>, --=20 2.42.0 From nobody Sat Oct 4 14:13:12 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0052D24466C; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="GG1Ie9jT" Received: by smtp.kernel.org (Postfix) with ESMTPS id 982DDC19424; Fri, 15 Aug 2025 08:37:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1755247061; bh=VFGd5hRIkRHvzlQy80MpxiKKkC07jgnJaMdRjA7K6w4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=GG1Ie9jTwDKhOS4SsBEhMfLscvhIJRDyDLL6yAHAg45liuMjDsPHKalqlOBylHAGv r5pVn3ok9JF5z0OhCQ2i/ZNScsvTne7c2xkZAhy8hhqxQV5no3xjcE+EF4zF/pTxmP mBrxyRmMshfFpROvSNZ/gmNNlezod3xJcpHxdD+MSoh/BoDTYy1C8/Ysw8/RkPtWq8 p/7+YN8f78/sCrsMJWZ3g6hv+9FbpjNfXtpfazTVt8uZSgCDHvKtHjuAAAyEb+GzWw 4/Mqb3/zgXGt51FjmJ0ADIfuOrKUlbn9vpmbAVdB55BOtfUV6j8r25xrbLTOCniBI0 a497iJbNsG7KA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9196DCA0EE8; Fri, 15 Aug 2025 08:37:41 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 15 Aug 2025 16:37:35 +0800 Subject: [PATCH 09/13] arm64: dts: amlogic: A4: Add clk-measure controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250815-add-more-socs-to-support-clk_measure-v1-9-59f04ba67457@amlogic.com> References: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> In-Reply-To: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755247057; l=5269; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=X0XY9aZjdMBy/BejERaULKB1+6dEiqZglq+Tq7M/WTk=; b=r7nrSwjawPgfJtx0VHM0LteREbh/rLUqECbuzDuRObH93zlbrdxKoHYaVrS33WF3uPmy86T+3 tAQjLfMTPz9CuYpGDyRCoMp91fHSeBCv0ATINdpo3wpoBmJQBrSvH5m X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add the clk-measure controller node for A4 SoC family. Signed-off-by: Chuan Liu --- arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 212 ++++++++++++++++++++++++= ++++ 1 file changed, 212 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-a4.dtsi index 563bc2e662fa..471a4bd24bfb 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi @@ -170,6 +170,218 @@ gpio_intc: interrupt-controller@4080 { <10 11 12 13 14 15 16 17 18 19 20 21>; }; =20 + clk_msr: clock-measure@48000 { + compatible =3D "amlogic,clk-measure"; + reg =3D <0x0 0x48000 0x0 0x1c>; + clkmsr-reg-v2; + clkmsr-indices =3D <0>, + <1>, + <2>, + <3>, + <4>, + <5>, + <6>, + <8>, + <10>, + <15>, + <16>, + <17>, + <19>, + <20>, + <21>, + <22>, + <23>, + <24>, + <27>, + <28>, + <30>, + <31>, + <32>, + <33>, + <34>, + <35>, + <36>, + <37>, + <38>, + <39>, + <40>, + <41>, + <51>, + <52>, + <79>, + <106>, + <111>, + <112>, + <113>, + <115>, + <116>, + <117>, + <118>, + <119>, + <120>, + <121>, + <122>, + <123>, + <124>, + <125>, + <126>, + <127>, + <128>, + <129>, + <130>, + <131>, + <132>, + <133>, + <134>, + <135>, + <136>, + <137>, + <138>, + <139>, + <140>, + <141>, + <142>, + <143>, + <144>, + <145>, + <146>, + <147>, + <148>, + <149>, + <150>, + <151>, + <152>, + <153>, + <154>, + <155>, + <156>, + <157>, + <158>, + <159>, + <162>, + <163>, + <164>, + <165>, + <166>, + <167>, + <168>, + <169>, + <176>, + <177>, + <178>, + <179>, + <180>, + <181>, + <182>, + <183>, + <184>, + <185>, + <186>; + clkmsr-names =3D "sys_clk", + "axi_clk", + "rtc_clk", + "p22_usb2_ckout", + "p21_usb2_ckout", + "p20_usb2_ckout", + "cpu_clk_div16", + "eth_mpll_test", + "fclk_div5", + "fclk_50m", + "sys_oscin32k_i", + "rtc_pll", + "hifi_pll", + "gp0_pll", + "gp1_pll", + "eth_fclk_50m_clkout", + "sys_pll_div16", + "ddr_dpll_pt_clk", + "rtc_sec_pulse_out", + "rtc_osc_clk_out", + "mod_eth_phy_ref_clk", + "mod_eth_tx_clk", + "eth_125m", + "eth_rmii", + "co_clkin_to_mac", + "mod_eth_rx_clk_rmii", + "co_rx_clk", + "co_tx_clk", + "eth_phy_rxclk", + "eth_phy_plltxclk", + "ephy_test_clk", + "audio_core_clk", + "vout_venc_clk_ph", + "vout_venc_clk", + "rama_clk", + "deskew_pll_test_clk", + "saradc", + "ts", + "sd_emmc_c", + "sd_emmc_a", + "gpio_msr_clk", + "spicc_1", + "spicc_0", + "o_mst_sclk_vad", + "o_mst_mclk_vad", + "o_pdm_sysclk", + "mod_audio_pdm_dclk_o", + "o_vad_clk", + "earcrx_dmac_clk", + "earcrx_cmdc_clk", + "earctx_dmac_clk", + "earctx_cmdc_clk", + "tohdmitx_bclk", + "tohdmitx_mclk", + "tohdmitx_spdif_clk", + "toacodec_bclk", + "toacodec_mclk", + "spdifout_b_mst_clk", + "spdifout_mst_clk", + "spdifin_mst_clk", + "audio_mclk", + "vad_clk", + "tdmout_d_sclk", + "tdmout_c_sclk", + "tdmout_b_sclk", + "tdmout_a_sclk", + "tdminb_lb_sclk", + "tdmin_lb_sclk", + "tdmin_d_sclk", + "tdmin_c_sclk", + "tdmin_b_sclk", + "tdmin_a_sclk", + "resampleb_clk", + "resamplea_clk", + "pdmb_sysclk", + "pdmb_dclk", + "pdm_sysclk", + "pdm_dclk", + "alockerb_out_clk", + "alockerb_in_clk", + "alocker_out_clk", + "alocker_in_clk", + "audio_mst_clk[34]", + "audio_mst_clk[35]", + "pwm_h", + "pwm_g", + "pwm_f", + "pwm_e", + "pwm_d", + "pwm_c", + "pwm_b", + "pwm_a", + "rng_ring_osc_clk[0]", + "rng_ring_osc_clk[1]", + "rng_ring_osc_clk[2]", + "rng_ring_osc_clk[3]", + "sys_cpu_osc_ring[0](ULVT16)", + "sys_cpu_osc_ring[1](ULVT20)", + "sys_cpu_osc_ring[2](ULVT16)", + "sys_cpu_osc_ring[3](ULVT16)", + "sys_cpu_osc_ring[4](ULVT16)", + "am_ring_osc_clk_out_top[0](SVT16)", + "am_ring_osc_clk_out_top[1](LVT20)"; + }; + ao_pinctrl: pinctrl@8e700 { compatible =3D "amlogic,pinctrl-a4"; #address-cells =3D <2>; --=20 2.42.0 From nobody Sat Oct 4 14:13:12 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E80C2242D6A; Fri, 15 Aug 2025 08:37:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247062; cv=none; b=C9FhapBN8Opoh9P8RuwkhkoqYmcevrDVuL3qv9xSAzAYLJHW3BL85sdtSrdKQXpngQRGSZ4k2AGzb/Kqjeq0dLRgabQtEcu1dCf7uecKr6+eTiGCR9j/EKc0PR62CvQybGDGRYHe1d6Cr7LTePTcPH0cOMovzRqfORR1LCGxyPc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247062; c=relaxed/simple; bh=ZE9QZXldOA2fAz/Jp9Rj+ACinn8pv88gC+RHGtrNOgc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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Fri, 15 Aug 2025 08:37:41 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 15 Aug 2025 16:37:36 +0800 Subject: [PATCH 10/13] arm64: dts: amlogic: A5: Add clk-measure controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250815-add-more-socs-to-support-clk_measure-v1-10-59f04ba67457@amlogic.com> References: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> In-Reply-To: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755247057; l=4959; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=+rNhxW5k+895xe8+dWTUbJTXjfJCo6DlrCn7/3Oc7eA=; b=3tf/QeTEs7Rnm4u+NO5CEpipA5qttEyM8fZzYxsaHoHpoc3j5zJngsaeFQ1MMnMExrV39Nl42 14hJ8lqPF7EAXLtsjOXo9FZcfejmRqiZ9OFyOVq720u1UY8dTS0yGxW X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add the clk-measure controller node for A5 SoC family. Signed-off-by: Chuan Liu --- arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi | 202 ++++++++++++++++++++++++= ++++ 1 file changed, 202 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-a5.dtsi index b1da8cbaa25a..4db3ff4a0522 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi @@ -67,4 +67,206 @@ gpio_intc: interrupt-controller@4080 { amlogic,channel-interrupts =3D <10 11 12 13 14 15 16 17 18 19 20 21>; }; + + clk_msr: clock-measure@48000 { + compatible =3D "amlogic,clk-measure"; + reg =3D <0x0 0x48000 0x0 0x1c>; + clkmsr-reg-v2; + clkmsr-indices =3D <0>, + <1>, + <2>, + <3>, + <6>, + <10>, + <11>, + <12>, + <13>, + <14>, + <15>, + <16>, + <17>, + <18>, + <19>, + <20>, + <21>, + <23>, + <24>, + <25>, + <26>, + <27>, + <28>, + <30>, + <31>, + <35>, + <79>, + <106>, + <111>, + <112>, + <113>, + <115>, + <116>, + <117>, + <118>, + <119>, + <120>, + <121>, + <122>, + <123>, + <124>, + <125>, + <126>, + <127>, + <128>, + <129>, + <130>, + <131>, + <132>, + <133>, + <134>, + <135>, + <136>, + <137>, + <138>, + <139>, + <140>, + <141>, + <142>, + <143>, + <144>, + <145>, + <146>, + <147>, + <148>, + <149>, + <150>, + <151>, + <152>, + <153>, + <154>, + <155>, + <156>, + <157>, + <158>, + <159>, + <162>, + <163>, + <164>, + <165>, + <166>, + <167>, + <168>, + <169>, + <176>, + <177>, + <178>, + <179>, + <180>, + <181>, + <182>, + <183>, + <184>, + <185>, + <186>, + <187>, + <188>, + <189>; + clkmsr-names =3D "sys_clk", + "axi_clk", + "rtc_clk", + "dspa", + "cpu_clk_div16", + "fclk_div5", + "mpll0", + "mpll1", + "mpll2", + "mpll3", + "fclk_50m", + "sys_oscin32k_i", + "rtc_pll", + "mpll_clk_test_out", + "hifi_pll", + "gp0_pll", + "gp1_pll", + "sys_pll_div16", + "ddr_dpll_pt_clk", + "nna_axi", + "nna_core", + "rtc_sec_pulse_out", + "rtc_osc_clk_out", + "mod_eth_phy_ref_clk", + "mod_eth_tx_clk", + "mod_eth_rx_clk_rmii", + "rama_clk", + "deskew_pll_clk_div32_out", + "saradc", + "ts", + "sd_emmc_c", + "sd_emmc_a", + "gpio_msr_clk", + "spicc_1", + "spicc_0", + "o_mst_sclk_vad", + "o_mst_mclk_vad", + "o_pdm_sysclk", + "mod_audio_pdm_dclk_o", + "o_vad_clk", + "earcrx_dmac_clk", + "earcrx_cmdc_clk", + "earctx_dmac_clk", + "earctx_dmdc_clk", + "tohdmitx_bclk", + "tohdmitx_mclk", + "tohdmitx_spdif_clk", + "toacodec_bclk", + "toacodec_mclk", + "spdifout_b_mst_clk", + "spdifout_mst_clk", + "spdifin_mst_clk", + "audio_mclk", + "vad_clk", + "tdmout_d_sclk", + "tdmout_c_sclk", + "tdmout_b_sclk", + "tdmout_a_sclk", + "tdminb_lb_sclk", + "tdmin_lb_sclk", + "tdmin_d_sclk", + "tdmin_c_sclk", + "tdmin_b_sclk", + "tdmin_a_sclk", + "resampleb_clk", + "resamplea_clk", + "pdmb_sysclk", + "pdmb_dclk", + "pdm_sysclk", + "pdm_dclk", + "alockerb_out_clk", + "alockerb_in_clk", + "alocker_out_clk", + "alocker_in_clk", + "audio_mst_clk[34]", + "audio_mst_clk[35]", + "pwm_h", + "pwm_g", + "pwm_f", + "pwm_e", + "pwm_d", + "pwm_c", + "pwm_b", + "pwm_a", + "rng_ring_osc_clk[0]", + "rng_ring_osc_clk[1]", + "rng_ring_osc_clk[2]", + "rng_ring_osc_clk[3]", + "dmc_osc_ring(LVT16)", + "dsp_osc_ring(SVT16)", + "axi_srama_osc_ring(SVT16)", + "nna_osc_ring[0](ULVT20)", + "nna_osc_ring[1](LVT16)", + "sys_cpu_osc_ring[0](ULVT16)", + "sys_cpu_osc_ring[1](ULVT20)", + "sys_cpu_osc_ring[2](ULVT16)", + "sys_cpu_osc_ring[3](LVT16)", + "axi_sramb_osc_ring(SVT16)"; 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Fri, 15 Aug 2025 08:37:41 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 15 Aug 2025 16:37:37 +0800 Subject: [PATCH 11/13] arm64: dts: amlogic: S7: Add clk-measure controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250815-add-more-socs-to-support-clk_measure-v1-11-59f04ba67457@amlogic.com> References: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> In-Reply-To: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755247057; l=6696; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=PoSXtN4p9w7+3ZDjnmmafQk3tbymutEzrxBWWPNf4KQ=; b=BFSveRD3UTKVYfTKrMSrEV9ZMwR8xJv08Vqf3Za4QljmCsTJEo63bA1428WunmBhvVHzAYkBq r63tG7I+Zo5C5WaXthTNqXqXvDcTQja4pF5t4oZF8mHeoe6QrFIRPoV X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add the clk-measure controller node for S7 SoC family. Signed-off-by: Chuan Liu --- arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi | 253 ++++++++++++++++++++++++= ++++ 1 file changed, 253 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-s7.dtsi index 260918b37b9a..f6b2dae3db39 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi @@ -175,6 +175,259 @@ gpiocc: gpio@300 { gpio-ranges =3D <&periphs_pinctrl 0 (AMLOGIC_GPIO_CC<<8) 2>; }; }; + clk_msr: clock-measure@48000 { + compatible =3D "amlogic,clk-measure"; + reg =3D <0x0 0x48000 0x0 0x1c>; + clkmsr-reg-v2; + clkmsr-indices =3D <0>, + <1>, + <2>, + <5>, + <6>, + <8>, + <10>, + <11>, + <12>, + <13>, + <15>, + <18>, + <19>, + <20>, + <21>, + <22>, + <23>, + <24>, + <25>, + <26>, + <27>, + <28>, + <29>, + <30>, + <32>, + <33>, + <34>, + <36>, + <37>, + <38>, + <39>, + <40>, + <49>, + <50>, + <51>, + <52>, + <53>, + <54>, + <55>, + <57>, + <58>, + <59>, + <60>, + <61>, + <62>, + <63>, + <64>, + <65>, + <66>, + <67>, + <76>, + <77>, + <78>, + <80>, + <81>, + <82>, + <84>, + <85>, + <86>, + <87>, + <88>, + <93>, + <99>, + <106>, + <110>, + <111>, + <113>, + <114>, + <115>, + <116>, + <118>, + <121>, + <130>, + <131>, + <132>, + <133>, + <134>, + <135>, + <136>, + <137>, + <138>, + <139>, + <140>, + <141>, + <142>, + <143>, + <144>, + <145>, + <146>, + <147>, + <148>, + <149>, + <150>, + <151>, + <152>, + <153>, + <154>, + <160>, + <161>, + <162>, + <163>, + <164>, + <165>, + <166>, + <167>, + <168>, + <169>, + <176>, + <177>, + <178>, + <179>, + <180>, + <181>, + <182>, + <183>, + <184>, + <185>, + <186>, + <187>, + <188>, + <189>, + <190>, + <191>, + <192>; + clkmsr-names =3D "sys_clk", + "axi_clk", + "rtc_clk", + "mali", + "cpu_clk_div16", + "cecb_clk", + "fclk_div5", + "p21_usb2_ckout", + "p20_usb2_ckout", + "eth_mpll_test", + "fclk_50m", + "gp1_pll", + "hifi_pll", + "gp0_pll", + "hifi1_pll", + "eth_fclk_50m_ckout", + "sys_pll_div16", + "ddr_dpll_pt_clk", + "mod_Tsin_A_CLK_IN", + "ext_Tsin_B_CLK_IN", + "mod_Tsin_C_CLK_IN", + "mod_Tsin_D_CLK_IN", + "dsi_pll_div_clk_out", + "dsi_pll_clk", + "eth_125m", + "eth_rmii", + "co_clkin_to_mac", + "co_rx_clk", + "co_tx_clk", + "eth_phy_rxclk", + "eth_phy_plltxclk", + "ephy_test_clk", + "hdmi_vx1_pix_clk", + "vid_pll_div_clk_out", + "enci", + "encp", + "encl", + "vdac", + "cdac", + "lcd_an_ph2", + "lcd_an_ph3", + "hdmitx_pixel", + "vdin_meas", + "vpu", + "vpu_clkb", + "vpu_clkb_tmp", + "vpu_clkc", + "vid_lock", + "vapb", + "ge2d", + "hdmitx_tmds", + "hdmitx_sys", + "hdmitx_fe", + "hdmitx_prif", + "hdmitx_200m", + "hdmitx_aud", + "audio_tohdmitx_mclk", + "audio_tohdmitx_bclk", + "audio_tohdmitx_lrclk", + "audio_tohdmitx_spdif_clk", + "htx_aes_clk", + "vdec", + "hevcf", + "deskew_pll_clk_div32_out", + "sc", + "saradc", + "sd_emmc_c", + "sd_emmc_b", + "sd_emmc_a", + "gpio_msr_clk", + "spicc", + "ts", + "o_vad_clk", + "au_dac_clk_x128", + "audio_locker_in_clk", + "audio_locker_out_clk", + "audio_tdmout_c_sclk", + "audio_tdmout_b_sclk", + "audio_tdmout_a_sclk", + "audio_tdmin_lb_sclk", + "audio_tdmin_c_sclk", + "audio_tdmin_b_sclk", + "audio_tdmin_a_sclk", + "audio_resamplea_clk", + "audio_pdm_sysclk", + "audio_spdifout_b_mst_clk", + "audio_spdifout_mst_clk", + "audio_spdifin_mst_clk", + "mod_audio_pdm_dclk_o", + "audio_resampleb_clk", + "pcie_pipe_clk", + "pcie_ref_clk", + "pcie_upcrx_cdrclk", + "pcie_upcrx_clk_sync_b20", + "pcie_u3p2pll1_clk_div16", + "pcie_u3p2pll0_clkout", + "pcie_ref_clk_p", + "pwm_j", + "pwm_i", + "pwm_h", + "pwm_g", + "pwm_f", + "pwm_e", + "pwm_d", + "pwm_c", + "pwm_b", + "pwm_a", + "rng_ring_clk[0]", + "rng_ring_clk[1]", + "rng_ring_clk[2]", + "rng_ring_clk[3]", + "osc_ring_clk[0](a55 core0 14_slvt)", + "osc_ring_clk[1](a55 core1 14_slvt)", + "osc_ring_clk[2](a55 core2 14_slvt)", + "osc_ring_clk[3](a55 core3 14_slvt)", + "osc_ring_clk[4](a55_pwr[0] 16_slvt)", + "osc_ring_clk[5](a55_pwr[1] 14_lvt)", + "osc_ring_clk[6](a55_pwr[2] 14_rvt)", + "osc_ring_clk[7](mali[0] 14_lvt)", + "osc_ring_clk[8](mali[1] 14_rvt)", + "osc_ring_clk[9](dos[0] 16_lvt)", + "osc_ring_clk[10](dos[1] 14_rvt)", + "osc_ring_clk[11](ddr[0] 9t_14_lvt)", + "osc_ring_clk[12](top[0] 16_rvt)"; + }; }; }; }; --=20 2.42.0 From nobody Sat Oct 4 14:13:12 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 537702528FD; Fri, 15 Aug 2025 08:37:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247062; cv=none; b=n0jzGJX7rQ2RdEPxEHNZN/vS5fepbvMl1yuyShSF8hw4GM9K4r8foQ/LgnyRFd0w/WuQlzkouuyydQUCRWBNI1Qbnw7QdFzcJ1/rDeFOosRE4MiCrtagIMOG4C7UzzELHBCdZcODN5WqTZOKZXVMN46W3m2vmDQgJZdJHpU7snE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247062; c=relaxed/simple; bh=zHm9FDgn4q6/xxPLyj5fLKXqr5ss/Uk6/ql8RR2vJxs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=HDXX0h79thJgEmMqy2Bwa8XcDwuJsLn3VIz2uYTvjYZRYLuxo31F7ZEtXOCm6ucI9Qxh8nuCcxOxHOjxY6t+0AJFPtugKWIRywRHWZOlDprzGZ/h5fNteQSdyc3yQ7kWE1dnIDPgkzeT5BsSzIPXHNwDkCEsr4pe0//2RChkmBw= ARC-Authentication-Results: i=1; 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Fri, 15 Aug 2025 08:37:41 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 15 Aug 2025 16:37:38 +0800 Subject: [PATCH 12/13] arm64: dts: amlogic: S7D: Add clk-measure controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250815-add-more-socs-to-support-clk_measure-v1-12-59f04ba67457@amlogic.com> References: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> In-Reply-To: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755247057; l=6399; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=Vv1XnmhYWT2bsyKCicoFjDp0lmFh6QrlHLuGDXvx8XI=; b=JVTdbUXHo0i01T7e5acBX+rmguv7bUz3qeR6KpGdWPBzXBe3X/bijI6wn2BQ9RWIn0aNIWQ2k QM94obZUizJAf1UnQX/YGPACOeLuWpyCOAz0W/BHKhxynCqIWbPWxol X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add the clk-measure controller node for S7D SoC family. Signed-off-by: Chuan Liu --- arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi | 243 +++++++++++++++++++++++= ++++ 1 file changed, 243 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi b/arch/arm64/boot= /dts/amlogic/amlogic-s7d.dtsi index c4d260d5bb58..a958cde53fa1 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi @@ -184,6 +184,249 @@ gpiocc: gpio@300 { gpio-ranges =3D <&periphs_pinctrl 0 (AMLOGIC_GPIO_CC<<8) 2>; }; }; + clk_msr: clock-measure@48000 { + compatible =3D "amlogic,clk-measure"; + reg =3D <0x0 0x48000 0x0 0x1c>; + clkmsr-reg-v2; + clkmsr-indices =3D <0>, + <1>, + <2>, + <4>, + <5>, + <6>, + <8>, + <9>, + <10>, + <11>, + <12>, + <13>, + <15>, + <18>, + <19>, + <20>, + <21>, + <22>, + <23>, + <24>, + <25>, + <26>, + <31>, + <32>, + <33>, + <34>, + <36>, + <37>, + <38>, + <39>, + <40>, + <49>, + <50>, + <51>, + <52>, + <53>, + <54>, + <55>, + <57>, + <58>, + <59>, + <60>, + <61>, + <62>, + <63>, + <64>, + <65>, + <66>, + <67>, + <76>, + <77>, + <78>, + <80>, + <81>, + <82>, + <84>, + <85>, + <86>, + <87>, + <88>, + <89>, + <93>, + <97>, + <99>, + <106>, + <110>, + <111>, + <113>, + <114>, + <115>, + <116>, + <117>, + <118>, + <121>, + <130>, + <131>, + <132>, + <133>, + <134>, + <135>, + <136>, + <137>, + <138>, + <139>, + <140>, + <141>, + <142>, + <143>, + <144>, + <145>, + <146>, + <147>, + <160>, + <161>, + <162>, + <163>, + <164>, + <165>, + <166>, + <167>, + <168>, + <169>, + <176>, + <177>, + <178>, + <179>, + <180>, + <181>, + <182>, + <183>, + <184>, + <185>, + <186>, + <187>, + <188>, + <189>, + <190>, + <191>, + <192>; + clkmsr-names =3D "sys_clk", + "axi_clk", + "rtc_clk", + "mali_stack", + "mali", + "cpu_clk_div16", + "cecb_clk", + "mali_aclkm", + "fclk_div5", + "p21_usb2_ckout", + "p20_usb2_ckout", + "eth_mpll_test", + "fclk_50m", + "gp1_pll", + "hifi_pll", + "gp0_pll", + "hifi1_pll", + "eth_fclk_50m_ckout", + "sys_pll_div16", + "ddr_dpll_pt_clk", + "mod_Tsin_A_CLK_IN", + "mod_Tsin_B_CLK_IN", + "earcrx_pll_clk_out", + "eth_125m", + "eth_rmii", + "co_clkin_to_mac", + "co_rx_clk", + "co_tx_clk", + "eth_phy_rxclk", + "eth_phy_plltxclk", + "ephy_test_clk", + "hdmi_vx1_pix_clk", + "vid_pll_div_clk_out", + "enci", + "encp", + "encl", + "vdac", + "cdac", + "lcd_an_ph2", + "lcd_an_ph3", + "hdmitx_pixel", + "vdin_meas", + "vpu", + "vpu_clkb", + "vpu_clkb_tmp", + "vpu_clkc", + "vid_lock", + "vapb", + "ge2d", + "hdmitx_tmds", + "hdmitx_sys", + "hdmitx_fe", + "hdmitx_prif", + "hdmitx_200m", + "hdmitx_aud", + "audio_tohdmitx_mclk", + "audio_tohdmitx_bclk", + "audio_tohdmitx_lrclk", + "audio_tohdmitx_spdif_clk", + "htx_aes_clk", + "amfc", + "vdec", + "hcodec", + "hevcf", + "deskew_pll_clk_div32_out", + "sc", + "saradc", + "sd_emmc_c", + "sd_emmc_b", + "sd_emmc_a", + "gpio_msr_clk", + "aux_clk_o", + "spicc", + "ts", + "o_vad_clk", + "au_dac_clk_x128", + "audio_locker_in_clk", + "audio_locker_out_clk", + "audio_tdmout_c_sclk", + "audio_tdmout_b_sclk", + "audio_tdmout_a_sclk", + "audio_tdmin_lb_sclk", + "audio_tdmin_c_sclk", + "audio_tdmin_b_sclk", + "audio_tdmin_a_sclk", + "audio_resamplea_clk", + "audio_pdm_sysclk", + "audio_spdifout_b_mst_clk", + "audio_spdifout_mst_clk", + "audio_spdifin_mst_clk", + "mod_audio_pdm_dclk_o", + "audio_resampleb_clk", + "pwm_j", + "pwm_i", + "pwm_h", + "pwm_g", + "pwm_f", + "pwm_e", + "pwm_d", + "pwm_c", + "pwm_b", + "pwm_a", + "rng_ring_clk[0]", + "rng_ring_clk[1]", + "rng_ring_clk[2]", + "rng_ring_clk[3]", + "osc_ring_clk[0](a55 core0 14_slvt)", + "osc_ring_clk[1](a55 core1 14_slvt)", + "osc_ring_clk[2](a55 core1 14_slvt)", + "osc_ring_clk[3](a55 core1 14_slvt)", + "osc_ring_clk[4](a55_pwr[0] 16_slvt)", + "osc_ring_clk[5](a55_pwr[1] 14_lvt)", + "osc_ring_clk[6](a55_pwr[2] 14_rvt)", + "osc_ring_clk[7](mali[1] 14_lvt)", + "osc_ring_clk[8](mali[1] 14_rvt)", + "osc_ring_clk[9](dos[0] 16_lvt)", + "osc_ring_clk[10](dos[1] 14_rvt)", + "osc_ring_clk[11](ddr[0] 9t_14_lvt)", + "osc_ring_clk[12](top[0] 16_rvt)"; + }; }; }; }; --=20 2.42.0 From nobody Sat Oct 4 14:13:12 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 081DA2459F8; Fri, 15 Aug 2025 08:37:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247062; cv=none; b=DFU03qkJ/5JS1n/e6EPLr0YNlYfkKjh8J3lWK8Su4kY64hEEN6OmH5VnnaDA6HXGlhCKJjD6FFJEyMHIWp5qLmz7/8fbu52IAk9GisxnyLmpSUqU3pGLrH53uhQPS45jB4DJa8fO152yclDJnVGXGApKAtLi8K0RVrS/GNVI4xw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755247062; c=relaxed/simple; bh=4rHg6PbdWwvxur/Olkz+xdYjJwYQBoyJ/1e2IHkd5pE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=otu1KjPNryZs8ywB6LG6a977OygiE4fEYUG+n/L8JRebKQi9OfmKu0BlaKLYaMQG3mUUWDKx36EbNrHOJJgZl/FbNOXt5P9cYeq6aaTJ32tAFvA+Y+FOszMm6gIQPEgGR/2RZPy1KrV4j2F6837zDqKZiqgMDaixjKANaHBBk5A= ARC-Authentication-Results: i=1; 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Fri, 15 Aug 2025 08:37:41 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 15 Aug 2025 16:37:39 +0800 Subject: [PATCH 13/13] arm64: dts: amlogic: S6: Add clk-measure controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250815-add-more-socs-to-support-clk_measure-v1-13-59f04ba67457@amlogic.com> References: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> In-Reply-To: <20250815-add-more-socs-to-support-clk_measure-v1-0-59f04ba67457@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755247057; l=7872; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=JGpYLHPu4HOmr+mDeiIXrC30j92VsgQpCg8JGdcHu0A=; b=sylv3HjOSOUxRyDdjkKPtqnqECv24/9zfray8sW2hRkH8c0a6IDZlEJc8fXAJVqS7Ler1D147 0DzlafTi20JCRcJxAJIEXrj2sQN9uc9o53uCfGf6MD/8chNiiW+Kzc3 X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add the clk-measure controller node for S6 SoC family. Signed-off-by: Chuan Liu --- arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi | 312 ++++++++++++++++++++++++= ++++ 1 file changed, 312 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-s6.dtsi index 5f602f1170c0..b8dbdad91d79 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi @@ -189,6 +189,318 @@ gpiocc: gpio@300 { gpio-ranges =3D <&periphs_pinctrl 0 (AMLOGIC_GPIO_CC<<8) 2>; }; }; + + clk_msr: clock-measure@48000 { + compatible =3D "amlogic,clk-measure"; + reg =3D <0x0 0x48000 0x0 0x1c>; + clkmsr-reg-v2; + clkmsr-indices =3D <0>, + <1>, + <2>, + <3>, + <4>, + <5>, + <6>, + <7>, + <8>, + <9>, + <10>, + <11>, + <12>, + <13>, + <15>, + <18>, + <19>, + <20>, + <21>, + <22>, + <23>, + <24>, + <25>, + <26>, + <27>, + <28>, + <29>, + <30>, + <32>, + <33>, + <34>, + <36>, + <37>, + <38>, + <39>, + <40>, + <49>, + <50>, + <51>, + <52>, + <53>, + <54>, + <55>, + <57>, + <58>, + <59>, + <60>, + <61>, + <62>, + <63>, + <64>, + <65>, + <66>, + <67>, + <70>, + <71>, + <72>, + <73>, + <74>, + <75>, + <76>, + <77>, + <78>, + <79>, + <80>, + <81>, + <82>, + <84>, + <85>, + <86>, + <87>, + <88>, + <89>, + <93>, + <99>, + <106>, + <108>, + <109>, + <110>, + <111>, + <113>, + <114>, + <115>, + <116>, + <117>, + <118>, + <121>, + <130>, + <132>, + <133>, + <134>, + <135>, + <136>, + <137>, + <138>, + <139>, + <140>, + <141>, + <142>, + <143>, + <144>, + <145>, + <147>, + <148>, + <149>, + <150>, + <151>, + <152>, + <153>, + <154>, + <160>, + <161>, + <162>, + <163>, + <164>, + <165>, + <166>, + <167>, + <168>, + <169>, + <175>, + <176>, + <177>, + <178>, + <179>, + <180>, + <181>, + <182>, + <183>, + <184>, + <185>, + <186>, + <187>, + <188>, + <189>, + <190>, + <191>, + <192>, + <193>, + <194>, + <195>, + <196>, + <197>, + <198>, + <199>, + <201>, + <204>, + <205>, + <206>, + <207>, + <208>, + <209>, + <210>; + clkmsr-names =3D "sys_clk", + "axi_clk", + "rtc_clk", + "dspa", + "mali_stack", + "mali", + "cpu_clk_div16", + "mali_aclkm", + "cecb_clk", + "gp2_pll", + "fclk_div5", + "p21_usb2_ckout", + "p20_usb2_ckout", + "eth_mpll_test", + "fclk_50m", + "gp1_pll", + "hifi_pll", + "gp0_pll", + "hifi1_pll", + "eth_fclk_50m_ckout", + "sys_pll_div16", + "ddr_dpll_pt_clk", + "mod_Tsin_A_CLK_IN", + "ext_Tsin_B_CLK_IN", + "mod_Tsin_C_CLK_IN", + "mod_Tsin_D_CLK_IN", + "dsi_pll_div_clk_out", + "dsi_pll_clk", + "eth_125m", + "eth_rmii", + "co_clkin_to_mac", + "co_rx_clk", + "co_tx_clk", + "eth_phy_rxclk", + "eth_phy_plltxclk", + "ephy_test_clk", + "hdmi_vx1_pix_clk", + "vid_pll_div_clk_out", + "enci", + "encp", + "encl", + "vdac", + "cdac", + "lcd_an_ph2", + "lcd_an_ph3", + "hdmitx_pixel", + "vdin_meas", + "vpu", + "vpu_clkb", + "vpu_clkb_tmp", + "vpu_clkc", + "vid_lock", + "vapb", + "ge2d", + "dsi_meas", + "dsi_phy", + "csi_phy", + "cts_csi2_adapt_clk", + "cts_csi2_data ", + "csi_phy_out", + "hdmitx_tmds", + "hdmitx_sys", + "hdmitx_fe", + "rama_clk", + "hdmitx_prif", + "hdmitx_200m", + "hdmitx_aud", + "audio_tohdmitx_mclk", + "audio_tohdmitx_bclk", + "audio_tohdmitx_lrclk", + "audio_tohdmitx_spdif_clk", + "htx_aes_clk", + "amfc", + "vdec", + "hevcf", + "deskew_pll_clk_div32_out", + "cmpr", + "dewarpa", + "sc", + "aux_adc_clk", + "sd_emmc_c", + "sd_emmc_b", + "sd_emmc_a", + "gpio_msr_clk", + "aux_clk_o", + "spicc", + "ts", + "o_vad_clk", + "audio_locker_in_clk", + "audio_locker_out_clk", + "audio_tdmout_c_sclk", + "audio_tdmout_b_sclk", + "audio_tdmout_a_sclk", + "audio_tdmin_lb_sclk", + "audio_tdmin_c_sclk", + "audio_tdmin_b_sclk", + "audio_tdmin_a_sclk", + "audio_resamplea_clk", + "audio_pdm_sysclk", + "audio_spdifout_b_mst_clk", + "audio_spdifout_mst_clk", + "audio_spdifin_mst_clk", + "audio_resampleb_clk", + "pcie_pipe_clk", + "pcie_ref_clk", + "pcie_upcrx_cdrclk", + "pcie_upcrx_clk_sync_b20", + "pcie_u3p2pll1_clk_div16", + "pcie_u3p2pll0_clkout", + "pcie_ref_clk_p", + "pwm_j", + "pwm_i", + "pwm_h", + "pwm_g", + "pwm_f", + "pwm_e", + "pwm_d", + "pwm_c", + "pwm_b", + "pwm_a", + "rng_ring_clk[0]", + "rng_ring_clk[1]", + "rng_ring_clk[2]", + "rng_ring_clk[3]", + "rng_ring_clk[4]", + "am_ring_osc_clk_out[0]", + "am_ring_osc_clk_out[1]", + "am_ring_osc_clk_out[2]", + "am_ring_osc_clk_out[3]", + "am_ring_osc_clk_out[4]", + "am_ring_osc_clk_out[5]", + "am_ring_osc_clk_out[6]", + "am_ring_osc_clk_out[7]", + "am_ring_osc_clk_out[8]", + "am_ring_osc_clk_out[9]", + "am_ring_osc_clk_out[10]", + "am_ring_osc_clk_out[11]", + "am_ring_osc_clk_out[12]", + "am_ring_osc_clk_out[13]", + "am_ring_osc_clk_out[14]", + "am_ring_osc_clk_out[15]", + "am_ring_osc_clk_out[16]", + "nna_core", + "vc9000e_aclk", + "vc9000e_core", + "pcie_tl", + "u3p2pll1_clk_div16", + "u3p2pll0_clkout", + "upctx_clk_sync_b20", + "upcrx_carclk", + "usb_pipe_clk", + "earcrx_pll_out", + "mclk_pll"; + }; }; }; }; --=20 2.42.0