From nobody Sat Oct 4 17:33:48 2025 Received: from lelvem-ot01.ext.ti.com (lelvem-ot01.ext.ti.com [198.47.23.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E909C283CBF; Thu, 14 Aug 2025 22:40:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755211252; cv=none; b=tXxzLK0NTovToBVuWhBjoy2yc1jdao9BGyUQ3yhnAdEyrnQ3+JSVpwcUxLdYi9Lv0hlhCZXhl6Jx1RBJlrWtQUqfImecaLjsd44P+dBd9F8UbFg/68GtdTrt0W9HwHBxaY6I4FV+a3rxQd4Phc2NmrJr9eJWY2ImdZ6IPO+hV2o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755211252; c=relaxed/simple; bh=SOLigrP0Kvr4B06rYcn087ZUWQV5INJxCj8qe6tCy5I=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=rePqYtHe5nPtaG/f31AqWluGTQ7OntOEIohy5J/rqrTiDM7yfbtpDAn0RGi43oZLj+MrvASA+SkrfsHGgq4hRT+msZd5Ffes7AWNIwjWSkrwT9lusGGm9tXGFanHqHG/kXOAreUG4EGrIDo3IQxE2k6tbpTEJQHKz4JM3PsT/vM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=ZMRFQiWc; arc=none smtp.client-ip=198.47.23.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="ZMRFQiWc" Received: from lelvem-sh02.itg.ti.com ([10.180.78.226]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTP id 57EMekox2027539; Thu, 14 Aug 2025 17:40:46 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1755211246; bh=K+KkPvt+5YqitIjyXKFONKPwzzQwwlSib9d9RCFbJ+k=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ZMRFQiWchUKprKIJWhOsxxPFgQ1LB5422zf7wlnpAz9LQgyN7azP1HlGhpBBVUjLl r6oWvyPP8poWDkxI4UMI88twpAShnPfF0O6tKxhdiU1aWBkc8sVDA89M6SIS8vbbM5 1Al/IVXdEbhH5VlQRzGOzxRZCCzXFmgVJQm59zzY= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by lelvem-sh02.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 57EMekO32016350 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Thu, 14 Aug 2025 17:40:46 -0500 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Thu, 14 Aug 2025 17:40:46 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Thu, 14 Aug 2025 17:40:46 -0500 Received: from uda0510294.dhcp.ti.com (uda0510294.dhcp.ti.com [172.24.234.212]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 57EMcw4w096792; Thu, 14 Aug 2025 17:40:42 -0500 From: Beleswar Padhi To: , , , , , CC: , , , , , , , Subject: [PATCH 23/33] arm64: dts: ti: k3-am62a: Enable Mailbox nodes at the board level Date: Fri, 15 Aug 2025 04:08:29 +0530 Message-ID: <20250814223839.3256046-24-b-padhi@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250814223839.3256046-1-b-padhi@ti.com> References: <20250814223839.3256046-1-b-padhi@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Mailbox nodes defined in the top-level AM62A SoC dtsi files are incomplete and may not be functional unless they are extended with a chosen interrupt and connection to a remote processor. As the remote processors depend on memory nodes which are only known at the board integration level, these nodes should only be enabled when provided with the above information. Disable the Mailbox nodes in the dtsi files and only enable the ones that are actually used on a given board. Signed-off-by: Beleswar Padhi --- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-am62a-main.dtsi index 9cad79d7bbc1..d5f018768981 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -804,6 +804,7 @@ mailbox0_cluster0: mailbox@29000000 { #mbox-cells =3D <1>; ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; + status =3D "disabled"; }; =20 mailbox0_cluster1: mailbox@29010000 { @@ -813,6 +814,7 @@ mailbox0_cluster1: mailbox@29010000 { #mbox-cells =3D <1>; ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; + status =3D "disabled"; }; =20 mailbox0_cluster2: mailbox@29020000 { @@ -822,6 +824,7 @@ mailbox0_cluster2: mailbox@29020000 { #mbox-cells =3D <1>; ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; + status =3D "disabled"; }; =20 mailbox0_cluster3: mailbox@29030000 { @@ -831,6 +834,7 @@ mailbox0_cluster3: mailbox@29030000 { #mbox-cells =3D <1>; ti,mbox-num-users =3D <4>; ti,mbox-num-fifos =3D <16>; + status =3D "disabled"; }; =20 main_mcan0: can@20701000 { --=20 2.34.1