From nobody Sat Oct 4 17:33:47 2025 Received: from lelvem-ot01.ext.ti.com (lelvem-ot01.ext.ti.com [198.47.23.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6371728313B; Thu, 14 Aug 2025 22:40:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755211235; cv=none; b=FgwE7Au0gxazLIyvGcw7AKb7jvfW7YwKIXUIbskPa2FQVx+QNpz/x6dyTPOlxXDq0KQgy8mdyCZkQiuI9SdfcIRgKqiO9FRtBrRYaOv5g3TRHxJt9M/vlgwroAhTB74Va18hlm4uVSUeA1oE3uysIu54D1Ked5ZFkOAgiJTKezw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755211235; c=relaxed/simple; bh=sPnll72RMsITojm8w8wlkmdvtLG0NFjSDSRfknNeYYQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=aJNHrq1vDBS/jm1mUfDtD9lZEsCGLHlmyjT2AmIAHmjD+7JJFO8sIZWXISGcG/yHoBWKroGW4FeBPHg56psY8qnfrmBcFpXpiMwGOTatTFQm4vwt6OFo/YYnh5oiuZ8KCrhM8xu5/7ZqDvqEIi94mP72Cws0Uhd9dpDDjsFgzMM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=az3pehxN; arc=none smtp.client-ip=198.47.23.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="az3pehxN" Received: from lelvem-sh01.itg.ti.com ([10.180.77.71]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTP id 57EMeUR52027520; Thu, 14 Aug 2025 17:40:30 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1755211230; bh=yDODNrMRyMgdt+W8PN2Zi6X5n9+degVJefKihsNYFYs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=az3pehxNYp8ittbkqWwjcnq4DKKiwknxeKHQ9LMXdgFNMIu2lKWIhOnj8o+AKx2h4 MAaeENBVNKeby9h0XzuQtserSfxY7wRHpvQkH6URGqbm80oV46qGNN7LfcvdyV7IC3 ZNhs5XJCZj1F1tGfact/AKSv90QGlGvuh84rLPWg= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by lelvem-sh01.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 57EMeUMd1159167 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Thu, 14 Aug 2025 17:40:30 -0500 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Thu, 14 Aug 2025 17:40:29 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Thu, 14 Aug 2025 17:40:29 -0500 Received: from uda0510294.dhcp.ti.com (uda0510294.dhcp.ti.com [172.24.234.212]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 57EMcw4s096792; Thu, 14 Aug 2025 17:40:25 -0500 From: Beleswar Padhi To: , , , , , CC: , , , , , , , , Robert Nelson Subject: [PATCH 19/33] arm64: dts: ti: k3-am62-pocketbeagle2: Add missing cfg for TI IPC Firmware Date: Fri, 15 Aug 2025 04:08:25 +0530 Message-ID: <20250814223839.3256046-20-b-padhi@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250814223839.3256046-1-b-padhi@ti.com> References: <20250814223839.3256046-1-b-padhi@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" The wkup_r5fss0_core0_memory_region is used to store the text/data sections of the Device Manager (DM) firmware itself and is necessary for platform boot. Whereas the wkup_r5fss0_core0_dma_memory_region is used for allocating the Virtio buffers needed for IPC with the DM core which could be optional. The labels were incorrectly used in the k3-am62-pocketbeagle2.dts file. Correct the firmware memory region label Currently, only mailbox node is enabled with FIFO assignment for a single M4F remote core. Add the missing carveouts for WKUP R5F remote processor, and enable that by associating to the above carveout and mailbox. This config aligns with other AM62 boards and can be refactored out later. Signed-off-by: Beleswar Padhi --- Cc: Robert Nelson Requesting for review/test of this patch .../boot/dts/ti/k3-am62-pocketbeagle2.dts | 24 ++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts b/arch/arm64/= boot/dts/ti/k3-am62-pocketbeagle2.dts index 2e4cf65ee323..df2e1b0e74a1 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts +++ b/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts @@ -78,7 +78,13 @@ secure_ddr: optee@9e800000 { no-map; }; =20 - wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 { + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9da00000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x00 0x9da00000 0x00 0x100000>; + no-map; + }; + + wkup_r5fss0_core0_memory_region: r5f-memory@9db00000 { compatible =3D "shared-dma-pool"; reg =3D <0x00 0x9db00000 0x00 0xc00000>; no-map; @@ -297,6 +303,11 @@ mbox_m4_0: mbox-m4-0 { ti,mbox-rx =3D <0 0 0>; ti,mbox-tx =3D <1 0 0>; }; + + mbox_r5_0: mbox-r5-0 { + ti,mbox-rx =3D <2 0 0>; + ti,mbox-tx =3D <3 0 0>; + }; }; =20 &main_uart0 { @@ -356,6 +367,17 @@ &mcu_m4fss { status =3D "okay"; }; =20 +&wkup_r5fss0 { + status =3D "okay"; +}; + +&wkup_r5fss0_core0 { + mboxes =3D <&mailbox0_cluster0 &mbox_r5_0>; + memory-region =3D <&wkup_r5fss0_core0_dma_memory_region>, + <&wkup_r5fss0_core0_memory_region>; + status =3D "okay"; +}; + &mcu_pmx0 { wkup_uart0_pins_default: wkup-uart0-default-pins { pinctrl-single,pins =3D < --=20 2.34.1