From nobody Sat Oct 4 17:34:07 2025 Received: from mailout4.samsung.com (mailout4.samsung.com [203.254.224.34]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A8CE1266EFC for ; Mon, 18 Aug 2025 04:38:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=203.254.224.34 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755491888; cv=none; b=MMGfsLPfXNAuMc67G1rrch4YEU8vkQz7YCGBAME+ZO/gqXma1f0jIIWE0L3i/I9shuCpzEyRX24R3p8S0oofHZdp0GpmKQ13SKbXK6yWPMPDg6PnxInwbTAbhFhh6+OTiIXf3hGNhX7AjyRBilKqSOsq4RCAYJ6gJwLSI3r8mLE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755491888; c=relaxed/simple; bh=l7uFgGS0Xjsm5oD2LLZAJorGEp8FOCVxxpYBwP0sxgo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:MIME-Version: Content-Type:References; b=JHBZkrfekbgyRfZHre6v8B9iXfBkGmy+ot+5swdO/sugghfjsOfWOYwGwpF1e4umhZQg31ngOvVB2nMlww+KqO1nLexmNEoGNzTgrRttm1w6+wC5fjzKMBxF20MKyJNnjt8rzJQivN7qnaHKHhjoaS+CIia2350SMj1MU85aQ1U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com; spf=pass smtp.mailfrom=samsung.com; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b=HidAGXEb; arc=none smtp.client-ip=203.254.224.34 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=samsung.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="HidAGXEb" Received: from epcas5p1.samsung.com (unknown [182.195.41.39]) by mailout4.samsung.com (KnoxPortal) with ESMTP id 20250818043803epoutp04b9c7a704099eb4bb6732e026da925575~cwpFCY1cx2679326793epoutp04J for ; Mon, 18 Aug 2025 04:38:03 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout4.samsung.com 20250818043803epoutp04b9c7a704099eb4bb6732e026da925575~cwpFCY1cx2679326793epoutp04J DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1755491883; bh=43oXxFKfnsTWy5UmLZ+z7pzwjTP2nYXG45oAqT0iINc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HidAGXEb3n8+rtLRb67VjqbdwkW8ShU4IpRJmpCb8tE76nkKUA7L9sBDUF25GKCcA nLH5ASW+dUQKp9I8QJM9wZxt9/y/1FkOhpz6lQKTuod/4oZAH6IfB+kYL43esXXxkM 40fKHZsY9MhlEqvrwzwXlCABbw3w2flssTs779So= Received: from epsnrtp03.localdomain (unknown [182.195.42.155]) by epcas5p3.samsung.com (KnoxPortal) with ESMTPS id 20250818043802epcas5p3f4f768164a3d19f44e67d63533bea352~cwpEFn6bj2560625606epcas5p3x; Mon, 18 Aug 2025 04:38:02 +0000 (GMT) Received: from epcas5p2.samsung.com (unknown [182.195.38.89]) by epsnrtp03.localdomain (Postfix) with ESMTP id 4c50MF6MqPz3hhTC; Mon, 18 Aug 2025 04:38:01 +0000 (GMT) Received: from epsmtip2.samsung.com (unknown [182.195.34.31]) by epcas5p1.samsung.com (KnoxPortal) with ESMTPA id 20250814141036epcas5p1fc02cea3f97534303673eb8453b6a18f~bp305UicQ0355803558epcas5p1I; Thu, 14 Aug 2025 14:10:36 +0000 (GMT) Received: from cheetah.samsungds.net (unknown [107.109.115.53]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20250814141031epsmtip26b88e96818e2b889c40dbd1ebeaccd62~bp3xEo9mG1850318503epsmtip2N; Thu, 14 Aug 2025 14:10:31 +0000 (GMT) From: Inbaraj E To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, krzk@kernel.org, s.nawrocki@samsung.com, s.hauer@pengutronix.de, shawnguo@kernel.org, cw00.choi@samsung.com, rmfrfs@gmail.com, laurent.pinchart@ideasonboard.com, martink@posteo.de, mchehab@kernel.org, linux-fsd@tesla.com, will@kernel.org, catalin.marinas@arm.com, pankaj.dubey@samsung.com, shradha.t@samsung.com, ravi.patel@samsung.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alim.akhtar@samsung.com, linux-samsung-soc@vger.kernel.org, kernel@puri.sm, kernel@pengutronix.de, festevam@gmail.com, linux-media@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Inbaraj E Subject: [PATCH v2 07/12] media: imx-mipi-csis: Add support to configure specific vc Date: Thu, 14 Aug 2025 19:39:38 +0530 Message-ID: <20250814140943.22531-8-inbaraj.e@samsung.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250814140943.22531-1-inbaraj.e@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250814141036epcas5p1fc02cea3f97534303673eb8453b6a18f X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-541,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250814141036epcas5p1fc02cea3f97534303673eb8453b6a18f References: <20250814140943.22531-1-inbaraj.e@samsung.com> MIPI_CSIS_V3_3 and MIPI_CSIS_V3_6_3 support streaming only on VC0. The MIPI_CSIS_V4_3 present in the FSD SoC supports streaming on any one VC out of four VCs. To extend support for the FSD SoC, add the ability to configure a specific VC. The FSD CSI Rx can configure any one VC and start streaming. Signed-off-by: Inbaraj E --- drivers/media/platform/nxp/imx-mipi-csis.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/media/platform/nxp/imx-mipi-csis.c b/drivers/media/pla= tform/nxp/imx-mipi-csis.c index a3e2c8ae332f..4f6c417fdf58 100644 --- a/drivers/media/platform/nxp/imx-mipi-csis.c +++ b/drivers/media/platform/nxp/imx-mipi-csis.c @@ -54,7 +54,7 @@ =20 /* CSIS common control */ #define MIPI_CSIS_CMN_CTRL 0x04 -#define MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW BIT(16) +#define MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW(n) BIT(((n) + 16)) #define MIPI_CSIS_CMN_CTRL_INTER_MODE BIT(10) #define MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW_CTRL BIT(2) #define MIPI_CSIS_CMN_CTRL_RESET BIT(1) @@ -319,6 +319,7 @@ struct mipi_csis_device { u32 hs_settle; u32 clk_settle; } debug; + unsigned int vc; }; =20 /* -----------------------------------------------------------------------= ------ @@ -544,9 +545,10 @@ static void __mipi_csis_set_format(struct mipi_csis_de= vice *csis, const struct csis_pix_format *csis_fmt) { u32 val; + unsigned int vc =3D csis->vc; =20 /* Color format */ - val =3D mipi_csis_read(csis, MIPI_CSIS_ISP_CONFIG_CH(0)); + val =3D mipi_csis_read(csis, MIPI_CSIS_ISP_CONFIG_CH(vc)); val &=3D ~(MIPI_CSIS_ISPCFG_ALIGN_32BIT | MIPI_CSIS_ISPCFG_FMT_MASK | MIPI_CSIS_ISPCFG_PIXEL_MASK); =20 @@ -567,11 +569,11 @@ static void __mipi_csis_set_format(struct mipi_csis_d= evice *csis, val |=3D MIPI_CSIS_ISPCFG_PIXEL_MODE_DUAL; =20 val |=3D MIPI_CSIS_ISPCFG_FMT(csis_fmt->data_type); - mipi_csis_write(csis, MIPI_CSIS_ISP_CONFIG_CH(0), val); + mipi_csis_write(csis, MIPI_CSIS_ISP_CONFIG_CH(vc), val); =20 /* Pixel resolution */ val =3D format->width | (format->height << 16); - mipi_csis_write(csis, MIPI_CSIS_ISP_RESOL_CH(0), val); + mipi_csis_write(csis, MIPI_CSIS_ISP_RESOL_CH(vc), val); } =20 static int mipi_csis_calculate_params(struct mipi_csis_device *csis, @@ -631,6 +633,7 @@ static void mipi_csis_set_params(struct mipi_csis_devic= e *csis, { int lanes =3D csis->bus.num_data_lanes; u32 val; + unsigned int vc =3D csis->vc; =20 val =3D mipi_csis_read(csis, MIPI_CSIS_CMN_CTRL); val &=3D ~MIPI_CSIS_CMN_CTRL_LANE_NR_MASK; @@ -648,7 +651,7 @@ static void mipi_csis_set_params(struct mipi_csis_devic= e *csis, val =3D (0 << MIPI_CSIS_ISP_SYNC_HSYNC_LINTV_OFFSET) | (0 << MIPI_CSIS_ISP_SYNC_VSYNC_SINTV_OFFSET) | (0 << MIPI_CSIS_ISP_SYNC_VSYNC_EINTV_OFFSET); - mipi_csis_write(csis, MIPI_CSIS_ISP_SYNC_CH(0), val); + mipi_csis_write(csis, MIPI_CSIS_ISP_SYNC_CH(vc), val); =20 val =3D mipi_csis_read(csis, MIPI_CSIS_CLK_CTRL); val |=3D MIPI_CSIS_CLK_CTRL_WCLK_SRC; @@ -669,7 +672,7 @@ static void mipi_csis_set_params(struct mipi_csis_devic= e *csis, /* Update the shadow register. */ val =3D mipi_csis_read(csis, MIPI_CSIS_CMN_CTRL); mipi_csis_write(csis, MIPI_CSIS_CMN_CTRL, - val | MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW | + val | MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW(vc) | MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW_CTRL); } =20 @@ -945,6 +948,8 @@ static int mipi_csis_s_stream(struct v4l2_subdev *sd, i= nt enable) struct v4l2_subdev_state *state; int ret; =20 + csis->vc =3D 0; + if (!enable) { v4l2_subdev_disable_streams(csis->source.sd, csis->source.pad->index, BIT(0)); --=20 2.49.0