From nobody Sat Oct 4 17:34:12 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 24E052F0682; Thu, 14 Aug 2025 09:48:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755164938; cv=none; b=aCitffIrzKcWADPjWYnPRy4OU+nmiIeuToxyLZ5t/oFjq5uR94pZBlWU2ImhUMkJ/yCEOnN7q8RMuhQmxTXg9hyS/sIk1V6rcJbUDwqkO/C+x2JCstqBk+oWfZd2Ch1p8x+pl9iL0j4h7m4UlV7RAx5/zqjsdz9NtXL31B64SNU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755164938; c=relaxed/simple; bh=3HvWywzk/74wUW75FRjyiFEfmGATLSwPr1U5TNMV5n0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=M/dMNC+2Ja2ybY69DzQNVfn3TqL91aEypxx/TR84D4WKwb0YgrtU1Azv5+B2pGn7mo0HILl0qYH6UWBwe2+tNmkQxUOlOTKCqWBKdJjOAhLVBApS+IJ2xf9vEAamGzwSeRM8xy1wY3CJxxu5kADCnVPX3nLRceb/D7JjJcDxvks= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=GszPgjYn; arc=none smtp.client-ip=198.175.65.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="GszPgjYn" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1755164937; x=1786700937; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3HvWywzk/74wUW75FRjyiFEfmGATLSwPr1U5TNMV5n0=; b=GszPgjYn+Mc47NZuh+kPUd32qE7V9LwWcLCEX0IMyBIbLUUJMeV2+I+4 NAIrmZcCsWVo+D+LFPIXOR9D7zO0KRDB3rsHAvhObMhIe/drDF7o0kxHr DLN8CaP8SbRq1UhSsB/kq+VQgYEwaIDVGUKmufJX2viPxNxI7w9gCOY+1 B+A2b4F7X2c1nePUlvUFJmO9Riukl3vUaibGMNXw7RUVl0++WEMOscd6M 38FWleM1oHDVux1T2KjvFRANoIWZLnLYsw7GrLOszba238mYIupRfavxb K8RIO1xIUwGILfmSiAqMuvFUCCNGFAZfpzJBkDUMLn13tf5jZpAU/E23k w==; X-CSE-ConnectionGUID: 3JiURt27S6qSsirEOPiEUg== X-CSE-MsgGUID: Ccih2psrSNys3FQf5F2jDA== X-IronPort-AV: E=McAfee;i="6800,10657,11520"; a="67746949" X-IronPort-AV: E=Sophos;i="6.17,287,1747724400"; d="scan'208";a="67746949" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2025 02:48:57 -0700 X-CSE-ConnectionGUID: P0zOSWwDSN23cudyqTm5/g== X-CSE-MsgGUID: WVaXgAKtSlmIHh6TIzcekQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.17,287,1747724400"; d="scan'208";a="166980945" Received: from jkrzyszt-mobl2.ger.corp.intel.com ([10.245.244.150]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2025 02:48:53 -0700 From: Janusz Krzysztofik To: =?UTF-8?q?Christian=20K=C3=B6nig?= Cc: Sumit Semwal , Gustavo Padovan , Chris Wilson , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, linaro-mm-sig@lists.linaro.org, linux-kernel@vger.kernel.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, Janusz Krzysztofik Subject: [PATCH 1/4] dma-buf/fence-chain: Report time spent in wait_* test cases Date: Thu, 14 Aug 2025 10:16:12 +0200 Message-ID: <20250814094824.217142-7-janusz.krzysztofik@linux.intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250814094824.217142-6-janusz.krzysztofik@linux.intel.com> References: <20250814094824.217142-6-janusz.krzysztofik@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" CI results indicate excessive time spent on processing of wait_backward selftest. For easy comparison, report processing time of each wait_* test case. Suggested-by: Chris Wilson Signed-off-by: Janusz Krzysztofik --- drivers/dma-buf/st-dma-fence-chain.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/dma-buf/st-dma-fence-chain.c b/drivers/dma-buf/st-dma-= fence-chain.c index ed4b323886e43..80598da9237af 100644 --- a/drivers/dma-buf/st-dma-fence-chain.c +++ b/drivers/dma-buf/st-dma-fence-chain.c @@ -572,6 +572,7 @@ static int wait_forward(void *arg) { struct fence_chains fc; struct task_struct *tsk; + ktime_t dt; int err; int i; =20 @@ -587,8 +588,12 @@ static int wait_forward(void *arg) get_task_struct(tsk); yield_to(tsk, true); =20 + dt =3D -ktime_get(); for (i =3D 0; i < fc.chain_length; i++) dma_fence_signal(fc.fences[i]); + dt +=3D ktime_get(); + + pr_info("%s: %d signals in %llu ns\n", __func__, fc.chain_length, ktime_t= o_ns(dt)); =20 err =3D kthread_stop_put(tsk); =20 @@ -601,6 +606,7 @@ static int wait_backward(void *arg) { struct fence_chains fc; struct task_struct *tsk; + ktime_t dt; int err; int i; =20 @@ -616,8 +622,12 @@ static int wait_backward(void *arg) get_task_struct(tsk); yield_to(tsk, true); =20 + dt =3D -ktime_get(); for (i =3D fc.chain_length; i--; ) dma_fence_signal(fc.fences[i]); + dt +=3D ktime_get(); + + pr_info("%s: %d signals in %llu ns\n", __func__, fc.chain_length, ktime_t= o_ns(dt)); =20 err =3D kthread_stop_put(tsk); =20 @@ -646,6 +656,7 @@ static int wait_random(void *arg) { struct fence_chains fc; struct task_struct *tsk; + ktime_t dt; int err; int i; =20 @@ -663,8 +674,12 @@ static int wait_random(void *arg) get_task_struct(tsk); yield_to(tsk, true); =20 + dt =3D -ktime_get(); for (i =3D 0; i < fc.chain_length; i++) dma_fence_signal(fc.fences[i]); + dt +=3D ktime_get(); + + pr_info("%s: %d signals in %llu ns\n", __func__, fc.chain_length, ktime_t= o_ns(dt)); =20 err =3D kthread_stop_put(tsk); =20 --=20 2.50.1 From nobody Sat Oct 4 17:34:12 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5549F2F3C32; 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X-CSE-ConnectionGUID: wKsRwhK3SL6pYTqZDsqdlQ== X-CSE-MsgGUID: gokvXmNOSn227NpWobMEkA== X-IronPort-AV: E=McAfee;i="6800,10657,11520"; a="67746964" X-IronPort-AV: E=Sophos;i="6.17,287,1747724400"; d="scan'208";a="67746964" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2025 02:49:01 -0700 X-CSE-ConnectionGUID: 4Of09AkvQHqarNvX/65yoQ== X-CSE-MsgGUID: JplX0PE3SDiTnAP8zoJ52w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.17,287,1747724400"; d="scan'208";a="166980954" Received: from jkrzyszt-mobl2.ger.corp.intel.com ([10.245.244.150]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2025 02:48:57 -0700 From: Janusz Krzysztofik To: =?UTF-8?q?Christian=20K=C3=B6nig?= Cc: Sumit Semwal , Gustavo Padovan , Chris Wilson , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, linaro-mm-sig@lists.linaro.org, linux-kernel@vger.kernel.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, Janusz Krzysztofik Subject: [PATCH 2/4] dma-buf/fence-chain: Let test cases decide which fence to wait on Date: Thu, 14 Aug 2025 10:16:13 +0200 Message-ID: <20250814094824.217142-8-janusz.krzysztofik@linux.intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250814094824.217142-6-janusz.krzysztofik@linux.intel.com> References: <20250814094824.217142-6-janusz.krzysztofik@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Test cases that create threads around __wait_fence_chains() function now pass info about the whole chain to those threads as an argument, with no hint on which fence of the chain to wait on. That decision is hard coded into the __wait_fence_chains() function which always selects the tail of the chain. Since future test cases may decide to spawn threads that wait on arbitrary links of the chain, pass a single fence as the thread argument instead. Signed-off-by: Janusz Krzysztofik --- drivers/dma-buf/st-dma-fence-chain.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/dma-buf/st-dma-fence-chain.c b/drivers/dma-buf/st-dma-= fence-chain.c index 80598da9237af..bff4192420d8b 100644 --- a/drivers/dma-buf/st-dma-fence-chain.c +++ b/drivers/dma-buf/st-dma-fence-chain.c @@ -560,9 +560,9 @@ static int signal_backward(void *arg) =20 static int __wait_fence_chains(void *arg) { - struct fence_chains *fc =3D arg; + struct dma_fence *f =3D arg; =20 - if (dma_fence_wait(fc->tail, false)) + if (dma_fence_wait(f, false)) return -EIO; =20 return 0; @@ -580,7 +580,7 @@ static int wait_forward(void *arg) if (err) return err; =20 - tsk =3D kthread_run(__wait_fence_chains, &fc, "dmabuf/wait"); + tsk =3D kthread_run(__wait_fence_chains, fc.tail, "dmabuf/wait"); if (IS_ERR(tsk)) { err =3D PTR_ERR(tsk); goto err; @@ -614,7 +614,7 @@ static int wait_backward(void *arg) if (err) return err; =20 - tsk =3D kthread_run(__wait_fence_chains, &fc, "dmabuf/wait"); + tsk =3D kthread_run(__wait_fence_chains, fc.tail, "dmabuf/wait"); if (IS_ERR(tsk)) { err =3D PTR_ERR(tsk); goto err; @@ -666,7 +666,7 @@ static int wait_random(void *arg) =20 randomise_fences(&fc); =20 - tsk =3D kthread_run(__wait_fence_chains, &fc, "dmabuf/wait"); + tsk =3D kthread_run(__wait_fence_chains, fc.tail, "dmabuf/wait"); if (IS_ERR(tsk)) { err =3D PTR_ERR(tsk); goto err; --=20 2.50.1 From nobody Sat Oct 4 17:34:12 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6E5B32F60AE; Thu, 14 Aug 2025 09:49:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755164947; cv=none; b=J3wf9bdB8VCD0wLpAXTHZZ4OMlFSAOEiGfYAunpjQWzVy5xgbijbkqpaScgciSCWWzt4qc2GAhfYGKobQHKasngA1/+nkoV80DQM8SOSQRp3mk+fwCjk/XQePo4dcxZKYPJYhkstNE/Psg5ONgJkY73YKPZV0EE+gX5B2EjhjSw= ARC-Message-Signature: i=1; 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d="scan'208";a="166980969" Received: from jkrzyszt-mobl2.ger.corp.intel.com ([10.245.244.150]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2025 02:49:01 -0700 From: Janusz Krzysztofik To: =?UTF-8?q?Christian=20K=C3=B6nig?= Cc: Sumit Semwal , Gustavo Padovan , Chris Wilson , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, linaro-mm-sig@lists.linaro.org, linux-kernel@vger.kernel.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, Janusz Krzysztofik Subject: [PATCH 3/4] dma-buf/fence-chain: Wait on each tested chain link Date: Thu, 14 Aug 2025 10:16:14 +0200 Message-ID: <20250814094824.217142-9-janusz.krzysztofik@linux.intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250814094824.217142-6-janusz.krzysztofik@linux.intel.com> References: <20250814094824.217142-6-janusz.krzysztofik@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Userspace may build dma_fence chains of arbitrary length step by step, e.g. via drm_syncobj IOCTLs, and each step may start waiting on a chain link it has added. Adjust the wait_* selftests to cover such extreme use cases. Having that done, don't enable signaling on each chain link when building the chain. There is no point in doing that as long as no user is waiting on the link, and even then, signaling is enabled automatically as soon as a user starts waiting on the fence. Let individual test cases decide which links of the chain should be waited on / need signaling enabled. Suggested-by: Christian K=C3=B6nig Signed-off-by: Janusz Krzysztofik --- drivers/dma-buf/st-dma-fence-chain.c | 120 ++++++++++++++++++++------- 1 file changed, 91 insertions(+), 29 deletions(-) diff --git a/drivers/dma-buf/st-dma-fence-chain.c b/drivers/dma-buf/st-dma-= fence-chain.c index bff4192420d8b..0e7a24ed7caeb 100644 --- a/drivers/dma-buf/st-dma-fence-chain.c +++ b/drivers/dma-buf/st-dma-fence-chain.c @@ -145,8 +145,6 @@ static int fence_chains_init(struct fence_chains *fc, u= nsigned int count, } =20 fc->tail =3D fc->chains[i]; - - dma_fence_enable_sw_signaling(fc->chains[i]); } =20 fc->chain_length =3D i; @@ -570,23 +568,34 @@ static int __wait_fence_chains(void *arg) =20 static int wait_forward(void *arg) { + struct task_struct **tsk; struct fence_chains fc; - struct task_struct *tsk; ktime_t dt; + int i =3D 0; int err; - int i; =20 err =3D fence_chains_init(&fc, CHAIN_SZ, seqno_inc); if (err) return err; =20 - tsk =3D kthread_run(__wait_fence_chains, fc.tail, "dmabuf/wait"); - if (IS_ERR(tsk)) { - err =3D PTR_ERR(tsk); + tsk =3D kmalloc_array(fc.chain_length, sizeof(*tsk), GFP_KERNEL); + if (!tsk) { + err =3D -ENOMEM; goto err; } - get_task_struct(tsk); - yield_to(tsk, true); + + for (i =3D 0; i < fc.chain_length; i++) { + tsk[i] =3D kthread_run(__wait_fence_chains, fc.chains[i], + "dmabuf/wait-%llu", fc.fences[i]->seqno); + if (IS_ERR(tsk[i])) { + err =3D PTR_ERR(tsk[i]); + pr_err("Reported %d for kthread_run(%llu)!\n", + err, fc.fences[i]->seqno); + goto err; + } + get_task_struct(tsk[i]); + yield_to(tsk[i], true); + } =20 dt =3D -ktime_get(); for (i =3D 0; i < fc.chain_length; i++) @@ -595,32 +604,53 @@ static int wait_forward(void *arg) =20 pr_info("%s: %d signals in %llu ns\n", __func__, fc.chain_length, ktime_t= o_ns(dt)); =20 - err =3D kthread_stop_put(tsk); - err: + while (i--) { + int tsk_err =3D kthread_stop_put(tsk[i]); + + if (tsk_err) + pr_err("Reported %d for kthread_stop_put(%llu)!\n", + tsk_err, fc.fences[i]->seqno); + + if (!err) + err =3D tsk_err; + } + kfree(tsk); + fence_chains_fini(&fc); return err; } =20 static int wait_backward(void *arg) { + struct task_struct **tsk; struct fence_chains fc; - struct task_struct *tsk; ktime_t dt; + int i =3D 0; int err; - int i; =20 err =3D fence_chains_init(&fc, CHAIN_SZ, seqno_inc); if (err) return err; =20 - tsk =3D kthread_run(__wait_fence_chains, fc.tail, "dmabuf/wait"); - if (IS_ERR(tsk)) { - err =3D PTR_ERR(tsk); + tsk =3D kmalloc_array(fc.chain_length, sizeof(*tsk), GFP_KERNEL); + if (!tsk) { + err =3D -ENOMEM; goto err; } - get_task_struct(tsk); - yield_to(tsk, true); + + for (i =3D 0; i < fc.chain_length; i++) { + tsk[i] =3D kthread_run(__wait_fence_chains, fc.chains[i], + "dmabuf/wait-%llu", fc.fences[i]->seqno); + if (IS_ERR(tsk[i])) { + err =3D PTR_ERR(tsk[i]); + pr_err("Reported %d for kthread_run(%llu)!\n", + err, fc.fences[i]->seqno); + goto err; + } + get_task_struct(tsk[i]); + yield_to(tsk[i], true); + } =20 dt =3D -ktime_get(); for (i =3D fc.chain_length; i--; ) @@ -629,9 +659,20 @@ static int wait_backward(void *arg) =20 pr_info("%s: %d signals in %llu ns\n", __func__, fc.chain_length, ktime_t= o_ns(dt)); =20 - err =3D kthread_stop_put(tsk); - + i =3D fc.chain_length; err: + while (i--) { + int tsk_err =3D kthread_stop_put(tsk[i]); + + if (tsk_err) + pr_err("Reported %d for kthread_stop_put(%llu)!\n", + tsk_err, fc.fences[i]->seqno); + + if (!err) + err =3D tsk_err; + } + kfree(tsk); + fence_chains_fini(&fc); return err; } @@ -654,11 +695,11 @@ static void randomise_fences(struct fence_chains *fc) =20 static int wait_random(void *arg) { + struct task_struct **tsk; struct fence_chains fc; - struct task_struct *tsk; ktime_t dt; + int i =3D 0; int err; - int i; =20 err =3D fence_chains_init(&fc, CHAIN_SZ, seqno_inc); if (err) @@ -666,13 +707,24 @@ static int wait_random(void *arg) =20 randomise_fences(&fc); =20 - tsk =3D kthread_run(__wait_fence_chains, fc.tail, "dmabuf/wait"); - if (IS_ERR(tsk)) { - err =3D PTR_ERR(tsk); + tsk =3D kmalloc_array(fc.chain_length, sizeof(*tsk), GFP_KERNEL); + if (!tsk) { + err =3D -ENOMEM; goto err; } - get_task_struct(tsk); - yield_to(tsk, true); + + for (i =3D 0; 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X-CSE-ConnectionGUID: rGmNI3EzTUC3N5tEia6NlA== X-CSE-MsgGUID: 6z4rDNLXQ6utJWJe+GsRVQ== X-IronPort-AV: E=McAfee;i="6800,10657,11520"; a="67746987" X-IronPort-AV: E=Sophos;i="6.17,287,1747724400"; d="scan'208";a="67746987" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2025 02:49:09 -0700 X-CSE-ConnectionGUID: Rs2vrowXQQyB6UfU1Y+Jjw== X-CSE-MsgGUID: MVSGJjwDRbG3McwsLsRftw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.17,287,1747724400"; d="scan'208";a="166980981" Received: from jkrzyszt-mobl2.ger.corp.intel.com ([10.245.244.150]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2025 02:49:05 -0700 From: Janusz Krzysztofik To: =?UTF-8?q?Christian=20K=C3=B6nig?= Cc: Sumit Semwal , Gustavo Padovan , Chris Wilson , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, linaro-mm-sig@lists.linaro.org, linux-kernel@vger.kernel.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, Janusz Krzysztofik Subject: [PATCH 4/4] dma-buf/fence-chain: Speed up processing of rearmed callbacks Date: Thu, 14 Aug 2025 10:16:15 +0200 Message-ID: <20250814094824.217142-10-janusz.krzysztofik@linux.intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250814094824.217142-6-janusz.krzysztofik@linux.intel.com> References: <20250814094824.217142-6-janusz.krzysztofik@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" When first user starts waiting on a not yet signaled fence of a chain link, a dma_fence_chain callback is added to a user fence of that link. When the user fence of that chain link is then signaled, the chain is traversed in search for a first not signaled link and the callback is rearmed on a user fence of that link. Since chain fences may be exposed to user space, e.g. over drm_syncobj IOCTLs, users may start waiting on any link of the chain, then many links of a chain may have signaling enabled and their callbacks added to their user fences. Once an arbitrary user fence is signaled, all dma_fence_chain callbacks added to it so far must be rearmed to another user fence of the chain. In extreme scenarios, when all N links of a chain are awaited and then signaled in reverse order, the dma_fence_chain callback may be called up to N * (N + 1) / 2 times (an arithmetic series). To avoid that potential excessive accumulation of dma_fence_chain callbacks, rearm a trimmed-down, signal only callback version to the base fence of a previous link, if not yet signaled, otherwise just signal the base fence of the current link instead of traversing the chain in search for a first not signaled link and moving all callbacks collected so far to a user fence of that link. Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12904 Suggested-by: Chris Wilson Signed-off-by: Janusz Krzysztofik --- drivers/dma-buf/dma-fence-chain.c | 101 +++++++++++++++++++++++++----- 1 file changed, 84 insertions(+), 17 deletions(-) diff --git a/drivers/dma-buf/dma-fence-chain.c b/drivers/dma-buf/dma-fence-= chain.c index a8a90acf4f34d..90eff264ee05c 100644 --- a/drivers/dma-buf/dma-fence-chain.c +++ b/drivers/dma-buf/dma-fence-chain.c @@ -119,46 +119,113 @@ static const char *dma_fence_chain_get_timeline_name= (struct dma_fence *fence) return "unbound"; } =20 -static void dma_fence_chain_irq_work(struct irq_work *work) +static void signal_irq_work(struct irq_work *work) { struct dma_fence_chain *chain; =20 chain =3D container_of(work, typeof(*chain), work); =20 - /* Try to rearm the callback */ - if (!dma_fence_chain_enable_signaling(&chain->base)) - /* Ok, we are done. No more unsignaled fences left */ - dma_fence_signal(&chain->base); + dma_fence_signal(&chain->base); dma_fence_put(&chain->base); } =20 -static void dma_fence_chain_cb(struct dma_fence *f, struct dma_fence_cb *c= b) +static void signal_cb(struct dma_fence *f, struct dma_fence_cb *cb) +{ + struct dma_fence_chain *chain; + + chain =3D container_of(cb, typeof(*chain), cb); + init_irq_work(&chain->work, signal_irq_work); + irq_work_queue(&chain->work); +} + +static void rearm_irq_work(struct irq_work *work) +{ + struct dma_fence_chain *chain; + struct dma_fence *prev; + + chain =3D container_of(work, typeof(*chain), work); + + rcu_read_lock(); + prev =3D rcu_dereference(chain->prev); + if (prev && dma_fence_add_callback(prev, &chain->cb, signal_cb)) + prev =3D NULL; + rcu_read_unlock(); + if (prev) + return; + + /* Ok, we are done. No more unsignaled fences left */ + signal_irq_work(work); +} + +static inline bool fence_is_signaled__nested(struct dma_fence *fence) +{ + if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) + return true; + + if (fence->ops->signaled && fence->ops->signaled(fence)) { + unsigned long flags; + + spin_lock_irqsave_nested(fence->lock, flags, SINGLE_DEPTH_NESTING); + dma_fence_signal_locked(fence); + spin_unlock_irqrestore(fence->lock, flags); + + return true; + } + + return false; +} + +static bool prev_is_signaled(struct dma_fence_chain *chain) +{ + struct dma_fence *prev; + bool result; + + rcu_read_lock(); + prev =3D rcu_dereference(chain->prev); + result =3D !prev || fence_is_signaled__nested(prev); + rcu_read_unlock(); + + return result; +} + +static void rearm_or_signal_cb(struct dma_fence *f, struct dma_fence_cb *c= b) { struct dma_fence_chain *chain; =20 chain =3D container_of(cb, typeof(*chain), cb); - init_irq_work(&chain->work, dma_fence_chain_irq_work); + if (prev_is_signaled(chain)) { + /* Ok, we are done. No more unsignaled fences left */ + init_irq_work(&chain->work, signal_irq_work); + } else { + /* Try to rearm the callback */ + init_irq_work(&chain->work, rearm_irq_work); + } + irq_work_queue(&chain->work); - dma_fence_put(f); } =20 static bool dma_fence_chain_enable_signaling(struct dma_fence *fence) { struct dma_fence_chain *head =3D to_dma_fence_chain(fence); + int err =3D -ENOENT; =20 - dma_fence_get(&head->base); - dma_fence_chain_for_each(fence, &head->base) { - struct dma_fence *f =3D dma_fence_chain_contained(fence); + if (WARN_ON(!head)) + return false; =20 - dma_fence_get(f); - if (!dma_fence_add_callback(f, &head->cb, dma_fence_chain_cb)) { + dma_fence_get(fence); + if (head->fence) + err =3D dma_fence_add_callback(head->fence, &head->cb, rearm_or_signal_c= b); + if (err) { + if (prev_is_signaled(head)) { dma_fence_put(fence); - return true; + } else { + init_irq_work(&head->work, rearm_irq_work); + irq_work_queue(&head->work); + err =3D 0; } - dma_fence_put(f); } - dma_fence_put(&head->base); - return false; + + return !err; } =20 static bool dma_fence_chain_signaled(struct dma_fence *fence) --=20 2.50.1