From nobody Sat Oct 4 15:57:30 2025 Received: from szxga06-in.huawei.com (szxga06-in.huawei.com [45.249.212.32]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CABE02FABFB for ; Thu, 14 Aug 2025 09:30:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.32 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755163820; cv=none; b=QGdY3Rm53vA33V33KB/XOrjKDwIXPbI/nO3g+TW3EmmdU71+S6Ib13Vm/DklCUWVCwMfB+tC2EY+NMfASZTIumpm4fBwEsur+s6s6NQyV3O0bwfBxGuHpNxCmNU3mcb6DKFSHkbM/F7kSYRvU45+dnqWfRmGKf+Y3I1Uy/AvNyg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755163820; c=relaxed/simple; bh=3DkszcYRwc0tIhu3mjks3cZGjjYrdY3cAAuJxXBnL+4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=qimbxgT+LAR8LU9WZuy5edEsrbDL0by0wyyh/kOXsHO+2WSPlvcwGzXuIpVg3z8Zii0bvEvO0g0/qS/yYDUqjI4Mc7060EE5mMwdma6/6vCzUSAebcRvE16yHuIy54GnGp/pmqWW+weIWGqSwz2pMz4vRmc7QL97DqbOzZ9iRXw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; arc=none smtp.client-ip=45.249.212.32 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Received: from mail.maildlp.com (unknown [172.19.88.214]) by szxga06-in.huawei.com (SkyGuard) with ESMTP id 4c2g3P70KDz2dMH0; Thu, 14 Aug 2025 17:31:13 +0800 (CST) Received: from kwepemj200003.china.huawei.com (unknown [7.202.194.15]) by mail.maildlp.com (Postfix) with ESMTPS id B430B1A016C; Thu, 14 Aug 2025 17:30:09 +0800 (CST) Received: from localhost.huawei.com (10.90.31.46) by kwepemj200003.china.huawei.com (7.202.194.15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Thu, 14 Aug 2025 17:30:08 +0800 From: Qinxin Xia To: , , CC: , , , , , , , , , Subject: [PATCH 1/2] iommu/debug: Add IOMMU page table dump debug facility Date: Thu, 14 Aug 2025 17:30:04 +0800 Message-ID: <20250814093005.2040511-2-xiaqinxin@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20250814093005.2040511-1-xiaqinxin@huawei.com> References: <20250814093005.2040511-1-xiaqinxin@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems500001.china.huawei.com (7.221.188.70) To kwepemj200003.china.huawei.com (7.202.194.15) This patch introduces a comprehensive debugging mechanism for IOMMU page tables, providing visibility into IOVA mappings and protection information. The feature is particularly valuable for debugging complex DMA mapping issues and validating IOMMU configurations. Key components: 1. New debugfs interface: Creates /sys/kernel/debug/io_page_tables 2. Domain-group hierarchy: Organizes output by domain and group 3. IOVA mapping dump: Shows allocated IOVA ranges and protections 4. Device enumeration: Lists all devices in each IOMMU group Implementation details: - Added dump_iova_prot callback to iommu_domain_ops - Implemented iommu_group_and_iova_dump() to traverse groups - Created iommu_iova_info_dump() to walk IOVA allocations - Added CONFIG_IO_PTDUMP_DEBUGFS for compile-time enablement - Provided iommu_domain_to_iovad() helper for IOVA access The debug output includes: -- domain [address] -- - group [id] - [device1] - [device2] ---[ RANGE START ]--- [IOVA mapping details] ---[ RANGE END ]--- This feature helps diagnose: - IOVA allocation patterns - Protection flag mismatches - Unexpected domain/group mappings - Device-to-domain assignment issues Signed-off-by: Qinxin Xia --- drivers/iommu/dma-iommu.c | 15 ++++ drivers/iommu/dma-iommu.h | 4 + drivers/iommu/iommu.c | 175 ++++++++++++++++++++++++++++++++++++++ include/linux/io_ptdump.h | 16 ++++ include/linux/iommu.h | 10 ++- mm/Kconfig.debug | 19 +++++ mm/Makefile | 2 + mm/io_ptdump.c | 24 ++++++ mm/io_ptdump_debugfs.c | 17 ++++ 9 files changed, 281 insertions(+), 1 deletion(-) create mode 100644 include/linux/io_ptdump.h create mode 100644 mm/io_ptdump.c create mode 100644 mm/io_ptdump_debugfs.c diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index ea2ef53bd4fe..d44cd613ea69 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -448,6 +448,21 @@ void iommu_put_msi_cookie(struct iommu_domain *domain) kfree(cookie); } =20 +#ifdef CONFIG_IO_PTDUMP +/** + * iommu_domain_to_iovad - Retrieve the IOVA domain from an IOMMU domain + * @domain: IOMMU domain with an associated IOVA cookie + * + * This function returns the IOVA domain (iovad) structure associated with + * the given IOMMU domain. The domain must have been initialized with an + * IOVA cookie (typically through iommu_dma_init_domain()). + */ +struct iova_domain *iommu_domain_to_iovad(struct iommu_domain *domain) +{ + return &domain->iova_cookie->iovad; +} +#endif + /** * iommu_dma_get_resv_regions - Reserved region driver helper * @dev: Device from iommu_get_resv_regions() diff --git a/drivers/iommu/dma-iommu.h b/drivers/iommu/dma-iommu.h index eca201c1f963..18b06c62af9d 100644 --- a/drivers/iommu/dma-iommu.h +++ b/drivers/iommu/dma-iommu.h @@ -24,6 +24,10 @@ int iommu_dma_sw_msi(struct iommu_domain *domain, struct= msi_desc *desc, =20 extern bool iommu_dma_forcedac; =20 +#ifdef CONFIG_IO_PTDUMP +struct iova_domain *iommu_domain_to_iovad(struct iommu_domain *domain); +#endif + #else /* CONFIG_IOMMU_DMA */ =20 static inline void iommu_setup_dma_ops(struct device *dev) diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 060ebe330ee1..8fc89a5b34b8 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -1061,6 +1061,181 @@ struct iommu_group *iommu_group_alloc(void) } EXPORT_SYMBOL_GPL(iommu_group_alloc); =20 +#ifdef CONFIG_IO_PTDUMP +#include +#include + +struct dump_domain { + struct iommu_domain *domain; + struct list_head groups; + struct list_head list; +}; + +struct dump_group { + struct iommu_group *group; + struct list_head list; +}; + +/** + * iova_info_dump - dump iova alloced + * @s - file structure used to generate serialized output + * @iovad: - iova domain in question. + */ +static int iommu_iova_info_dump(struct seq_file *s, struct iommu_domain *d= omain) +{ + struct iova_domain *iovad; + unsigned long long pfn; + unsigned long i_shift; + struct rb_node *node; + unsigned long flags; + size_t prot_size; + + iovad =3D iommu_domain_to_iovad(domain); + if (!iovad) + return -ENOMEM; + + i_shift =3D iova_shift(iovad); + + /* Take the lock so that no other thread is manipulating the rbtree */ + spin_lock_irqsave(&iovad->iova_rbtree_lock, flags); + assert_spin_locked(&iovad->iova_rbtree_lock); + + for (node =3D rb_first(&iovad->rbroot); node; node =3D rb_next(node)) { + struct iova *iova =3D rb_entry(node, struct iova, node); + + if (iova->pfn_hi <=3D iova->pfn_lo) + continue; + + for (pfn =3D iova->pfn_lo; pfn <=3D iova->pfn_hi; ) { + prot_size =3D domain->ops->dump_iova_prot(s, domain, pfn << i_shift); + pfn =3D ((pfn << i_shift) + prot_size) >> i_shift; + } + } + + spin_unlock_irqrestore(&iovad->iova_rbtree_lock, flags); + return 0; +} + +/** + * iommu_group_and_iova_dump - Collect and dump IOMMU group and IOVA mappi= ng information + * @s: seq_file target for output + * + * This function traverses all IOMMU groups in the system and dumps hierar= chical information + * about domains, groups, devices, and IOVA mappings. Only groups with def= ault domains using + * DMA_IOVA cookie type are processed. + * + * Key operations: + * 1. Iterates through all registered IOMMU groups + * 2. Filters groups with default domains of type IOMMU_COOKIE_DMA_IOVA + * 3. Organizes groups by domain to avoid duplicate domain output + * 4. Outputs hierarchical information including: + * - Domain address + * - Group IDs and their member devices + * - IOVA mapping ranges via iommu_iova_info_dump() + * + * Data structure hierarchy: + * domain_list (list_head) + * =E2=94=9C=E2=94=80=E2=94=80 dump_domain + * =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 domain: pointer to iommu_doma= in + * =E2=94=82 =E2=94=94=E2=94=80=E2=94=80 groups (list_head) + * =E2=94=82 =E2=94=94=E2=94=80=E2=94=80 dump_group + * =E2=94=82 =E2=94=94=E2=94=80=E2=94=80 group: pointer to iom= mu_group + * + */ +int iommu_group_and_iova_dump(struct seq_file *s) +{ + struct dump_domain *domain_entry, *d_tmp; + struct dump_group *group_entry, *g_tmp; + struct list_head domain_list; + struct iommu_group *group; + struct group_device *gdev; + struct kobject *kobj; + int ret =3D 0; + bool found; + + INIT_LIST_HEAD(&domain_list); + + list_for_each_entry(kobj, &iommu_group_kset->list, entry) { + group =3D container_of(kobj, struct iommu_group, kobj); + + /* Skip groups that do not meet the criteria */ + if (!group->default_domain || + group->default_domain->cookie_type !=3D IOMMU_COOKIE_DMA_IOVA) + continue; + + /* Check whether the domain already exists. */ + found =3D false; + list_for_each_entry(domain_entry, &domain_list, list) { + if (domain_entry->domain =3D=3D group->default_domain) { + found =3D true; + break; + } + } + + /* New domain, create entry */ + if (!found) { + domain_entry =3D kzalloc(sizeof(*domain_entry), GFP_KERNEL); + if (!domain_entry) { + ret =3D -ENOMEM; + goto out; + } + + domain_entry->domain =3D group->default_domain; + INIT_LIST_HEAD(&domain_entry->groups); + list_add_tail(&domain_entry->list, &domain_list); + } + + /* Create group entries */ + group_entry =3D kzalloc(sizeof(*group_entry), GFP_KERNEL); + if (!group_entry) { + ret =3D -ENOMEM; + goto out; + } + + group_entry->group =3D group; + list_add_tail(&group_entry->list, &domain_entry->groups); + } + + /* Output all domain information */ + list_for_each_entry(domain_entry, &domain_list, list) { + seq_printf(s, "-- domain %p --\n", domain_entry->domain); + + /* Output all groups in the current domain */ + list_for_each_entry(group_entry, &domain_entry->groups, list) { + seq_printf(s, "- group %d\n", group_entry->group->id); + + /* Output all devices in the group */ + for_each_group_device(group_entry->group, gdev) { + seq_printf(s, " - %s\n", dev_name(gdev->dev)); + } + } + + /* Output IOVA range */ + seq_puts(s, "---[ RANGE START ]---\n"); + ret =3D iommu_iova_info_dump(s, domain_entry->domain); + if (ret) + seq_puts(s, "IOVA INFO DUMP FAIL...\n"); + + seq_puts(s, "---[ RANGE END ]---\n"); + } + +out: + /* Release domain_list and group_list */ + list_for_each_entry_safe(domain_entry, d_tmp, &domain_list, list) { + list_for_each_entry_safe(group_entry, g_tmp, &domain_entry->groups, list= ) { + list_del(&group_entry->list); + kfree(group_entry); + } + + list_del(&domain_entry->list); + kfree(domain_entry); + } + + return ret; +} +EXPORT_SYMBOL_GPL(iommu_group_and_iova_dump); +#endif + /** * iommu_group_get_iommudata - retrieve iommu_data registered for a group * @group: the group diff --git a/include/linux/io_ptdump.h b/include/linux/io_ptdump.h new file mode 100644 index 000000000000..e087bb7751c2 --- /dev/null +++ b/include/linux/io_ptdump.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-only + * Copyright (C) 2025 HiSilicon Limited + * Author: Qinxin Xia + * + */ + +#ifndef __ASM_IO_PTDUMP_H +#define __ASM_IO_PTDUMP_H + +#ifdef CONFIG_IO_PTDUMP_DEBUGFS +void __init io_ptdump_debugfs_register(const char *name); +#else +void __init io_ptdump_debugfs_register(const char *name) { } +#endif /* CONFIG_IO_PTDUMP_DEBUGFS */ + +#endif diff --git a/include/linux/iommu.h b/include/linux/iommu.h index c30d12e16473..494a4960b8c7 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -772,7 +772,10 @@ struct iommu_domain_ops { =20 phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, dma_addr_t iova); - +#ifdef CONFIG_IO_PTDUMP + size_t (*dump_iova_prot)(struct seq_file *s, struct iommu_domain *domain, + dma_addr_t iova); +#endif bool (*enforce_cache_coherency)(struct iommu_domain *domain); int (*set_pgtable_quirks)(struct iommu_domain *domain, unsigned long quirks); @@ -1698,4 +1701,9 @@ static inline void iopf_group_response(struct iopf_gr= oup *group, { } #endif /* CONFIG_IOMMU_IOPF */ + +#ifdef CONFIG_IO_PTDUMP +int iommu_group_and_iova_dump(struct seq_file *s); +#endif /* CONFIG_IO_PTDUMP */ + #endif /* __LINUX_IOMMU_H */ diff --git a/mm/Kconfig.debug b/mm/Kconfig.debug index 32b65073d0cc..e09c9995c496 100644 --- a/mm/Kconfig.debug +++ b/mm/Kconfig.debug @@ -219,6 +219,9 @@ config ARCH_HAS_PTDUMP config PTDUMP bool =20 +config IO_PTDUMP + bool + config PTDUMP_DEBUGFS bool "Export kernel pagetable layout to userspace via debugfs" depends on DEBUG_KERNEL @@ -234,6 +237,22 @@ config PTDUMP_DEBUGFS =20 If in doubt, say N. =20 +config IO_PTDUMP_DEBUGFS + bool "Export io pagetable layout to userspace via debugfs" + depends on DEBUG_KERNEL + depends on DEBUG_FS + depends on IOMMU_IOVA + select IO_PTDUMP + help + Say Y here if you want to show the io pagetable layout in a + debugfs file. This information is only useful for kernel developers + who are working in architecture specific areas of the iommu. + It is probably not a good idea to enable this feature in a production + kernel. + + If in doubt, say N. + + config HAVE_DEBUG_KMEMLEAK bool =20 diff --git a/mm/Makefile b/mm/Makefile index ef54aa615d9d..95759ccf93c1 100644 --- a/mm/Makefile +++ b/mm/Makefile @@ -147,3 +147,5 @@ obj-$(CONFIG_SHRINKER_DEBUG) +=3D shrinker_debug.o obj-$(CONFIG_EXECMEM) +=3D execmem.o obj-$(CONFIG_TMPFS_QUOTA) +=3D shmem_quota.o obj-$(CONFIG_PT_RECLAIM) +=3D pt_reclaim.o +obj-$(CONFIG_IO_PTDUMP) +=3D io_ptdump.o +obj-$(CONFIG_IO_PTDUMP_DEBUGFS) +=3D io_ptdump_debugfs.o diff --git a/mm/io_ptdump.c b/mm/io_ptdump.c new file mode 100644 index 000000000000..9aa133de5119 --- /dev/null +++ b/mm/io_ptdump.c @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2025, hisilion limited. + * Debug helper to dump the current IO pagetables of the system + * so that we can see what the various memory ranges are set to. + * + * Author: Qinxin Xia + */ +#include +#include +#include +#include +#include +#include +#include +#include + +static int __init io_ptdump_init(void) +{ + io_ptdump_debugfs_register("io_page_tables"); + return 0; +} + +device_initcall(io_ptdump_init); diff --git a/mm/io_ptdump_debugfs.c b/mm/io_ptdump_debugfs.c new file mode 100644 index 000000000000..704ca306957e --- /dev/null +++ b/mm/io_ptdump_debugfs.c @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0 +#include +#include +#include +#include + +static int io_ptdump_show(struct seq_file *m, void *v) +{ + iommu_group_and_iova_dump(m); + return 0; +} +DEFINE_SHOW_ATTRIBUTE(io_ptdump); + +void __init io_ptdump_debugfs_register(const char *name) +{ + debugfs_create_file(name, 0400, NULL, NULL, &io_ptdump_fops); +} --=20 2.33.0 From nobody Sat Oct 4 15:57:30 2025 Received: from szxga05-in.huawei.com (szxga05-in.huawei.com [45.249.212.191]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AAF032FABFB for ; Thu, 14 Aug 2025 09:30:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.191 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755163814; cv=none; b=Rsv4BYhGFlH5RHMj5KF0ClWvmdadN3wWEqziG3+tT72XW1lA5D/kKt6xmtCxB/r8s/jWQy2zCzoXzEkGGJ/Tth2T7pteHGW1UK2gulJFg5zSDHQOyeAo4x0piUzUhzxyzjoAHhyPLtHk+Fv71vZb4HzHTyztdDFLO1CLcIje+RM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755163814; c=relaxed/simple; bh=umu6p1Xnjv7Eb71dtdWTGaIJkMemCtt+dX+UMOVtnDo=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=OIaF76aOGXRDhoMIxQTFu0+YTOGVzg23tZiGJjOAoLy5TG8deNWgMYmXti8GQNByyW3n4R/564d4Yb53kdp60ZoV9e6cxJZNWxrZFW2GDHsaYUMFIzVIEFQGi4RkSFbehr1NR5i3EGGFykFTQ5JMBmvvQNaViTU80W4qqpVTrmc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; arc=none smtp.client-ip=45.249.212.191 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Received: from mail.maildlp.com (unknown [172.19.162.112]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4c2fyv6dQyz2gKxY; Thu, 14 Aug 2025 17:27:19 +0800 (CST) Received: from kwepemj200003.china.huawei.com (unknown [7.202.194.15]) by mail.maildlp.com (Postfix) with ESMTPS id 52E1D140296; Thu, 14 Aug 2025 17:30:10 +0800 (CST) Received: from localhost.huawei.com (10.90.31.46) by kwepemj200003.china.huawei.com (7.202.194.15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Thu, 14 Aug 2025 17:30:09 +0800 From: Qinxin Xia To: , , CC: , , , , , , , , , Subject: [PATCH 2/2] iommu/io-pgtable: Add ARM SMMUv3 page table dump support Date: Thu, 14 Aug 2025 17:30:05 +0800 Message-ID: <20250814093005.2040511-3-xiaqinxin@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20250814093005.2040511-1-xiaqinxin@huawei.com> References: <20250814093005.2040511-1-xiaqinxin@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems500001.china.huawei.com (7.221.188.70) To kwepemj200003.china.huawei.com (7.202.194.15) Content-Type: text/plain; charset="utf-8" This patch implements the debug interface for dumping ARM SMMUv3 page table entries and protection information. The functionality enables detailed inspection of IOMMU mappings for debugging and validation purposes. 1. ARM SMMUv3 driver integration: - Implemented arm_smmu_dump_iova_prot() callback - Registered dump_iova_prot in iommu_domain_ops 2. ARM LPAE io-pgtable implementation: - Added arm_lpae_dump_iova_prot() to io_pgtable_ops - Defined protection bit descriptors (prot_bits) - Created io_pgtable_fmt_names for human-readable format strings - Implemented protection flag formatting in dump_prot() 3. Core io-pgtable interface extension: - Added dump_iova_prot callback to io_pgtable_ops The implementation provides detailed output for each IOVA mapping: - lvl stage Example: 0xffff2000 - 0xffff3000 lvl 2 stage ARM_64_LPAE_S1 AF SH_NS Signed-off-by: Qinxin Xia --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 13 ++ drivers/iommu/io-pgtable-arm.c | 169 ++++++++++++++++++++ include/linux/io-pgtable.h | 4 + 3 files changed, 186 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index 5968043ac802..4128b3307753 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3411,6 +3411,16 @@ arm_smmu_iova_to_phys(struct iommu_domain *domain, d= ma_addr_t iova) return ops->iova_to_phys(ops, iova); } =20 +#ifdef CONFIG_IO_PTDUMP +static size_t +arm_smmu_dump_iova_prot(struct seq_file *s, struct iommu_domain *domain, d= ma_addr_t iova) +{ + struct io_pgtable_ops *ops =3D to_smmu_domain(domain)->pgtbl_ops; + + return ops->dump_iova_prot(s, ops, iova); +} +#endif + static struct platform_driver arm_smmu_driver; =20 static @@ -3702,6 +3712,9 @@ static const struct iommu_ops arm_smmu_ops =3D { .flush_iotlb_all =3D arm_smmu_flush_iotlb_all, .iotlb_sync =3D arm_smmu_iotlb_sync, .iova_to_phys =3D arm_smmu_iova_to_phys, +#ifdef CONFIG_IO_PTDUMP + .dump_iova_prot =3D arm_smmu_dump_iova_prot, +#endif .free =3D arm_smmu_domain_free_paging, } }; diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c index 7e8e2216c294..5deb03a85aa6 100644 --- a/drivers/iommu/io-pgtable-arm.c +++ b/drivers/iommu/io-pgtable-arm.c @@ -754,6 +754,172 @@ static phys_addr_t arm_lpae_iova_to_phys(struct io_pg= table_ops *ops, return iopte_to_paddr(d.pte, data) | iova; } =20 +#ifdef CONFIG_IO_PTDUMP +#include + +struct io_ptdump_prot_bits { + uint64_t mask; + uint64_t val; + const char *set; + const char *clear; +}; + +static const struct io_ptdump_prot_bits prot_bits[] =3D { + { + .mask =3D ARM_LPAE_PTE_VALID, + .val =3D ARM_LPAE_PTE_VALID, + .set =3D "V", + .clear =3D " ", + }, + { + .mask =3D ARM_LPAE_PTE_XN, + .val =3D ARM_LPAE_PTE_XN, + .set =3D "XN", + .clear =3D " ", + }, + { + .mask =3D ARM_LPAE_PTE_DBM, + .val =3D ARM_LPAE_PTE_DBM, + .set =3D "DBM", + .clear =3D " ", + }, + { + .mask =3D ARM_LPAE_PTE_AF, + .val =3D ARM_LPAE_PTE_AF, + .set =3D "AF", + .clear =3D " ", + }, + { + .mask =3D ARM_LPAE_PTE_SH_NS, + .val =3D ARM_LPAE_PTE_SH_NS, + .set =3D "SH_NS", + .clear =3D " ", + }, + { + .mask =3D ARM_LPAE_PTE_SH_OS, + .val =3D ARM_LPAE_PTE_SH_OS, + .set =3D "SH_OS", + .clear =3D " ", + }, + { + .mask =3D ARM_LPAE_PTE_SH_IS, + .val =3D ARM_LPAE_PTE_SH_IS, + .set =3D "SH_IS", + .clear =3D " ", + }, + { + .mask =3D ARM_LPAE_PTE_NS, + .val =3D ARM_LPAE_PTE_NS, + .set =3D "NS", + .clear =3D " ", + }, + { + .mask =3D ARM_LPAE_PTE_NSTABLE, + .val =3D ARM_LPAE_PTE_NSTABLE, + .set =3D "NST", + .clear =3D " ", + }, +}; + +const char *io_pgtable_fmt_names[] =3D { + "ARM_32_LPAE_S1", + "ARM_32_LPAE_S2", + "ARM_64_LPAE_S1", + "ARM_64_LPAE_S2", + "ARM_V7S", + "ARM_MALI_LPAE", + "AMD_IOMMU_V1", + "AMD_IOMMU_V2", + "APPLE_DART", + "APPLE_DART2", +}; + +struct io_ptdump_prot { + int lvl; + int stage; + char *attr; + size_t size; +}; + +static void dump_prot(struct seq_file *s, arm_lpae_iopte pte) +{ + int capacity =3D 64; + const char *attr; + int length =3D 0; + + char *prot =3D kzalloc(capacity * sizeof(char), GFP_KERNEL); + + if (!prot) + return; + + /* Traverse all predefined permission bits */ + for (size_t i =3D 0; i < ARRAY_SIZE(prot_bits); i++) { + if ((pte & prot_bits[i].mask) =3D=3D prot_bits[i].val) + attr =3D prot_bits[i].set; + else + attr =3D prot_bits[i].clear; + + size_t attr_len =3D strlen(attr); + + /* Check and extend the buffer */ + while (length + attr_len > capacity) { + capacity *=3D 2; + + char *temp =3D krealloc(prot, capacity * sizeof(char), GFP_KERNEL); + + if (!temp) { + kfree(prot); + return; + } + + prot =3D temp; + } + + length +=3D snprintf(prot + length, capacity - length, "%s ", attr); + + /* Security check: prevents abnormal buffer expansion */ + if (length > PAGE_SIZE) { + pr_err("len =3D %zu, attr =3D %s, i =3D%d\n", length, attr, i); + kfree(prot); + return; + } + } + + seq_printf(s, "%s", prot); + kfree(prot); +} + +static size_t arm_lpae_dump_iova_prot(struct seq_file *s, struct io_pgtabl= e_ops *ops, + unsigned long iova) +{ + struct arm_lpae_io_pgtable *data =3D io_pgtable_ops_to_data(ops); + struct iova_to_phys_data d; + int ret; + + struct io_pgtable_walk_data walk_data =3D { + .data =3D &d, + .visit =3D visit_iova_to_phys, + .addr =3D iova, + .end =3D iova + 1, + }; + + /* Only the mapped iova will be output */ + ret =3D __arm_lpae_iopte_walk(data, &walk_data, data->pgd, data->start_le= vel); + if (ret) + return ARM_LPAE_GRANULE(data); + + seq_printf(s, "%lx - %lx lvl %d stage %s ", + iova, iova + ARM_LPAE_BLOCK_SIZE(d.lvl, data), + d.lvl, io_pgtable_fmt_names[data->iop.fmt]); + + /* TODO: The dump prot is incomplete and will be supplemented later... */ + dump_prot(s, d.pte); + seq_puts(s, "\n"); + + return ARM_LPAE_BLOCK_SIZE(d.lvl, data); +} +#endif + static int visit_pgtable_walk(struct io_pgtable_walk_data *walk_data, int = lvl, arm_lpae_iopte *ptep, size_t size) { @@ -950,6 +1116,9 @@ arm_lpae_alloc_pgtable(struct io_pgtable_cfg *cfg) .map_pages =3D arm_lpae_map_pages, .unmap_pages =3D arm_lpae_unmap_pages, .iova_to_phys =3D arm_lpae_iova_to_phys, +#ifdef CONFIG_IO_PTDUMP + .dump_iova_prot =3D arm_lpae_dump_iova_prot, +#endif .read_and_clear_dirty =3D arm_lpae_read_and_clear_dirty, .pgtable_walk =3D arm_lpae_pgtable_walk, }; diff --git a/include/linux/io-pgtable.h b/include/linux/io-pgtable.h index 138fbd89b1e6..307c68f0038c 100644 --- a/include/linux/io-pgtable.h +++ b/include/linux/io-pgtable.h @@ -217,6 +217,10 @@ struct io_pgtable_ops { struct iommu_iotlb_gather *gather); phys_addr_t (*iova_to_phys)(struct io_pgtable_ops *ops, unsigned long iova); +#ifdef CONFIG_IO_PTDUMP + size_t (*dump_iova_prot)(struct seq_file *s, struct io_pgtable_ops *ops, + unsigned long iova); +#endif int (*pgtable_walk)(struct io_pgtable_ops *ops, unsigned long iova, void = *wd); int (*read_and_clear_dirty)(struct io_pgtable_ops *ops, unsigned long iova, size_t size, --=20 2.33.0