From nobody Sat Oct 4 19:17:41 2025 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BDC2E2F99A9; Thu, 14 Aug 2025 08:57:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755161827; cv=none; b=cco6kd6lZAzWlrNzAHMs8dxRKQ31PR5gRjxsSEaL4v9WFlYvm7qIq85acAAqt/XidMOAke3UllHINdApGSb/dhCJpSlhFse0BWU2D0LcvaULEOZahC+siJ5x4YUjdIqidNBmenjS+sZUwLLn/e4+O/yLWA9ESLSmuaAwQQ24mZY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755161827; c=relaxed/simple; bh=EZfLfR4t3cmDAxsqjP6o4DEMZpjlft7MYQxHoiklm0I=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=HdX4rQhjUkwgqWb2WHo1nyzyxV9wg76A+86kSsWirhnv5TbYcXUyQf3V4uYe3/B8K4d7Ru7J23auaSh9h0iw0hgDhugS+vXEvGQJp517hFZxCq8t0YVD/aGinx3oYR3zlsxjmU/E8xWXsSgzsA+KhueCJJDO9Hph/8EMweYlPQU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=KZjGoFEw; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="KZjGoFEw" X-UUID: a20fd42c78ec11f08729452bf625a8b4-20250814 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=hiarOdkQkkcPVdpp4dqlsOkMDHB1Fp4L6Hv7zOVhgjc=; b=KZjGoFEwMGqnihnGakixjf9TECNDi9MTZkTaQBg8Lx9NHbYwJHcMvlsaRxMEmcpIkJTzYFXXibP6wmDj+bIyoQO4aWA1TFYkyrCBNWt/NorJOneTo8t5U5oi/lrgL/e/Qk3pKfidz5OJYVUWETO0qzfW2dRbcbQ2RS8JASDyPSs=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.3,REQID:be8029bc-b332-4570-a9b5-757aea2a8bed,IP:0,UR L:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-25 X-CID-META: VersionHash:f1326cf,CLOUDID:4ba3edf3-66cd-4ff9-9728-6a6f64661009,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102,TC:-5,Content:0|15|50,EDM: -3,IP:nil,URL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0, AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: a20fd42c78ec11f08729452bf625a8b4-20250814 Received: from mtkmbs13n2.mediatek.inc [(172.21.101.108)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1549134885; Thu, 14 Aug 2025 16:56:57 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.39; Thu, 14 Aug 2025 16:56:55 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.39 via Frontend Transport; Thu, 14 Aug 2025 16:56:54 +0800 From: Kyrie Wu To: Tiffany Lin , Andrew-CT Chen , Yunfei Dong , "Mauro Carvalho Chehab" , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Kyrie Wu , Hans Verkuil , Nicolas Dufresne , Christophe JAILLET , Sebastian Fricke , Nathan Hebert , "Arnd Bergmann" , Irui Wang , George Sun , , , , , CC: Neil Armstrong , Andrzej Pietrasiewicz Subject: [PATCH v3 6/6] media: mediatek: encoder: Add MT8196 encoder compatible data Date: Thu, 14 Aug 2025 16:56:42 +0800 Message-ID: <20250814085642.17343-7-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250814085642.17343-1-kyrie.wu@mediatek.com> References: <20250814085642.17343-1-kyrie.wu@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" From: Irui Wang MT8196 encoder use common firmware interface, add compatible data to support MT8196 encoding, and need set dma mask to support 34bit. Signed-off-by: Irui Wang --- .../vcodec/encoder/mtk_vcodec_enc_drv.c | 19 +++++++++++++++++++ .../vcodec/encoder/mtk_vcodec_enc_drv.h | 2 ++ 2 files changed, 21 insertions(+) diff --git a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_= drv.c b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.c index 50936949d527..c869c4245ebc 100644 --- a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.c +++ b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.c @@ -20,6 +20,8 @@ #include "mtk_vcodec_enc_pm.h" #include "../common/mtk_vcodec_intr.h" =20 +#define VENC_DMA_BIT_MASK 34 + static const struct mtk_video_fmt mtk_video_formats_output[] =3D { { .fourcc =3D V4L2_PIX_FMT_NV12M, @@ -299,6 +301,9 @@ static int mtk_vcodec_probe(struct platform_device *pde= v) goto err_res; } =20 + if (dev->venc_pdata->set_dma_bit_mask) + dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(VENC_DMA_BIT_MASK)); + mutex_init(&dev->enc_mutex); mutex_init(&dev->dev_mutex); mutex_init(&dev->dev_ctx_lock); @@ -450,6 +455,19 @@ static const struct mtk_vcodec_enc_pdata mt8195_pdata = =3D { .core_id =3D VENC_SYS, }; =20 +static const struct mtk_vcodec_enc_pdata mt8196_pdata =3D { + .venc_model_num =3D 8196, + .capture_formats =3D mtk_video_formats_capture_h264, + .num_capture_formats =3D ARRAY_SIZE(mtk_video_formats_capture_h264), + .output_formats =3D mtk_video_formats_output, + .num_output_formats =3D ARRAY_SIZE(mtk_video_formats_output), + .min_bitrate =3D 64, + .max_bitrate =3D 100000000, + .core_id =3D VENC_SYS, + .uses_common_fw_iface =3D true, + .set_dma_bit_mask =3D true, +}; + static const struct of_device_id mtk_vcodec_enc_match[] =3D { {.compatible =3D "mediatek,mt8173-vcodec-enc", .data =3D &mt8173_avc_pdata}, @@ -459,6 +477,7 @@ static const struct of_device_id mtk_vcodec_enc_match[]= =3D { {.compatible =3D "mediatek,mt8188-vcodec-enc", .data =3D &mt8188_pdata}, {.compatible =3D "mediatek,mt8192-vcodec-enc", .data =3D &mt8192_pdata}, {.compatible =3D "mediatek,mt8195-vcodec-enc", .data =3D &mt8195_pdata}, + {.compatible =3D "mediatek,mt8196-vcodec-enc", .data =3D &mt8196_pdata}, {}, }; MODULE_DEVICE_TABLE(of, mtk_vcodec_enc_match); diff --git a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_= drv.h b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.h index b3206a7b592d..ded794f1b37a 100644 --- a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.h +++ b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.h @@ -32,6 +32,7 @@ * @core_id: stand for h264 or vp8 encode index * @uses_34bit: whether the encoder uses 34-bit iova * @uses_common_fw_iface: whether the encoder uses common driver interface + * @set_dma_bit_mask: whether the encoder need set extra DMA bit mask */ struct mtk_vcodec_enc_pdata { u16 venc_model_num; @@ -45,6 +46,7 @@ struct mtk_vcodec_enc_pdata { u8 core_id; bool uses_34bit; bool uses_common_fw_iface; + bool set_dma_bit_mask; }; =20 /* --=20 2.46.0