From nobody Sat Oct 4 17:34:12 2025 Received: from smtpbgsg2.qq.com (smtpbgsg2.qq.com [54.254.200.128]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0CFA812C499; Thu, 14 Aug 2025 07:40:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=54.254.200.128 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755157220; cv=none; b=pgT+K5gVDpirrZcdD2uz91NxdQpINXVbetn6HiHbJXE7+x5He2APdQZiQA0U80maUZGG4dUYQz+pcZycw6qlDPD9If7fcqMCiC5GnZmf1FLzZzHwJ1dT5wP5BB7Z12kKOOt7Ou8MI9XLh27fThaPL3M23efihDZBk9l8LCXwVxU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755157220; c=relaxed/simple; bh=IgWlONQiiza0KWeYcrMSIet5Pg4O2wU0bxsR2n6Xrno=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=iRQme1B1XoXHv1s/wwontc+/0koCW2cuB+IvWDebjGbY50KSPHl4bHU9oVwccOGpeMOAcqzzvjCLJmQLfR6nlLkcBqEJclkbG23zwvq00wL606592q6q/r2mT/X0J8ozMblxr5TsWEBqbxCBYxClN5cAlrK13++vz49jui6QICg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mucse.com; spf=pass smtp.mailfrom=mucse.com; arc=none smtp.client-ip=54.254.200.128 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mucse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mucse.com X-QQ-mid: zesmtpgz8t1755157148t1faefa2e X-QQ-Originating-IP: 6fYuk5zBMASQnAnZ0HGXpGeY1glg6AWnA19oHNy9IyM= Received: from localhost.localdomain ( [203.174.112.180]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 14 Aug 2025 15:39:05 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 11060619278585155920 EX-QQ-RecipientCnt: 23 From: Dong Yibo To: andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, horms@kernel.org, corbet@lwn.net, gur.stavi@huawei.com, maddy@linux.ibm.com, mpe@ellerman.id.au, danishanwar@ti.com, lee@trager.us, gongfan1@huawei.com, lorenzo@kernel.org, geert+renesas@glider.be, Parthiban.Veerasooran@microchip.com, lukas.bulwahn@redhat.com, alexanderduyck@fb.com, richardcochran@gmail.com Cc: netdev@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, dong100@mucse.com Subject: [PATCH v4 1/5] net: rnpgbe: Add build support for rnpgbe Date: Thu, 14 Aug 2025 15:38:51 +0800 Message-Id: <20250814073855.1060601-2-dong100@mucse.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250814073855.1060601-1-dong100@mucse.com> References: <20250814073855.1060601-1-dong100@mucse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-QQ-SENDSIZE: 520 Feedback-ID: zesmtpgz:mucse.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-QQ-XMAILINFO: MiI3m6WAbdszVMVhNY/PMmjFLfINCmabMs90dSlMnhQkMlC1vZ9knzUb 2otJQ6thJ2Jwd/o9hvl27HuZ4pXzceCoYKkncfpFOBElVDZZ2fkO6AHn9hMYqM2IRpWo3Rz AiQW3LGu4ckvTnPCxEqyHZRdtY+FsfNEqz9T+F4pwA3ByypT9L42iBClnSQp1NnGHZFI0U8 RSh9UtjAJDiWmHsuEoj58en54pZSeXlT5ZO/tb//6aGNUdq2cO1Dv8YIxu/u9SEtm1mPI+9 8qef8QcQHqwMdshX/lOYxva5jVp55ayt2IQf8RcncCm25FrNnbDZSLI1sE2jvKB/eQGVOXE ZXQgi5WXpD5KOEnatKUH1vAVU/PQk5o0uBHxr5c7/dG/qP7+0HnLWnJOowO5C2ILW9mjzv/ QKi+1Jdhc2DmptFREDwBwqpcWMBqqffny7TuW4fPJXv5uOHFu4kYCq6f5NOOqEy8j7wP6W6 1biFZLxTVxUf9dbi9xwbT+2todWOz6n7ZGRSiiVF8SqcGrAqxrL1uf0z61kGMnvwPQQPVZU nIsKNnZ6wAHngwsb0qfir/W3T+5IzbfWfQ3wEoZn2pcYaUc6+4FYmd3BH927GqFN+pjOmGr U+3FI8untqZRn20U+5cOKzlK+OMuoT5wOKyE+1huyrnrWWe6qqirnzEwlvwhLhhUx53uxoy VM6FP7L7Dumdywx6D69ag3zIrth/4jd82JZ3EYppWpCJgRVht/6e0eXuehb7uz2W4ujtmcH 5QK5iyT7RKX7wplzWC2HfKcpdPLqlzb8vd6RSY6eVq9yZVgGUwLcQdhRoRD2H9R2CaOG2kD fJ2SZ4FnF4DJWevWxaxFCuX13f6KzqPQyxPjWs9qCXu788tWCTIuz08C0AqT7CfjgEAkiaP Do3T8go8uvG7rxt8tFbwSjOvbqiLfwM6IXvFA8USDS5XNHE5aHaVR49tbVXFgMTejcFRQiw qlQfqkFJgEZ0VOO1B5OFYOvvTVdBaZ5/BPTAROio1IOwzE9qdniMV5xdEV0NqyfxHMuERGA hg1iU4krO9HTa3jI8Apugq8kwhAS/AwRJtva//7cHM1qOwm894 X-QQ-XMRINFO: OD9hHCdaPRBwq3WW+NvGbIU= X-QQ-RECHKSPAM: 0 Content-Type: text/plain; charset="utf-8" Add build options and doc for mucse. Initialize pci device access for MUCSE devices. Signed-off-by: Dong Yibo --- .../device_drivers/ethernet/index.rst | 1 + .../device_drivers/ethernet/mucse/rnpgbe.rst | 21 +++ MAINTAINERS | 8 + drivers/net/ethernet/Kconfig | 1 + drivers/net/ethernet/Makefile | 1 + drivers/net/ethernet/mucse/Kconfig | 34 ++++ drivers/net/ethernet/mucse/Makefile | 7 + drivers/net/ethernet/mucse/rnpgbe/Makefile | 8 + drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h | 24 +++ .../net/ethernet/mucse/rnpgbe/rnpgbe_main.c | 154 ++++++++++++++++++ 10 files changed, 259 insertions(+) create mode 100644 Documentation/networking/device_drivers/ethernet/mucse/= rnpgbe.rst create mode 100644 drivers/net/ethernet/mucse/Kconfig create mode 100644 drivers/net/ethernet/mucse/Makefile create mode 100644 drivers/net/ethernet/mucse/rnpgbe/Makefile create mode 100644 drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h create mode 100644 drivers/net/ethernet/mucse/rnpgbe/rnpgbe_main.c diff --git a/Documentation/networking/device_drivers/ethernet/index.rst b/D= ocumentation/networking/device_drivers/ethernet/index.rst index 40ac552641a3..c8abadbe15ee 100644 --- a/Documentation/networking/device_drivers/ethernet/index.rst +++ b/Documentation/networking/device_drivers/ethernet/index.rst @@ -47,6 +47,7 @@ Contents: mellanox/mlx5/index meta/fbnic microsoft/netvsc + mucse/rnpgbe neterion/s2io netronome/nfp pensando/ionic diff --git a/Documentation/networking/device_drivers/ethernet/mucse/rnpgbe.= rst b/Documentation/networking/device_drivers/ethernet/mucse/rnpgbe.rst new file mode 100644 index 000000000000..7562fb6b8f61 --- /dev/null +++ b/Documentation/networking/device_drivers/ethernet/mucse/rnpgbe.rst @@ -0,0 +1,21 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D +Linux Base Driver for MUCSE(R) Gigabit PCI Express Adapters +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +MUCSE Gigabit Linux driver. +Copyright (c) 2020 - 2025 MUCSE Co.,Ltd. + +Identifying Your Adapter +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D +The driver is compatible with devices based on the following: + + * MUCSE(R) Ethernet Controller N500 series + * MUCSE(R) Ethernet Controller N210 series + +Support +=3D=3D=3D=3D=3D=3D=3D + If you have problems with the software or hardware, please contact our + customer support team via email at techsupport@mucse.com or check our + website at https://www.mucse.com/en/ diff --git a/MAINTAINERS b/MAINTAINERS index bd62ad58a47f..31c2babf5789 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17278,6 +17278,14 @@ T: git git://linuxtv.org/media.git F: Documentation/devicetree/bindings/media/i2c/aptina,mt9v111.yaml F: drivers/media/i2c/mt9v111.c =20 +MUCSE ETHERNET DRIVER +M: Yibo Dong +L: netdev@vger.kernel.org +S: Maintained +W: https://www.mucse.com/en/ +F: Documentation/networking/device_drivers/ethernet/mucse/ +F: drivers/net/ethernet/mucse/ + MULTIFUNCTION DEVICES (MFD) M: Lee Jones S: Maintained diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig index f86d4557d8d7..167388f9c744 100644 --- a/drivers/net/ethernet/Kconfig +++ b/drivers/net/ethernet/Kconfig @@ -129,6 +129,7 @@ source "drivers/net/ethernet/microchip/Kconfig" source "drivers/net/ethernet/mscc/Kconfig" source "drivers/net/ethernet/microsoft/Kconfig" source "drivers/net/ethernet/moxa/Kconfig" +source "drivers/net/ethernet/mucse/Kconfig" source "drivers/net/ethernet/myricom/Kconfig" =20 config FEALNX diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile index 67182339469a..1b8c4df3f594 100644 --- a/drivers/net/ethernet/Makefile +++ b/drivers/net/ethernet/Makefile @@ -65,6 +65,7 @@ obj-$(CONFIG_NET_VENDOR_MICREL) +=3D micrel/ obj-$(CONFIG_NET_VENDOR_MICROCHIP) +=3D microchip/ obj-$(CONFIG_NET_VENDOR_MICROSEMI) +=3D mscc/ obj-$(CONFIG_NET_VENDOR_MOXART) +=3D moxa/ +obj-$(CONFIG_NET_VENDOR_MUCSE) +=3D mucse/ obj-$(CONFIG_NET_VENDOR_MYRI) +=3D myricom/ obj-$(CONFIG_FEALNX) +=3D fealnx.o obj-$(CONFIG_NET_VENDOR_NATSEMI) +=3D natsemi/ diff --git a/drivers/net/ethernet/mucse/Kconfig b/drivers/net/ethernet/mucs= e/Kconfig new file mode 100644 index 000000000000..be0fdf268484 --- /dev/null +++ b/drivers/net/ethernet/mucse/Kconfig @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# Mucse network device configuration +# + +config NET_VENDOR_MUCSE + bool "Mucse devices" + default y + help + If you have a network (Ethernet) card from Mucse(R), say Y. + + Note that the answer to this question doesn't directly affect the + kernel: saying N will just cause the configurator to skip all + the questions about Mucse(R) cards. If you say Y, you will + be asked for your specific card in the following questions. + +if NET_VENDOR_MUCSE + +config MGBE + tristate "Mucse(R) 1GbE PCI Express adapters support" + depends on PCI + select PAGE_POOL + help + This driver supports Mucse(R) 1GbE PCI Express family of + adapters. + + More specific information on configuring the driver is in + . + + To compile this driver as a module, choose M here. The module + will be called rnpgbe. + +endif # NET_VENDOR_MUCSE + diff --git a/drivers/net/ethernet/mucse/Makefile b/drivers/net/ethernet/muc= se/Makefile new file mode 100644 index 000000000000..675173fa05f7 --- /dev/null +++ b/drivers/net/ethernet/mucse/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0 +# Copyright(c) 2020 - 2025 MUCSE Corporation. +# +# Makefile for the MUCSE(R) network device drivers +# + +obj-$(CONFIG_MGBE) +=3D rnpgbe/ diff --git a/drivers/net/ethernet/mucse/rnpgbe/Makefile b/drivers/net/ether= net/mucse/rnpgbe/Makefile new file mode 100644 index 000000000000..9df536f0d04c --- /dev/null +++ b/drivers/net/ethernet/mucse/rnpgbe/Makefile @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0 +# Copyright(c) 2020 - 2025 MUCSE Corporation. +# +# Makefile for the MUCSE(R) 1GbE PCI Express ethernet driver +# + +obj-$(CONFIG_MGBE) +=3D rnpgbe.o +rnpgbe-objs :=3D rnpgbe_main.o diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h b/drivers/net/ether= net/mucse/rnpgbe/rnpgbe.h new file mode 100644 index 000000000000..64b2c093bc6e --- /dev/null +++ b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright(c) 2020 - 2025 Mucse Corporation. */ + +#ifndef _RNPGBE_H +#define _RNPGBE_H + +enum rnpgbe_boards { + board_n500, + board_n210, + board_n210L, +}; + +struct mucse { + struct net_device *netdev; + struct pci_dev *pdev; +}; + +/* Device IDs */ +#define PCI_VENDOR_ID_MUCSE 0x8848 +#define PCI_DEVICE_ID_N500_QUAD_PORT 0x8308 +#define PCI_DEVICE_ID_N500_DUAL_PORT 0x8318 +#define PCI_DEVICE_ID_N210 0x8208 +#define PCI_DEVICE_ID_N210L 0x820a +#endif /* _RNPGBE_H */ diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_main.c b/drivers/net/= ethernet/mucse/rnpgbe/rnpgbe_main.c new file mode 100644 index 000000000000..44a787789ace --- /dev/null +++ b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_main.c @@ -0,0 +1,154 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright(c) 2020 - 2025 Mucse Corporation. */ + +#include +#include +#include + +#include "rnpgbe.h" + +static const char rnpgbe_driver_name[] =3D "rnpgbe"; + +/* rnpgbe_pci_tbl - PCI Device ID Table + * + * { PCI_DEVICE(Vendor ID, Device ID), + * driver_data (used for different hw chip) } + */ +static struct pci_device_id rnpgbe_pci_tbl[] =3D { + { PCI_DEVICE(PCI_VENDOR_ID_MUCSE, PCI_DEVICE_ID_N500_QUAD_PORT), + .driver_data =3D board_n500}, + { PCI_DEVICE(PCI_VENDOR_ID_MUCSE, PCI_DEVICE_ID_N500_DUAL_PORT), + .driver_data =3D board_n500}, + { PCI_DEVICE(PCI_VENDOR_ID_MUCSE, PCI_DEVICE_ID_N210), + .driver_data =3D board_n210}, + { PCI_DEVICE(PCI_VENDOR_ID_MUCSE, PCI_DEVICE_ID_N210L), + .driver_data =3D board_n210L}, + /* required last entry */ + {0, }, +}; + +/** + * rnpgbe_probe - Device initialization routine + * @pdev: PCI device information struct + * @id: entry in rnpgbe_pci_tbl + * + * rnpgbe_probe initializes a PF adapter identified by a pci_dev + * structure. + * + * @return: 0 on success, negative on failure + **/ +static int rnpgbe_probe(struct pci_dev *pdev, const struct pci_device_id *= id) +{ + int err; + + err =3D pci_enable_device_mem(pdev); + if (err) + return err; + + err =3D dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(56)); + if (err) { + dev_err(&pdev->dev, + "No usable DMA configuration, aborting %d\n", err); + goto err_dma; + } + + err =3D pci_request_mem_regions(pdev, rnpgbe_driver_name); + if (err) { + dev_err(&pdev->dev, + "pci_request_selected_regions failed 0x%x\n", err); + goto err_dma; + } + + pci_set_master(pdev); + pci_save_state(pdev); + + return 0; +err_dma: + pci_disable_device(pdev); + return err; +} + +/** + * rnpgbe_remove - Device removal routine + * @pdev: PCI device information struct + * + * rnpgbe_remove is called by the PCI subsystem to alert the driver + * that it should release a PCI device. This could be caused by a + * Hot-Plug event, or because the driver is going to be removed from + * memory. + **/ +static void rnpgbe_remove(struct pci_dev *pdev) +{ + pci_release_mem_regions(pdev); + pci_disable_device(pdev); +} + +/** + * rnpgbe_dev_shutdown - Device shutdown routine + * @pdev: PCI device information struct + * @enable_wake: wakeup status + **/ +static void rnpgbe_dev_shutdown(struct pci_dev *pdev, + bool *enable_wake) +{ + *enable_wake =3D false; + pci_disable_device(pdev); +} + +/** + * rnpgbe_shutdown - Device shutdown routine + * @pdev: PCI device information struct + * + * rnpgbe_shutdown is called by the PCI subsystem to alert the driver + * that os shutdown. Device should setup wakeup state here. + **/ +static void rnpgbe_shutdown(struct pci_dev *pdev) +{ + bool wake; + + rnpgbe_dev_shutdown(pdev, &wake); + + if (system_state =3D=3D SYSTEM_POWER_OFF) { + pci_wake_from_d3(pdev, wake); + pci_set_power_state(pdev, PCI_D3hot); + } +} + +static struct pci_driver rnpgbe_driver =3D { + .name =3D rnpgbe_driver_name, + .id_table =3D rnpgbe_pci_tbl, + .probe =3D rnpgbe_probe, + .remove =3D rnpgbe_remove, + .shutdown =3D rnpgbe_shutdown, +}; + +/** + * rnpgbe_init_module - Driver init routine + * + * rnpgbe_init_module is called when driver insmod + * + * @return: 0 on success, negative on failure + **/ +static int __init rnpgbe_init_module(void) +{ + return pci_register_driver(&rnpgbe_driver); +} + +module_init(rnpgbe_init_module); + +/** + * rnpgbe_exit_module - Driver remove routine + * + * rnpgbe_exit_module is called when driver is removed + **/ +static void __exit rnpgbe_exit_module(void) +{ + pci_unregister_driver(&rnpgbe_driver); +} + +module_exit(rnpgbe_exit_module); + +MODULE_DEVICE_TABLE(pci, rnpgbe_pci_tbl); +MODULE_AUTHOR("Mucse Corporation, "); +MODULE_DESCRIPTION("Mucse(R) 1 Gigabit PCI Express Network Driver"); +MODULE_LICENSE("GPL"); --=20 2.25.1 From nobody Sat Oct 4 17:34:12 2025 Received: from smtpbgsg1.qq.com (smtpbgsg1.qq.com [54.254.200.92]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB3B826FA46; Thu, 14 Aug 2025 07:40:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=54.254.200.92 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755157229; cv=none; b=Dx1MG7pwwhf3HHtIMRHljD2v+HZCyimk68PHRbyOakdoD4j62PpmbWQvqNmHc2+y+6bARsyXzjwNLBMu10CMTT1u50ZrRwm/tqYI9d19irGNTacwttpx7449aIfF8ipqF3qge0XvZVTQlQ1g0cInvcYCGprzCmpk22oII1f6S7k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755157229; c=relaxed/simple; bh=3KU50RPtal1UdfyUHqdepxeTcK5N/cRvkgDHYfnHMzw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=It0sBMVkiU0l8I+LQzQ3DC8KAJLVmCpkkt8MPk3Rp4O2h+26vj/KfhkT5Oui6XI6h2eHvFw7NTF8y4iYRQkBO46McgtfdLZ83wGph/UVUzm6OiPb7+HQ1liO8Q0obDG4N0PvFJ8wVZjgfbFQ1YjmEe4w5RM57CtK0mF5n2b2B6Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mucse.com; spf=pass smtp.mailfrom=mucse.com; arc=none smtp.client-ip=54.254.200.92 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mucse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mucse.com X-QQ-mid: zesmtpgz8t1755157153t255bec2f X-QQ-Originating-IP: /M/369QdeFW0S8m/H3wpz5m/kxgcGhm50VzZzzmbEjY= Received: from localhost.localdomain ( [203.174.112.180]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 14 Aug 2025 15:39:10 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 16659429040623633048 EX-QQ-RecipientCnt: 23 From: Dong Yibo To: andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, horms@kernel.org, corbet@lwn.net, gur.stavi@huawei.com, maddy@linux.ibm.com, mpe@ellerman.id.au, danishanwar@ti.com, lee@trager.us, gongfan1@huawei.com, lorenzo@kernel.org, geert+renesas@glider.be, Parthiban.Veerasooran@microchip.com, lukas.bulwahn@redhat.com, alexanderduyck@fb.com, richardcochran@gmail.com Cc: netdev@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, dong100@mucse.com Subject: [PATCH v4 2/5] net: rnpgbe: Add n500/n210 chip support Date: Thu, 14 Aug 2025 15:38:52 +0800 Message-Id: <20250814073855.1060601-3-dong100@mucse.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250814073855.1060601-1-dong100@mucse.com> References: <20250814073855.1060601-1-dong100@mucse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-QQ-SENDSIZE: 520 Feedback-ID: zesmtpgz:mucse.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-QQ-XMAILINFO: NDd9MucL1yTJSAdpJr0oPbDccw8D8pRql5julmCU14r7RocpvLv04bro XYOO731cTOQzJYx85+0kuL2tLrBiAngq8MiuGW3i04TDZRxF8NMBBdxOVzu4AQqtQhmMaN8 axJIm1/74uoXPPN2iF21JZaMGhSLeqYBbj2s/N6s6ST11/cHIu5jIyz+0fiwuiAWkQAlD1j 3o9fq4ZqRteWqSmtax2DWeNO9jsknshxVlDic0uPzWg17Qa556KAaFly09VxjdPmv/VpZKl 0RaOvEOLGjHhrEZmey1qjM9p5PanH4VOViQiwoBQ/XtDHx3fIciggYFSxnYiP7n27VU26Le Nt9yJ3SPZmyYo8nWY5HrzXTYsJUt+yAiRpOnbzI8G4vDkanVv+rWQtke7C9LFYXZ+iQbWcR 1NcTMd/rh85yFMvB5hOK9bFqBNujTp8PyPYFEVUuuMkjNcJVHFT9p4iw119EUDVRfRYOpJl LDQ8CulwP1VmXDhG8HUW9kXRHUyfZhE3gv4+N1CTWlteYg8mycDop1tAVN7TVS1GHvWwrOR 1EeSbAAYIxAiZvfWt8O5vs2v4TL4W7HJAjWIhxaMGKqiwg0QlacI0HvyVz8mfqzyvJ0HSER Sh1aFmKPSJWMnYrLDdj6ij8BVNrZXcv/lojmjItW4WSHTz4zK9rMONza011xHsw6l7WW/ye 2pTzIBdDohGBTRFq/Wg30q0lvzcrLSWazZzfv0VR+RTXEh7WoqH0LGfYCysy0mItJWOwbno 9IxZxJAj4YwCtse1C0/eJdCfjUyYNVEn+Llgj8IDskmuoh+i7TLRSEo0s1T3QmsN6afJJSO XzAOfEzzdy8YtZnWt9mvwJ3o7nEU0GwtK40q1jWY9t4zU98tLfCIP9WG/Czfd42IAvRW4P1 plOlNyClR6wm+19okplot34cpJmvq3rPVOlIYdkFqw0K6iBLW2hOHoFyGat/jAWa4PnecG/ M3Xnsfr66AuFyHQ6vtXBP3A69hb0cIPD35tmvReSwVATixfwbyHMBp/fCMrMymuSJgFjuI1 m0GWtdl8S4LHUo/4ixh7vwUX2Zaiw= X-QQ-XMRINFO: Nq+8W0+stu50PRdwbJxPCL0= X-QQ-RECHKSPAM: 0 Content-Type: text/plain; charset="utf-8" Initialize n500/n210 chip bar resource map and dma, eth, mbx ... info for future use. Signed-off-by: Dong Yibo --- drivers/net/ethernet/mucse/rnpgbe/Makefile | 3 +- drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h | 55 +++++++++ .../net/ethernet/mucse/rnpgbe/rnpgbe_chip.c | 85 +++++++++++++ drivers/net/ethernet/mucse/rnpgbe/rnpgbe_hw.h | 12 ++ .../net/ethernet/mucse/rnpgbe/rnpgbe_main.c | 112 ++++++++++++++++++ 5 files changed, 266 insertions(+), 1 deletion(-) create mode 100644 drivers/net/ethernet/mucse/rnpgbe/rnpgbe_chip.c create mode 100644 drivers/net/ethernet/mucse/rnpgbe/rnpgbe_hw.h diff --git a/drivers/net/ethernet/mucse/rnpgbe/Makefile b/drivers/net/ether= net/mucse/rnpgbe/Makefile index 9df536f0d04c..42c359f459d9 100644 --- a/drivers/net/ethernet/mucse/rnpgbe/Makefile +++ b/drivers/net/ethernet/mucse/rnpgbe/Makefile @@ -5,4 +5,5 @@ # =20 obj-$(CONFIG_MGBE) +=3D rnpgbe.o -rnpgbe-objs :=3D rnpgbe_main.o +rnpgbe-objs :=3D rnpgbe_main.o\ + rnpgbe_chip.o diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h b/drivers/net/ether= net/mucse/rnpgbe/rnpgbe.h index 64b2c093bc6e..08faac3a67af 100644 --- a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h +++ b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h @@ -4,15 +4,70 @@ #ifndef _RNPGBE_H #define _RNPGBE_H =20 +#include + +extern const struct rnpgbe_info rnpgbe_n500_info; +extern const struct rnpgbe_info rnpgbe_n210_info; +extern const struct rnpgbe_info rnpgbe_n210L_info; + enum rnpgbe_boards { board_n500, board_n210, board_n210L, }; =20 +enum rnpgbe_hw_type { + rnpgbe_hw_n500 =3D 0, + rnpgbe_hw_n210, + rnpgbe_hw_n210L, + rnpgbe_hw_unknown +}; + +struct mucse_dma_info { + void __iomem *dma_base_addr; + void __iomem *dma_ring_addr; + u32 dma_version; +}; + +struct mucse_eth_info { + void __iomem *eth_base_addr; +}; + +struct mucse_mac_info { + void __iomem *mac_addr; +}; + +struct mucse_mbx_info { + /* fw <--> pf mbx */ + u32 fw_pf_shm_base; + u32 pf2fw_mbox_ctrl; + u32 fw_pf_mbox_mask; + u32 fw2pf_mbox_vec; +}; + +struct mucse_hw { + void __iomem *hw_addr; + void __iomem *ring_msix_base; + struct pci_dev *pdev; + enum rnpgbe_hw_type hw_type; + struct mucse_dma_info dma; + struct mucse_eth_info eth; + struct mucse_mac_info mac; + struct mucse_mbx_info mbx; + u32 driver_version; + u16 usecstocount; +}; + struct mucse { struct net_device *netdev; struct pci_dev *pdev; + struct mucse_hw hw; +}; + +struct rnpgbe_info { + int total_queue_pair_cnts; + enum rnpgbe_hw_type hw_type; + void (*init)(struct mucse_hw *hw); }; =20 /* Device IDs */ diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_chip.c b/drivers/net/= ethernet/mucse/rnpgbe/rnpgbe_chip.c new file mode 100644 index 000000000000..79aefd7e335d --- /dev/null +++ b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_chip.c @@ -0,0 +1,85 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright(c) 2020 - 2025 Mucse Corporation. */ + +#include "rnpgbe.h" +#include "rnpgbe_hw.h" + +/** + * rnpgbe_init_common - Setup common attribute + * @hw: hw information structure + **/ +static void rnpgbe_init_common(struct mucse_hw *hw) +{ + struct mucse_dma_info *dma =3D &hw->dma; + struct mucse_eth_info *eth =3D &hw->eth; + struct mucse_mac_info *mac =3D &hw->mac; + + dma->dma_base_addr =3D hw->hw_addr; + dma->dma_ring_addr =3D hw->hw_addr + RNPGBE_RING_BASE; + + eth->eth_base_addr =3D hw->hw_addr + RNPGBE_ETH_BASE; + + mac->mac_addr =3D hw->hw_addr + RNPGBE_MAC_BASE; +} + +/** + * rnpgbe_init_n500 - Setup n500 hw info + * @hw: hw information structure + * + * rnpgbe_init_n500 initializes all private + * structure, such as dma, eth, mac and mbx base on + * hw->hw_addr for n500 + **/ +static void rnpgbe_init_n500(struct mucse_hw *hw) +{ + struct mucse_mbx_info *mbx =3D &hw->mbx; + + rnpgbe_init_common(hw); + + mbx->fw2pf_mbox_vec =3D 0x28b00; + mbx->fw_pf_shm_base =3D 0x2d000; + mbx->pf2fw_mbox_ctrl =3D 0x2e000; + mbx->fw_pf_mbox_mask =3D 0x2e200; + hw->ring_msix_base =3D hw->hw_addr + 0x28700; + hw->usecstocount =3D 125; +} + +/** + * rnpgbe_init_n210 - Setup n210 hw info + * @hw: hw information structure + * + * rnpgbe_init_n210 initializes all private + * structure, such as dma, eth, mac and mbx base on + * hw->hw_addr for n210 + **/ +static void rnpgbe_init_n210(struct mucse_hw *hw) +{ + struct mucse_mbx_info *mbx =3D &hw->mbx; + + rnpgbe_init_common(hw); + + mbx->fw2pf_mbox_vec =3D 0x29400; + mbx->fw_pf_shm_base =3D 0x2d900; + mbx->pf2fw_mbox_ctrl =3D 0x2e900; + mbx->fw_pf_mbox_mask =3D 0x2eb00; + hw->ring_msix_base =3D hw->hw_addr + 0x29000; + hw->usecstocount =3D 62; +} + +const struct rnpgbe_info rnpgbe_n500_info =3D { + .total_queue_pair_cnts =3D RNPGBE_MAX_QUEUES, + .hw_type =3D rnpgbe_hw_n500, + .init =3D &rnpgbe_init_n500, +}; + +const struct rnpgbe_info rnpgbe_n210_info =3D { + .total_queue_pair_cnts =3D RNPGBE_MAX_QUEUES, + .hw_type =3D rnpgbe_hw_n210, + .init =3D &rnpgbe_init_n210, +}; + +const struct rnpgbe_info rnpgbe_n210L_info =3D { + .total_queue_pair_cnts =3D RNPGBE_MAX_QUEUES, + .hw_type =3D rnpgbe_hw_n210L, + .init =3D &rnpgbe_init_n210, +}; diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_hw.h b/drivers/net/et= hernet/mucse/rnpgbe/rnpgbe_hw.h new file mode 100644 index 000000000000..fc57258537cf --- /dev/null +++ b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_hw.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright(c) 2020 - 2025 Mucse Corporation. */ + +#ifndef _RNPGBE_HW_H +#define _RNPGBE_HW_H + +#define RNPGBE_RING_BASE 0x1000 +#define RNPGBE_MAC_BASE 0x20000 +#define RNPGBE_ETH_BASE 0x10000 +/**************** CHIP Resource ****************************/ +#define RNPGBE_MAX_QUEUES 8 +#endif /* _RNPGBE_HW_H */ diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_main.c b/drivers/net/= ethernet/mucse/rnpgbe/rnpgbe_main.c index 44a787789ace..1fef7fa30208 100644 --- a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_main.c +++ b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_main.c @@ -4,10 +4,17 @@ #include #include #include +#include +#include =20 #include "rnpgbe.h" =20 static const char rnpgbe_driver_name[] =3D "rnpgbe"; +static const struct rnpgbe_info *rnpgbe_info_tbl[] =3D { + [board_n500] =3D &rnpgbe_n500_info, + [board_n210] =3D &rnpgbe_n210_info, + [board_n210L] =3D &rnpgbe_n210L_info, +}; =20 /* rnpgbe_pci_tbl - PCI Device ID Table * @@ -27,6 +34,82 @@ static struct pci_device_id rnpgbe_pci_tbl[] =3D { {0, }, }; =20 +/** + * rnpgbe_add_adapter - Add netdev for this pci_dev + * @pdev: PCI device information structure + * @info: chip info structure + * + * rnpgbe_add_adapter initializes a netdev for this pci_dev + * structure. Initializes Bar map, private structure, and a + * hardware reset occur. + * + * @return: 0 on success, negative on failure + **/ +static int rnpgbe_add_adapter(struct pci_dev *pdev, + const struct rnpgbe_info *info) +{ + struct net_device *netdev; + void __iomem *hw_addr; + struct mucse *mucse; + struct mucse_hw *hw; + u32 dma_version =3D 0; + u32 queues; + int err; + + queues =3D info->total_queue_pair_cnts; + netdev =3D alloc_etherdev_mq(sizeof(struct mucse), queues); + if (!netdev) + return -ENOMEM; + + SET_NETDEV_DEV(netdev, &pdev->dev); + mucse =3D netdev_priv(netdev); + mucse->netdev =3D netdev; + mucse->pdev =3D pdev; + pci_set_drvdata(pdev, mucse); + + hw =3D &mucse->hw; + hw->hw_type =3D info->hw_type; + hw->pdev =3D pdev; + + switch (hw->hw_type) { + case rnpgbe_hw_n500: + hw_addr =3D devm_ioremap(&pdev->dev, + pci_resource_start(pdev, 2), + pci_resource_len(pdev, 2)); + if (!hw_addr) { + err =3D -EIO; + goto err_free_net; + } + + dma_version =3D readl(hw_addr); + break; + case rnpgbe_hw_n210: + case rnpgbe_hw_n210L: + hw_addr =3D devm_ioremap(&pdev->dev, + pci_resource_start(pdev, 2), + pci_resource_len(pdev, 2)); + if (!hw_addr) { + err =3D -EIO; + goto err_free_net; + } + + dma_version =3D readl(hw_addr); + break; + default: + err =3D -EIO; + goto err_free_net; + } + hw->hw_addr =3D hw_addr; + hw->dma.dma_version =3D dma_version; + hw->driver_version =3D 0x0002040f; + info->init(hw); + return 0; + +err_free_net: + free_netdev(netdev); + return err; +} + /** * rnpgbe_probe - Device initialization routine * @pdev: PCI device information struct @@ -39,6 +122,7 @@ static struct pci_device_id rnpgbe_pci_tbl[] =3D { **/ static int rnpgbe_probe(struct pci_dev *pdev, const struct pci_device_id *= id) { + const struct rnpgbe_info *info =3D rnpgbe_info_tbl[id->driver_data]; int err; =20 err =3D pci_enable_device_mem(pdev); @@ -61,13 +145,36 @@ static int rnpgbe_probe(struct pci_dev *pdev, const st= ruct pci_device_id *id) =20 pci_set_master(pdev); pci_save_state(pdev); + err =3D rnpgbe_add_adapter(pdev, info); + if (err) + goto err_regions; =20 return 0; +err_regions: + pci_release_mem_regions(pdev); err_dma: pci_disable_device(pdev); return err; } =20 +/** + * rnpgbe_rm_adapter - Remove netdev for this mucse structure + * @pdev: PCI device information struct + * + * rnpgbe_rm_adapter remove a netdev for this mucse structure + **/ +static void rnpgbe_rm_adapter(struct pci_dev *pdev) +{ + struct mucse *mucse =3D pci_get_drvdata(pdev); + struct net_device *netdev; + + if (!mucse) + return; + netdev =3D mucse->netdev; + mucse->netdev =3D NULL; + free_netdev(netdev); +} + /** * rnpgbe_remove - Device removal routine * @pdev: PCI device information struct @@ -79,6 +186,7 @@ static int rnpgbe_probe(struct pci_dev *pdev, const stru= ct pci_device_id *id) **/ static void rnpgbe_remove(struct pci_dev *pdev) { + rnpgbe_rm_adapter(pdev); pci_release_mem_regions(pdev); pci_disable_device(pdev); } @@ -91,7 +199,11 @@ static void rnpgbe_remove(struct pci_dev *pdev) static void rnpgbe_dev_shutdown(struct pci_dev *pdev, bool *enable_wake) { + struct mucse *mucse =3D pci_get_drvdata(pdev); + struct net_device *netdev =3D mucse->netdev; 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charset="utf-8" Initialize basic mbx function. Signed-off-by: Dong Yibo --- drivers/net/ethernet/mucse/rnpgbe/Makefile | 3 +- drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h | 37 ++ .../net/ethernet/mucse/rnpgbe/rnpgbe_chip.c | 5 + drivers/net/ethernet/mucse/rnpgbe/rnpgbe_hw.h | 2 + .../net/ethernet/mucse/rnpgbe/rnpgbe_mbx.c | 443 ++++++++++++++++++ .../net/ethernet/mucse/rnpgbe/rnpgbe_mbx.h | 31 ++ 6 files changed, 520 insertions(+), 1 deletion(-) create mode 100644 drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.c create mode 100644 drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.h diff --git a/drivers/net/ethernet/mucse/rnpgbe/Makefile b/drivers/net/ether= net/mucse/rnpgbe/Makefile index 42c359f459d9..5fc878ada4b1 100644 --- a/drivers/net/ethernet/mucse/rnpgbe/Makefile +++ b/drivers/net/ethernet/mucse/rnpgbe/Makefile @@ -6,4 +6,5 @@ =20 obj-$(CONFIG_MGBE) +=3D rnpgbe.o rnpgbe-objs :=3D rnpgbe_main.o\ - rnpgbe_chip.o + rnpgbe_chip.o\ + rnpgbe_mbx.o diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h b/drivers/net/ether= net/mucse/rnpgbe/rnpgbe.h index 08faac3a67af..c3f2a86979d7 100644 --- a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h +++ b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h @@ -5,6 +5,7 @@ #define _RNPGBE_H =20 #include +#include =20 extern const struct rnpgbe_info rnpgbe_n500_info; extern const struct rnpgbe_info rnpgbe_n210_info; @@ -37,7 +38,43 @@ struct mucse_mac_info { void __iomem *mac_addr; }; =20 +struct mucse_hw; + +struct mucse_mbx_operations { + void (*init_params)(struct mucse_hw *hw); + int (*read)(struct mucse_hw *hw, u32 *msg, + u16 size); + int (*write)(struct mucse_hw *hw, u32 *msg, + u16 size); + int (*read_posted)(struct mucse_hw *hw, u32 *msg, + u16 size); + int (*write_posted)(struct mucse_hw *hw, u32 *msg, + u16 size); + int (*check_for_msg)(struct mucse_hw *hw); + int (*check_for_ack)(struct mucse_hw *hw); + void (*configure)(struct mucse_hw *hw, int num_vec, + bool enable); +}; + +struct mucse_mbx_stats { + u32 msgs_tx; + u32 msgs_rx; + u32 acks; + u32 reqs; + u32 rsts; +}; + struct mucse_mbx_info { + const struct mucse_mbx_operations *ops; + struct mucse_mbx_stats stats; + u32 timeout; + u32 usec_delay; + u16 size; + u16 fw_req; + u16 fw_ack; + /* lock for only one use mbx */ + struct mutex lock; + bool irq_enabled; /* fw <--> pf mbx */ u32 fw_pf_shm_base; u32 pf2fw_mbox_ctrl; diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_chip.c b/drivers/net/= ethernet/mucse/rnpgbe/rnpgbe_chip.c index 79aefd7e335d..e0c6f47efd4c 100644 --- a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_chip.c +++ b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_chip.c @@ -1,8 +1,11 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 2020 - 2025 Mucse Corporation. */ =20 +#include + #include "rnpgbe.h" #include "rnpgbe_hw.h" +#include "rnpgbe_mbx.h" =20 /** * rnpgbe_init_common - Setup common attribute @@ -20,6 +23,8 @@ static void rnpgbe_init_common(struct mucse_hw *hw) eth->eth_base_addr =3D hw->hw_addr + RNPGBE_ETH_BASE; =20 mac->mac_addr =3D hw->hw_addr + RNPGBE_MAC_BASE; + + hw->mbx.ops =3D &mucse_mbx_ops_generic; } =20 /** diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_hw.h b/drivers/net/et= hernet/mucse/rnpgbe/rnpgbe_hw.h index fc57258537cf..aee037e3219d 100644 --- a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_hw.h +++ b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_hw.h @@ -7,6 +7,8 @@ #define RNPGBE_RING_BASE 0x1000 #define RNPGBE_MAC_BASE 0x20000 #define RNPGBE_ETH_BASE 0x10000 +/**************** DMA Registers ****************************/ +#define RNPGBE_DMA_DUMY 0x000c /**************** CHIP Resource ****************************/ #define RNPGBE_MAX_QUEUES 8 #endif /* _RNPGBE_HW_H */ diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.c b/drivers/net/e= thernet/mucse/rnpgbe/rnpgbe_mbx.c new file mode 100644 index 000000000000..5f481a5f0d68 --- /dev/null +++ b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.c @@ -0,0 +1,443 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright(c) 2022 - 2025 Mucse Corporation. */ + +#include +#include +#include +#include + +#include "rnpgbe.h" +#include "rnpgbe_mbx.h" +#include "rnpgbe_hw.h" + +/** + * mucse_read_mbx - Reads a message from the mailbox + * @hw: pointer to the HW structure + * @msg: the message buffer + * @size: length of buffer + * + * @return: 0 on success, negative on failure + **/ +int mucse_read_mbx(struct mucse_hw *hw, u32 *msg, u16 size) +{ + struct mucse_mbx_info *mbx =3D &hw->mbx; + + /* limit read size */ + size =3D min(size, mbx->size); + return mbx->ops->read(hw, msg, size); +} + +/** + * mucse_write_mbx - Write a message to the mailbox + * @hw: pointer to the HW structure + * @msg: the message buffer + * @size: length of buffer + * + * @return: 0 on success, negative on failure + **/ +int mucse_write_mbx(struct mucse_hw *hw, u32 *msg, u16 size) +{ + struct mucse_mbx_info *mbx =3D &hw->mbx; + + return mbx->ops->write(hw, msg, size); +} + +/** + * mucse_mbx_get_req - Read req from reg + * @hw: pointer to the HW structure + * @reg: register to read + * + * @return: the req value + **/ +static u16 mucse_mbx_get_req(struct mucse_hw *hw, int reg) +{ + return mbx_rd32(hw, reg) & GENMASK(15, 0); +} + +/** + * mucse_mbx_get_ack - Read ack from reg + * @hw: pointer to the HW structure + * @reg: register to read + * + * @return: the ack value + **/ +static u16 mucse_mbx_get_ack(struct mucse_hw *hw, int reg) +{ + return (mbx_rd32(hw, reg) >> 16); +} + +/** + * mucse_mbx_inc_pf_req - Increase req + * @hw: pointer to the HW structure + * + * mucse_mbx_inc_pf_req read pf_req from hw, then write + * new value back after increase + **/ +static void mucse_mbx_inc_pf_req(struct mucse_hw *hw) +{ + struct mucse_mbx_info *mbx =3D &hw->mbx; + u32 reg, v; + u16 req; + + reg =3D PF2FW_COUNTER(mbx); + v =3D mbx_rd32(hw, reg); + req =3D (v & GENMASK(15, 0)); + req++; + v &=3D GENMASK(31, 16); + v |=3D req; + mbx_wr32(hw, reg, v); + hw->mbx.stats.msgs_tx++; +} + +/** + * mucse_mbx_inc_pf_ack - Increase ack + * @hw: pointer to the HW structure + * + * mucse_mbx_inc_pf_ack read pf_ack from hw, then write + * new value back after increase + **/ +static void mucse_mbx_inc_pf_ack(struct mucse_hw *hw) +{ + struct mucse_mbx_info *mbx =3D &hw->mbx; + u32 reg, v; + u16 ack; + + reg =3D PF2FW_COUNTER(mbx); + v =3D mbx_rd32(hw, reg); + ack =3D (v >> 16) & GENMASK(15, 0); + ack++; + v &=3D GENMASK(15, 0); + v |=3D (ack << 16); + mbx_wr32(hw, reg, v); + hw->mbx.stats.msgs_rx++; +} + +/** + * mucse_check_for_msg - Check to see if fw sent us mail + * @hw: pointer to the HW structure + * + * @return: 0 on success, negative on failure + **/ +int mucse_check_for_msg(struct mucse_hw *hw) +{ + struct mucse_mbx_info *mbx =3D &hw->mbx; + + return mbx->ops->check_for_msg(hw); +} + +/** + * mucse_check_for_ack - Check to see if fw sent us ACK + * @hw: pointer to the HW structure + * + * @return: 0 on success, negative on failure + **/ +int mucse_check_for_ack(struct mucse_hw *hw) +{ + struct mucse_mbx_info *mbx =3D &hw->mbx; + + return mbx->ops->check_for_ack(hw); +} + +/** + * mucse_poll_for_msg - Wait for message notification + * @hw: pointer to the HW structure + * + * @return: 0 on success, negative on failure + **/ +static int mucse_poll_for_msg(struct mucse_hw *hw) +{ + struct mucse_mbx_info *mbx =3D &hw->mbx; + int countdown =3D mbx->timeout; + int val; + + return read_poll_timeout(mbx->ops->check_for_msg, + val, val =3D=3D 0, mbx->usec_delay, + countdown * mbx->usec_delay, + false, hw); +} + +/** + * mucse_poll_for_ack - Wait for message acknowledgment + * @hw: pointer to the HW structure + * + * @return: 0 if it successfully received a message acknowledgment + **/ +static int mucse_poll_for_ack(struct mucse_hw *hw) +{ + struct mucse_mbx_info *mbx =3D &hw->mbx; + int countdown =3D mbx->timeout; + int val; + + return read_poll_timeout(mbx->ops->check_for_ack, + val, val =3D=3D 0, mbx->usec_delay, + countdown * mbx->usec_delay, + false, hw); +} + +/** + * mucse_read_posted_mbx - Wait for message notification and receive messa= ge + * @hw: pointer to the HW structure + * @msg: the message buffer + * @size: length of buffer + * + * @return: 0 if it successfully received a message notification and + * copied it into the receive buffer. + **/ +static int mucse_read_posted_mbx(struct mucse_hw *hw, u32 *msg, u16 size) +{ + struct mucse_mbx_info *mbx =3D &hw->mbx; + int ret; + + ret =3D mucse_poll_for_msg(hw); + if (ret) + return ret; + + return mbx->ops->read(hw, msg, size); +} + +/** + * mucse_write_posted_mbx - Write a message to the mailbox, wait for ack + * @hw: pointer to the HW structure + * @msg: the message buffer + * @size: length of buffer + * + * @return: 0 if it successfully copied message into the buffer and + * received an ack to that message within delay * timeout period + **/ +static int mucse_write_posted_mbx(struct mucse_hw *hw, u32 *msg, u16 size) +{ + struct mucse_mbx_info *mbx =3D &hw->mbx; + int ret; + + ret =3D mbx->ops->write(hw, msg, size); + if (ret) + return ret; + return mucse_poll_for_ack(hw); +} + +/** + * mucse_check_for_msg_pf - Check to see if the fw has sent mail + * @hw: pointer to the HW structure + * + * @return: 0 if the fw has set the Status bit or else + * -EIO + **/ +static int mucse_check_for_msg_pf(struct mucse_hw *hw) +{ + struct mucse_mbx_info *mbx =3D &hw->mbx; + u16 hw_req_count =3D 0; + + hw_req_count =3D mucse_mbx_get_req(hw, FW2PF_COUNTER(mbx)); + /* chip's register is reset to 0 when rc send reset + * mbx command. This causes 'hw_req_count !=3D hw->mbx.fw_req' + * be TRUE before fw really reply. Driver must wait fw reset + * done reply before using chip, we must check no-zero. + **/ + if (hw_req_count !=3D 0 && hw_req_count !=3D hw->mbx.fw_req) { + hw->mbx.stats.reqs++; + return 0; + } + + return -EIO; +} + +/** + * mucse_check_for_ack_pf - Check to see if the VF has ACKed + * @hw: pointer to the HW structure + * + * @return: 0 if the fw has set the Status bit or else + * -EIO + **/ +static int mucse_check_for_ack_pf(struct mucse_hw *hw) +{ + struct mucse_mbx_info *mbx =3D &hw->mbx; + u16 hw_fw_ack; + + hw_fw_ack =3D mucse_mbx_get_ack(hw, FW2PF_COUNTER(mbx)); + /* chip's register is reset to 0 when rc send reset + * mbx command. This causes 'hw_fw_ack !=3D hw->mbx.fw_ack' + * be TRUE before fw really reply. Driver must wait fw reset + * done reply before using chip, we must check no-zero. + **/ + if (hw_fw_ack !=3D 0 && hw_fw_ack !=3D hw->mbx.fw_ack) { + hw->mbx.stats.acks++; + return 0; + } + + return -EIO; +} + +/** + * mucse_obtain_mbx_lock_pf - Obtain mailbox lock + * @hw: pointer to the HW structure + * + * This function maybe used in an irq handler. + * + * @return: 0 if we obtained the mailbox lock + **/ +static int mucse_obtain_mbx_lock_pf(struct mucse_hw *hw) +{ + struct mucse_mbx_info *mbx =3D &hw->mbx; + int try_cnt =3D 5000; + u32 reg; + + reg =3D PF2FW_MBOX_CTRL(mbx); + while (try_cnt-- > 0) { + mbx_wr32(hw, reg, MBOX_PF_HOLD); + /* force write back before check */ + wmb(); + if (mbx_rd32(hw, reg) & MBOX_PF_HOLD) + return 0; + udelay(100); + } + return -EIO; +} + +/** + * mucse_write_mbx_pf - Place a message in the mailbox + * @hw: pointer to the HW structure + * @msg: the message buffer + * @size: length of buffer + * + * This function maybe used in an irq handler. + * + * @return: 0 if it successfully copied message into the buffer + **/ +static int mucse_write_mbx_pf(struct mucse_hw *hw, u32 *msg, u16 size) +{ + struct mucse_mbx_info *mbx =3D &hw->mbx; + u32 data_reg, ctrl_reg; + int ret; + u16 i; + + data_reg =3D FW_PF_SHM_DATA(mbx); + ctrl_reg =3D PF2FW_MBOX_CTRL(mbx); + ret =3D mucse_obtain_mbx_lock_pf(hw); + if (ret) + return ret; + + for (i =3D 0; i < size; i++) + mbx_wr32(hw, data_reg + i * 4, msg[i]); + + /* flush msg and acks as we are overwriting the message buffer */ + hw->mbx.fw_ack =3D mucse_mbx_get_ack(hw, FW2PF_COUNTER(mbx)); + mucse_mbx_inc_pf_req(hw); + mbx_wr32(hw, ctrl_reg, MBOX_CTRL_REQ); + + return 0; +} + +/** + * mucse_read_mbx_pf - Read a message from the mailbox + * @hw: pointer to the HW structure + * @msg: the message buffer + * @size: length of buffer + * + * This function copies a message from the mailbox buffer to the caller's + * memory buffer. The presumption is that the caller knows that there was + * a message due to a fw request so no polling for message is needed. + * + * @return: 0 on success, negative on failure + **/ +static int mucse_read_mbx_pf(struct mucse_hw *hw, u32 *msg, u16 size) +{ + struct mucse_mbx_info *mbx =3D &hw->mbx; + u32 data_reg, ctrl_reg; + int ret; + u32 i; + + data_reg =3D FW_PF_SHM_DATA(mbx); + ctrl_reg =3D PF2FW_MBOX_CTRL(mbx); + + ret =3D mucse_obtain_mbx_lock_pf(hw); + if (ret) + return ret; + for (i =3D 0; i < size; i++) + msg[i] =3D mbx_rd32(hw, data_reg + 4 * i); + /* Hw need write data_reg at last */ + mbx_wr32(hw, data_reg, 0); + hw->mbx.fw_req =3D mucse_mbx_get_req(hw, FW2PF_COUNTER(mbx)); + mucse_mbx_inc_pf_ack(hw); + mbx_wr32(hw, ctrl_reg, 0); + + return 0; +} + +/** + * mucse_mbx_reset - Reset mbx info, sync info from regs + * @hw: pointer to the HW structure + * + * This function reset all mbx variables to default. + **/ +static void mucse_mbx_reset(struct mucse_hw *hw) +{ + struct mucse_mbx_info *mbx =3D &hw->mbx; + u32 v; + + v =3D mbx_rd32(hw, FW2PF_COUNTER(mbx)); + hw->mbx.fw_req =3D v & GENMASK(15, 0); + hw->mbx.fw_ack =3D (v >> 16) & GENMASK(15, 0); + mbx_wr32(hw, PF2FW_MBOX_CTRL(mbx), 0); + mbx_wr32(hw, FW_PF_MBOX_MASK(mbx), GENMASK(31, 16)); +} + +/** + * mucse_mbx_configure_pf - Configure mbx to use nr_vec interrupt + * @hw: pointer to the HW structure + * @nr_vec: vector number for mbx + * @enable: TRUE for enable, FALSE for disable + * + * This function configure mbx to use interrupt nr_vec. + **/ +static void mucse_mbx_configure_pf(struct mucse_hw *hw, int nr_vec, + bool enable) +{ + struct mucse_mbx_info *mbx =3D &hw->mbx; + u32 v; + + if (enable) { + v =3D mbx_rd32(hw, FW2PF_COUNTER(mbx)); + hw->mbx.fw_req =3D v & GENMASK(15, 0); + hw->mbx.fw_ack =3D (v >> 16) & GENMASK(15, 0); + mbx_wr32(hw, PF2FW_MBOX_CTRL(mbx), 0); + mbx_wr32(hw, FW2PF_MBOX_VEC(mbx), nr_vec); + mbx_wr32(hw, FW_PF_MBOX_MASK(mbx), GENMASK(31, 16)); + } else { + mbx_wr32(hw, FW_PF_MBOX_MASK(mbx), 0xfffffffe); + mbx_wr32(hw, PF2FW_MBOX_CTRL(mbx), 0); + mbx_wr32(hw, RNPGBE_DMA_DUMY, 0); + } +} + +/** + * mucse_init_mbx_params_pf - Set initial values for pf mailbox + * @hw: pointer to the HW structure + * + * Initializes the hw->mbx struct to correct values for pf mailbox + */ +static void mucse_init_mbx_params_pf(struct mucse_hw *hw) +{ + struct mucse_mbx_info *mbx =3D &hw->mbx; + + mbx->usec_delay =3D 100; + mbx->timeout =3D (4 * USEC_PER_SEC) / mbx->usec_delay; + mbx->stats.msgs_tx =3D 0; + mbx->stats.msgs_rx =3D 0; + mbx->stats.reqs =3D 0; + mbx->stats.acks =3D 0; + mbx->stats.rsts =3D 0; + mbx->size =3D MUCSE_MAILBOX_WORDS; + mutex_init(&mbx->lock); + mucse_mbx_reset(hw); +} + +const struct mucse_mbx_operations mucse_mbx_ops_generic =3D { + .init_params =3D mucse_init_mbx_params_pf, + .read =3D mucse_read_mbx_pf, + .write =3D mucse_write_mbx_pf, + .read_posted =3D mucse_read_posted_mbx, + .write_posted =3D mucse_write_posted_mbx, + .check_for_msg =3D mucse_check_for_msg_pf, + .check_for_ack =3D mucse_check_for_ack_pf, + .configure =3D mucse_mbx_configure_pf, +}; diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.h b/drivers/net/e= thernet/mucse/rnpgbe/rnpgbe_mbx.h new file mode 100644 index 000000000000..2d850a11c369 --- /dev/null +++ b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright(c) 2020 - 2025 Mucse Corporation. */ + +#ifndef _RNPGBE_MBX_H +#define _RNPGBE_MBX_H + +#include "rnpgbe.h" + +#define MUCSE_MAILBOX_WORDS 14 +#define MUCSE_FW_MAILBOX_WORDS MUCSE_MAILBOX_WORDS +#define FW_PF_SHM(mbx) ((mbx)->fw_pf_shm_base) +#define FW2PF_COUNTER(mbx) (FW_PF_SHM(mbx) + 0) +#define PF2FW_COUNTER(mbx) (FW_PF_SHM(mbx) + 4) +#define FW_PF_SHM_DATA(mbx) (FW_PF_SHM(mbx) + 8) +#define FW2PF_MBOX_VEC(mbx) ((mbx)->fw2pf_mbox_vec) +#define PF2FW_MBOX_CTRL(mbx) ((mbx)->pf2fw_mbox_ctrl) +#define FW_PF_MBOX_MASK(mbx) ((mbx)->fw_pf_mbox_mask) +#define MBOX_CTRL_REQ BIT(0) +#define MBOX_PF_HOLD BIT(3) +#define MBOX_IRQ_EN 0 +#define MBOX_IRQ_DISABLE 1 +#define mbx_rd32(hw, reg) readl((hw)->hw_addr + (reg)) +#define mbx_wr32(hw, reg, val) writel((val), (hw)->hw_addr + (reg)) + +extern const struct mucse_mbx_operations mucse_mbx_ops_generic; + +int mucse_read_mbx(struct mucse_hw *hw, u32 *msg, u16 size); +int mucse_write_mbx(struct mucse_hw *hw, u32 *msg, u16 size); +int mucse_check_for_msg(struct mucse_hw *hw); +int mucse_check_for_ack(struct mucse_hw *hw); +#endif /* _RNPGBE_MBX_H */ --=20 2.25.1 From nobody Sat Oct 4 17:34:12 2025 Received: from smtpbguseast1.qq.com (smtpbguseast1.qq.com [54.204.34.129]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2250126B77D; Thu, 14 Aug 2025 07:40:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=54.204.34.129 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755157236; cv=none; b=UP746GI1ytlxFK/4odf6v0qm8yq7LRfCHYfAZzk1Bs9PucmQCcIA3/iZeT5CBCG7kHzGNwKkHUXdHac6qbvCSswCdWfjFt48ERA56QhKlc64YvWhSPG9oZRxq2O7/KJ59I2SJRPBtmzxNe7t2OuOmp1J4sg4Yh1WNi6tWDdNuHE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; 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charset="utf-8" Initialize basic mbx_fw ops, such as get_capability, reset phy and so on. Signed-off-by: Dong Yibo --- drivers/net/ethernet/mucse/rnpgbe/Makefile | 3 +- drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h | 4 + .../net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.c | 264 ++++++++++++++++++ .../net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.h | 201 +++++++++++++ 4 files changed, 471 insertions(+), 1 deletion(-) create mode 100644 drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.c create mode 100644 drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.h diff --git a/drivers/net/ethernet/mucse/rnpgbe/Makefile b/drivers/net/ether= net/mucse/rnpgbe/Makefile index 5fc878ada4b1..de8bcb7772ab 100644 --- a/drivers/net/ethernet/mucse/rnpgbe/Makefile +++ b/drivers/net/ethernet/mucse/rnpgbe/Makefile @@ -7,4 +7,5 @@ obj-$(CONFIG_MGBE) +=3D rnpgbe.o rnpgbe-objs :=3D rnpgbe_main.o\ rnpgbe_chip.o\ - rnpgbe_mbx.o + rnpgbe_mbx.o\ + rnpgbe_mbx_fw.o diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h b/drivers/net/ether= net/mucse/rnpgbe/rnpgbe.h index c3f2a86979d7..7ab1cbb432f6 100644 --- a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h +++ b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h @@ -83,9 +83,13 @@ struct mucse_mbx_info { }; =20 struct mucse_hw { + u8 pfvfnum; void __iomem *hw_addr; void __iomem *ring_msix_base; struct pci_dev *pdev; + u32 fw_version; + u32 axi_mhz; + u32 bd_uid; enum rnpgbe_hw_type hw_type; struct mucse_dma_info dma; struct mucse_eth_info eth; diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.c b/drivers/ne= t/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.c new file mode 100644 index 000000000000..6a10ffeb74da --- /dev/null +++ b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.c @@ -0,0 +1,264 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright(c) 2020 - 2025 Mucse Corporation. */ + +#include + +#include "rnpgbe.h" +#include "rnpgbe_hw.h" +#include "rnpgbe_mbx.h" +#include "rnpgbe_mbx_fw.h" + +/** + * mucse_fw_send_cmd_wait - Send cmd req and wait for response + * @hw: pointer to the HW structure + * @req: pointer to the cmd req structure + * @reply: pointer to the fw reply structure + * + * mucse_fw_send_cmd_wait sends req to pf-fw mailbox and wait + * reply from fw. + * + * @return: 0 on success, negative on failure + **/ +static int mucse_fw_send_cmd_wait(struct mucse_hw *hw, + struct mbx_fw_cmd_req *req, + struct mbx_fw_cmd_reply *reply) +{ + int len =3D le16_to_cpu(req->datalen) + MBX_REQ_HDR_LEN; + int retry_cnt =3D 3; + int err; + + err =3D mutex_lock_interruptible(&hw->mbx.lock); + if (err) + return err; + err =3D hw->mbx.ops->write_posted(hw, (u32 *)req, + L_WD(len)); + if (err) + goto quit; + do { + err =3D hw->mbx.ops->read_posted(hw, (u32 *)reply, + L_WD(sizeof(*reply))); + if (err) + goto quit; + } while (--retry_cnt >=3D 0 && reply->opcode !=3D req->opcode); +quit: + mutex_unlock(&hw->mbx.lock); + if (!err && retry_cnt < 0) + return -ETIMEDOUT; + if (!err && reply->error_code) + return -EIO; + return err; +} + +/** + * mucse_fw_get_capability - Get hw abilities from fw + * @hw: pointer to the HW structure + * @abil: pointer to the hw_abilities structure + * + * mucse_fw_get_capability tries to get hw abilities from + * hw. + * + * @return: 0 on success, negative on failure + **/ +static int mucse_fw_get_capability(struct mucse_hw *hw, + struct hw_abilities *abil) +{ + struct mbx_fw_cmd_reply reply =3D {}; + struct mbx_fw_cmd_req req =3D {}; + int err; + + build_phy_abilities_req(&req, &req); + err =3D mucse_fw_send_cmd_wait(hw, &req, &reply); + if (!err) + memcpy(abil, &reply.hw_abilities, sizeof(*abil)); + return err; +} + +/** + * mucse_mbx_get_capability - Get hw abilities from fw + * @hw: pointer to the HW structure + * + * mucse_mbx_get_capability tries to get capabities from + * hw. Many retrys will do if it is failed. + * + * @return: 0 on success, negative on failure + **/ +int mucse_mbx_get_capability(struct mucse_hw *hw) +{ + struct hw_abilities ability =3D {}; + int try_cnt =3D 3; + int err =3D -EIO; + + while (try_cnt--) { + err =3D mucse_fw_get_capability(hw, &ability); + if (err) + continue; + hw->pfvfnum =3D le16_to_cpu(ability.pfnum); + hw->fw_version =3D le32_to_cpu(ability.fw_version); + hw->axi_mhz =3D le32_to_cpu(ability.axi_mhz); + hw->bd_uid =3D le32_to_cpu(ability.bd_uid); + return 0; + } + return err; +} + +/** + * mbx_cookie_zalloc - Alloc a cookie structure + * @priv_len: private length for this cookie + * + * @return: cookie structure on success + **/ +static struct mbx_req_cookie *mbx_cookie_zalloc(int priv_len) +{ + struct mbx_req_cookie *cookie; + + cookie =3D kzalloc(struct_size(cookie, priv, priv_len), GFP_KERNEL); + if (cookie) { + cookie->timeout_jiffes =3D 30 * HZ; + cookie->magic =3D COOKIE_MAGIC; + cookie->priv_len =3D priv_len; + } + return cookie; +} + +/** + * mucse_mbx_fw_post_req - Posts a mbx req to firmware and wait reply + * @hw: pointer to the HW structure + * @req: pointer to the cmd req structure + * @cookie: pointer to the req cookie + * + * mucse_mbx_fw_post_req posts a mbx req to firmware and wait for the + * reply. cookie->wait will be set in irq handler. + * + * @return: 0 on success, negative on failure + **/ +static int mucse_mbx_fw_post_req(struct mucse_hw *hw, + struct mbx_fw_cmd_req *req, + struct mbx_req_cookie *cookie) +{ + int len =3D le16_to_cpu(req->datalen) + MBX_REQ_HDR_LEN; + int err; + + cookie->errcode =3D 0; + cookie->done =3D 0; + init_waitqueue_head(&cookie->wait); + err =3D mutex_lock_interruptible(&hw->mbx.lock); + if (err) + return err; + err =3D mucse_write_mbx(hw, (u32 *)req, + L_WD(len)); + if (err) { + mutex_unlock(&hw->mbx.lock); + return err; + } + do { + err =3D wait_event_interruptible_timeout(cookie->wait, + cookie->done =3D=3D 1, + cookie->timeout_jiffes); + } while (err =3D=3D -ERESTARTSYS); + + mutex_unlock(&hw->mbx.lock); + if (!err) + err =3D -ETIME; + else + err =3D 0; + if (!err && cookie->errcode) + err =3D cookie->errcode; + + return err; +} + +/** + * mucse_mbx_ifinsmod - Echo driver insmod status to hw + * @hw: pointer to the HW structure + * @status: true for insmod, false for rmmod + * + * @return: 0 on success, negative on failure + **/ +int mucse_mbx_ifinsmod(struct mucse_hw *hw, int status) +{ + struct mbx_fw_cmd_req req =3D {}; + int len; + int err; + + build_ifinsmod(&req, hw->driver_version, status); + len =3D le16_to_cpu(req.datalen) + MBX_REQ_HDR_LEN; + err =3D mutex_lock_interruptible(&hw->mbx.lock); + if (err) + return err; + + if (status) { + err =3D hw->mbx.ops->write_posted(hw, (u32 *)&req, + L_WD(len)); + } else { + err =3D hw->mbx.ops->write(hw, (u32 *)&req, + L_WD(len)); + } + + mutex_unlock(&hw->mbx.lock); + return err; +} + +/** + * mucse_mbx_fw_reset_phy - Posts a mbx req to reset hw + * @hw: pointer to the HW structure + * + * mucse_mbx_fw_reset_phy posts a mbx req to firmware to reset hw. + * It uses mucse_fw_send_cmd_wait if no irq, and mucse_mbx_fw_post_req + * if other irq is registered. + * + * @return: 0 on success, negative on failure + **/ +int mucse_mbx_fw_reset_phy(struct mucse_hw *hw) +{ + struct mbx_fw_cmd_reply reply =3D {}; + struct mbx_fw_cmd_req req =3D {}; + int ret; + + if (hw->mbx.irq_enabled) { + struct mbx_req_cookie *cookie =3D mbx_cookie_zalloc(0); + + if (!cookie) + return -ENOMEM; + + build_reset_phy_req(&req, cookie); + ret =3D mucse_mbx_fw_post_req(hw, &req, cookie); + kfree(cookie); + return ret; + } + + build_reset_phy_req(&req, &req); + return mucse_fw_send_cmd_wait(hw, &req, &reply); +} + +/** + * mucse_fw_get_macaddr - Posts a mbx req to request macaddr + * @hw: pointer to the HW structure + * @pfvfnum: index of pf/vf num + * @mac_addr: pointer to store mac_addr + * @lane: lane index + * + * mucse_fw_get_macaddr posts a mbx req to firmware to get mac_addr. + * It uses mucse_fw_send_cmd_wait if no irq, and mucse_mbx_fw_post_req + * if other irq is registered. + * + * @return: 0 on success, negative on failure + **/ +int mucse_fw_get_macaddr(struct mucse_hw *hw, int pfvfnum, + u8 *mac_addr, + int lane) +{ + struct mbx_fw_cmd_reply reply =3D {}; + struct mbx_fw_cmd_req req =3D {}; + int err; + + build_get_macaddress_req(&req, 1 << lane, pfvfnum, &req); + err =3D mucse_fw_send_cmd_wait(hw, &req, &reply); + if (err) + return err; + + if ((1 << lane) & le32_to_cpu(reply.mac_addr.lanes)) + memcpy(mac_addr, reply.mac_addr.addrs[lane].mac, 6); + else + return -ENODATA; + return 0; +} diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.h b/drivers/ne= t/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.h new file mode 100644 index 000000000000..1d434536c616 --- /dev/null +++ b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.h @@ -0,0 +1,201 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright(c) 2020 - 2025 Mucse Corporation. */ + +#ifndef _RNPGBE_MBX_FW_H +#define _RNPGBE_MBX_FW_H + +#include +#include +#include + +#include "rnpgbe.h" + +#define MBX_REQ_HDR_LEN 24 +#define L_WD(x) ((x) / 4) +#define M_DEFAULT_DUMY 0xa0000000 +#define M_DUMY_MASK 0x0f000f11 +#define EVT_LINK_UP 1 + +struct mbx_fw_cmd_reply; +typedef void (*cookie_cb)(struct mbx_fw_cmd_reply *reply, void *priv); + +struct mbx_req_cookie { + int magic; +#define COOKIE_MAGIC 0xCE + cookie_cb cb; + int timeout_jiffes; + int errcode; + wait_queue_head_t wait; + int done; + int priv_len; + char priv[]; +}; + +enum MUCSE_FW_CMD { + GET_PHY_ABALITY =3D 0x0601, + GET_MAC_ADDRES =3D 0x0602, + RESET_PHY =3D 0x0603, + DRIVER_INSMOD =3D 0x0803, +}; + +struct hw_abilities { + u8 link_stat; + u8 lane_mask; + __le32 speed; + __le16 phy_type; + __le16 nic_mode; + __le16 pfnum; + __le32 fw_version; + __le32 axi_mhz; + union { + u8 port_id[4]; + __le32 port_ids; + }; + __le32 bd_uid; + __le32 phy_id; + __le32 wol_status; + union { + __le32 ext_ability; + struct { + u32 valid : 1; + u32 wol_en : 1; + u32 pci_preset_runtime_en : 1; + u32 smbus_en : 1; + u32 ncsi_en : 1; + u32 rpu_en : 1; + u32 v2 : 1; + u32 pxe_en : 1; + u32 mctp_en : 1; + u32 yt8614 : 1; + u32 pci_ext_reset : 1; + u32 rpu_availble : 1; + u32 fw_lldp_ability : 1; + u32 lldp_enabled : 1; + u32 only_1g : 1; + u32 force_down_en: 1; + } e_host; + }; +} __packed; + +static inline void ability_update_host_endian(struct hw_abilities *abi) +{ + u32 host_val =3D le32_to_cpu(abi->ext_ability); + + abi->e_host =3D *(typeof(abi->e_host) *)&host_val; +} + +#define FLAGS_DD BIT(0) +#define FLAGS_ERR BIT(2) + +/* Request is in little-endian format. Big-endian systems should be consid= ered */ +struct mbx_fw_cmd_req { + __le16 flags; + __le16 opcode; + __le16 datalen; + __le16 ret_value; + union { + struct { + __le32 cookie_lo; + __le32 cookie_hi; + }; + + void *cookie; + }; + __le32 reply_lo; + __le32 reply_hi; + union { + u8 data[32]; + struct { + __le32 lane; + __le32 status; + } ifinsmod; + struct { + __le32 lane_mask; + __le32 pfvf_num; + } get_mac_addr; + }; +} __packed; + +struct mbx_fw_cmd_reply { + __le16 flags; + __le16 opcode; + __le16 error_code; + __le16 datalen; + union { + struct { + __le32 cookie_lo; + __le32 cookie_hi; + }; + void *cookie; + }; + union { + u8 data[40]; + struct mac_addr { + __le32 lanes; + struct _addr { + /* for macaddr:01:02:03:04:05:06 + * mac-hi=3D0x01020304 mac-lo=3D0x05060000 + */ + u8 mac[8]; + } addrs[4]; + } mac_addr; + struct hw_abilities hw_abilities; + }; +} __packed; + +static inline void build_phy_abilities_req(struct mbx_fw_cmd_req *req, + void *cookie) +{ + req->flags =3D 0; + req->opcode =3D cpu_to_le16(GET_PHY_ABALITY); + req->datalen =3D 0; + req->reply_lo =3D 0; + req->reply_hi =3D 0; + req->cookie =3D cookie; +} + +static inline void build_ifinsmod(struct mbx_fw_cmd_req *req, + unsigned int lane, + int status) +{ + req->flags =3D 0; + req->opcode =3D cpu_to_le16(DRIVER_INSMOD); + req->datalen =3D cpu_to_le16(sizeof(req->ifinsmod)); + req->cookie =3D NULL; + req->reply_lo =3D 0; + req->reply_hi =3D 0; + req->ifinsmod.lane =3D cpu_to_le32(lane); + req->ifinsmod.status =3D cpu_to_le32(status); +} + +static inline void build_reset_phy_req(struct mbx_fw_cmd_req *req, + void *cookie) +{ + req->flags =3D 0; + req->opcode =3D cpu_to_le16(RESET_PHY); + req->datalen =3D 0; + req->reply_lo =3D 0; + req->reply_hi =3D 0; + req->cookie =3D cookie; +} + +static inline void build_get_macaddress_req(struct mbx_fw_cmd_req *req, + int lane_mask, int pfvfnum, + void *cookie) +{ + req->flags =3D 0; + req->opcode =3D cpu_to_le16(GET_MAC_ADDRES); + req->datalen =3D cpu_to_le16(sizeof(req->get_mac_addr)); + req->cookie =3D cookie; + req->reply_lo =3D 0; + req->reply_hi =3D 0; + req->get_mac_addr.lane_mask =3D cpu_to_le32(lane_mask); + req->get_mac_addr.pfvf_num =3D cpu_to_le32(pfvfnum); +} + +int mucse_mbx_get_capability(struct mucse_hw *hw); +int mucse_mbx_ifinsmod(struct mucse_hw *hw, int status); +int mucse_mbx_fw_reset_phy(struct mucse_hw *hw); +int mucse_fw_get_macaddr(struct mucse_hw *hw, int pfvfnum, + u8 *mac_addr, int lane); +#endif /* _RNPGBE_MBX_FW_H */ --=20 2.25.1 From nobody Sat Oct 4 17:34:12 2025 Received: from smtpbguseast3.qq.com (smtpbguseast3.qq.com [54.243.244.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C8982727FD; Thu, 14 Aug 2025 07:40:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=54.243.244.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755157230; cv=none; b=DA0u9Jl1BoF6p/crHEJOZE1cdYd4x9W/0hrrHVQuZF8gyy755XWOPcp1anHCxQ/ze2Q2kwhn4xjjMqG5arPp39CJ1ulWik7goJwIZZE/xpaF1ddxfk32RyyaqKsBdJzns+CCuwlsjLzgw7Ctm8edAc/XAThKv/AHNWSJhfu7TMI= ARC-Message-Signature: i=1; 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charset="utf-8" Initialize get mac from hw, register the netdev. Signed-off-by: Dong Yibo --- drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h | 18 +++++ .../net/ethernet/mucse/rnpgbe/rnpgbe_chip.c | 73 ++++++++++++++++++ drivers/net/ethernet/mucse/rnpgbe/rnpgbe_hw.h | 1 + .../net/ethernet/mucse/rnpgbe/rnpgbe_main.c | 75 +++++++++++++++++++ 4 files changed, 167 insertions(+) diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h b/drivers/net/ether= net/mucse/rnpgbe/rnpgbe.h index 7ab1cbb432f6..7e51a8871b71 100644 --- a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h +++ b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h @@ -6,6 +6,7 @@ =20 #include #include +#include =20 extern const struct rnpgbe_info rnpgbe_n500_info; extern const struct rnpgbe_info rnpgbe_n210_info; @@ -82,6 +83,15 @@ struct mucse_mbx_info { u32 fw2pf_mbox_vec; }; =20 +struct mucse_hw_operations { + int (*reset_hw)(struct mucse_hw *hw); + void (*driver_status)(struct mucse_hw *hw, bool enable, int mode); +}; + +enum { + mucse_driver_insmod, +}; + struct mucse_hw { u8 pfvfnum; void __iomem *hw_addr; @@ -91,12 +101,17 @@ struct mucse_hw { u32 axi_mhz; u32 bd_uid; enum rnpgbe_hw_type hw_type; + const struct mucse_hw_operations *ops; struct mucse_dma_info dma; struct mucse_eth_info eth; struct mucse_mac_info mac; struct mucse_mbx_info mbx; + u32 flags; +#define M_FLAGS_INIT_MAC_ADDRESS BIT(0) u32 driver_version; u16 usecstocount; + int lane; + u8 perm_addr[ETH_ALEN]; }; =20 struct mucse { @@ -117,4 +132,7 @@ struct rnpgbe_info { #define PCI_DEVICE_ID_N500_DUAL_PORT 0x8318 #define PCI_DEVICE_ID_N210 0x8208 #define PCI_DEVICE_ID_N210L 0x820a + +#define dma_wr32(dma, reg, val) writel((val), (dma)->dma_base_addr + (reg)) +#define dma_rd32(dma, reg) readl((dma)->dma_base_addr + (reg)) #endif /* _RNPGBE_H */ diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_chip.c b/drivers/net/= ethernet/mucse/rnpgbe/rnpgbe_chip.c index e0c6f47efd4c..aba44b31eae3 100644 --- a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_chip.c +++ b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_chip.c @@ -1,11 +1,83 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 2020 - 2025 Mucse Corporation. */ =20 +#include #include +#include =20 #include "rnpgbe.h" #include "rnpgbe_hw.h" #include "rnpgbe_mbx.h" +#include "rnpgbe_mbx_fw.h" + +/** + * rnpgbe_get_permanent_mac - Get permanent mac + * @hw: hw information structure + * @mac_addr: pointer to store mac + * + * rnpgbe_get_permanent_mac tries to get mac from hw. + * It use eth_random_addr if failed. + **/ +static void rnpgbe_get_permanent_mac(struct mucse_hw *hw, + u8 *mac_addr) +{ + struct device *dev =3D &hw->pdev->dev; + + if (mucse_fw_get_macaddr(hw, hw->pfvfnum, mac_addr, hw->lane) || + !is_valid_ether_addr(mac_addr)) { + dev_warn(dev, "Failed to get valid MAC from FW, using random\n"); + eth_random_addr(mac_addr); + } + + hw->flags |=3D M_FLAGS_INIT_MAC_ADDRESS; +} + +/** + * rnpgbe_reset_hw_ops - Do a hardware reset + * @hw: hw information structure + * + * rnpgbe_reset_hw_ops calls fw to do a hardware + * reset, and cleans some regs to default. + * + * @return: 0 on success, negative on failure + **/ +static int rnpgbe_reset_hw_ops(struct mucse_hw *hw) +{ + struct mucse_dma_info *dma =3D &hw->dma; + int err; + + dma_wr32(dma, RNPGBE_DMA_AXI_EN, 0); + err =3D mucse_mbx_fw_reset_phy(hw); + if (err) + return err; + /* Store the permanent mac address */ + if (!(hw->flags & M_FLAGS_INIT_MAC_ADDRESS)) + rnpgbe_get_permanent_mac(hw, hw->perm_addr); + + return 0; +} + +/** + * rnpgbe_driver_status_hw_ops - Echo driver status to hw + * @hw: hw information structure + * @enable: true or false status + * @mode: status mode + **/ +static void rnpgbe_driver_status_hw_ops(struct mucse_hw *hw, + bool enable, + int mode) +{ + switch (mode) { + case mucse_driver_insmod: + mucse_mbx_ifinsmod(hw, enable); + break; + } +} + +static const struct mucse_hw_operations rnpgbe_hw_ops =3D { + .reset_hw =3D &rnpgbe_reset_hw_ops, + .driver_status =3D &rnpgbe_driver_status_hw_ops, +}; =20 /** * rnpgbe_init_common - Setup common attribute @@ -25,6 +97,7 @@ static void rnpgbe_init_common(struct mucse_hw *hw) mac->mac_addr =3D hw->hw_addr + RNPGBE_MAC_BASE; =20 hw->mbx.ops =3D &mucse_mbx_ops_generic; + hw->ops =3D &rnpgbe_hw_ops; } =20 /** diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_hw.h b/drivers/net/et= hernet/mucse/rnpgbe/rnpgbe_hw.h index aee037e3219d..4e07328ccf82 100644 --- a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_hw.h +++ b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_hw.h @@ -9,6 +9,7 @@ #define RNPGBE_ETH_BASE 0x10000 /**************** DMA Registers ****************************/ #define RNPGBE_DMA_DUMY 0x000c +#define RNPGBE_DMA_AXI_EN 0x0010 /**************** CHIP Resource ****************************/ #define RNPGBE_MAX_QUEUES 8 #endif /* _RNPGBE_HW_H */ diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_main.c b/drivers/net/= ethernet/mucse/rnpgbe/rnpgbe_main.c index 1fef7fa30208..a377ecaa0da5 100644 --- a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_main.c +++ b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_main.c @@ -8,6 +8,7 @@ #include =20 #include "rnpgbe.h" +#include "rnpgbe_mbx_fw.h" =20 static const char rnpgbe_driver_name[] =3D "rnpgbe"; static const struct rnpgbe_info *rnpgbe_info_tbl[] =3D { @@ -34,6 +35,55 @@ static struct pci_device_id rnpgbe_pci_tbl[] =3D { {0, }, }; =20 +/** + * rnpgbe_open - Called when a network interface is made active + * @netdev: network interface device structure + * + * The open entry point is called when a network interface is made + * active by the system (IFF_UP). + * + * @return: 0 on success, negative value on failure + **/ +static int rnpgbe_open(struct net_device *netdev) +{ + return 0; +} + +/** + * rnpgbe_close - Disables a network interface + * @netdev: network interface device structure + * + * The close entry point is called when an interface is de-activated + * by the OS. + * + * @return: 0, this is not allowed to fail + **/ +static int rnpgbe_close(struct net_device *netdev) +{ + return 0; +} + +/** + * rnpgbe_xmit_frame - Send a skb to driver + * @skb: skb structure to be sent + * @netdev: network interface device structure + * + * @return: NETDEV_TX_OK or NETDEV_TX_BUSY + **/ +static netdev_tx_t rnpgbe_xmit_frame(struct sk_buff *skb, + struct net_device *netdev) +{ + dev_kfree_skb_any(skb); + netdev->stats.tx_dropped++; + return NETDEV_TX_OK; +} + +static const struct net_device_ops rnpgbe_netdev_ops =3D { + .ndo_open =3D rnpgbe_open, + .ndo_stop =3D rnpgbe_close, + .ndo_start_xmit =3D rnpgbe_xmit_frame, +}; + /** * rnpgbe_add_adapter - Add netdev for this pci_dev * @pdev: PCI device information structure @@ -103,6 +153,27 @@ static int rnpgbe_add_adapter(struct pci_dev *pdev, hw->dma.dma_version =3D dma_version; hw->driver_version =3D 0x0002040f; info->init(hw); + hw->mbx.ops->init_params(hw); + /* echo fw driver insmod to control hw */ + hw->ops->driver_status(hw, true, mucse_driver_insmod); + err =3D mucse_mbx_get_capability(hw); + if (err) { + dev_err(&pdev->dev, + "mucse_mbx_get_capability failed! %d\n", + err); + goto err_free_net; + } + netdev->netdev_ops =3D &rnpgbe_netdev_ops; + netdev->watchdog_timeo =3D 5 * HZ; + err =3D hw->ops->reset_hw(hw); + if (err) { + dev_err(&pdev->dev, "Hw reset failed %d\n", err); + goto err_free_net; + } + eth_hw_addr_set(netdev, hw->perm_addr); + err =3D register_netdev(netdev); + if (err) + goto err_free_net; return 0; =20 err_free_net: @@ -166,12 +237,16 @@ static int rnpgbe_probe(struct pci_dev *pdev, const s= truct pci_device_id *id) static void rnpgbe_rm_adapter(struct pci_dev *pdev) { struct mucse *mucse =3D pci_get_drvdata(pdev); + struct mucse_hw *hw =3D &mucse->hw; struct net_device *netdev; =20 if (!mucse) return; netdev =3D mucse->netdev; + if (netdev->reg_state =3D=3D NETREG_REGISTERED) + unregister_netdev(netdev); mucse->netdev =3D NULL; + hw->ops->driver_status(hw, false, mucse_driver_insmod); free_netdev(netdev); } =20 --=20 2.25.1