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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3232f8c8e4bsm535458a91.2.2025.08.14.00.27.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Aug 2025 00:27:58 -0700 (PDT) From: Yijie Yang Date: Thu, 14 Aug 2025 15:27:28 +0800 Subject: [PATCH v5 1/3] dt-bindings: arm: qcom: Document HAMOA-IOT-EVK board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250814-hamoa_initial-v5-1-817a9c6e8d47@oss.qualcomm.com> References: <20250814-hamoa_initial-v5-0-817a9c6e8d47@oss.qualcomm.com> In-Reply-To: <20250814-hamoa_initial-v5-0-817a9c6e8d47@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Yijie Yang , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755156471; l=1233; i=yijie.yang@oss.qualcomm.com; s=20240408; h=from:subject:message-id; bh=JKE8XeEWQuVBdJspgbbvbXt9TNiZ5M05CMuElgrBmxc=; b=5WuxaS3gE8ZTN7Xc4Hi7Xh/J9zRwtSs5MpD6NKLboTRCJdnznNe/G4xBrpU5cD4pq1HTxjVJb rXrTK3k/6sKBiFQ2CetL4gZo4DwyEqoaT5IGjpu0YnaaxDYqLt+RhsD X-Developer-Key: i=yijie.yang@oss.qualcomm.com; a=ed25519; pk=XvMv0rxjrXLYFdBXoFjTdOdAwDT5SPbQ5uAKGESDihk= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODEwMDA1NyBTYWx0ZWRfXwR6evecUIFUC kidS674QwBfOimFbtZEFej/3aJOy5KsLbNL1+2HJE8i0vQfhxkm3UTz/AKXETe3pccGjMZWqxbr DZ29uMyyY5UMoeuV5TEjOv1cw5Age2GQvE2RG956MD931pL7uUwPQRsXkUb09fLBJ0es3mEYXTq RulnkPJXNLrmH07jGbIQp03Odj4hMoMlWzXAwp+mIuS/xNr5OMzJnIFxXSfCXVszc8eFlnwb00Z HeoVW9pdaKDAJs6xpJtpGsDETZfOZ378QdRGBA239iyCPsefgB3Kukc/8fjHvBZb0X3Os81i35z 1tb0UMk0bZ4mDFYHzbFMBVm1dGaJVfKEwEHOupcIkeZaQaz0IP4/+GBjbOrrZfG6M+u1RqpofPE emmRnAq0 X-Proofpoint-GUID: vwMW2kCWYwpHj_TeIbOzsogeAHLzBJ_L X-Authority-Analysis: v=2.4 cv=aYNhnQot c=1 sm=1 tr=0 ts=689d9001 cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=Bh1HEMNN3wmc11-eFpoA:9 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-ORIG-GUID: vwMW2kCWYwpHj_TeIbOzsogeAHLzBJ_L X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-13_02,2025-08-11_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 adultscore=0 priorityscore=1501 suspectscore=0 phishscore=0 impostorscore=0 bulkscore=0 malwarescore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508100057 Document the device tree binding for the HAMOA-IOT-EVK board, which uses the Qualcomm X1E80100 SoC. The EVK consists of a carrier board and a modular System-on-Module (SoM). The SoM integrates the SoC, PMICs, and essential GPIOs, while the EVK carrier board provides additional peripherals such as UART and USB interfaces. Acked-by: Krzysztof Kozlowski Signed-off-by: Yijie Yang --- Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentatio= n/devicetree/bindings/arm/qcom.yaml index 55e5eb75af8905c93e6604d54d516585f70a8e29..6b6503181ad6f2e4932a52d86a5= 4c77e7fbbac9e 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1069,6 +1069,12 @@ properties: - qcom,x1e80100-qcp - const: qcom,x1e80100 =20 + - items: + - enum: + - qcom,hamoa-iot-evk + - const: qcom,hamoa-iot-som + - const: qcom,x1e80100 + - items: - enum: - asus,zenbook-a14-ux3407qa --=20 2.34.1 From nobody Sat Oct 4 17:34:14 2025 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 72BC4271450 for ; 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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3232f8c8e4bsm535458a91.2.2025.08.14.00.27.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Aug 2025 00:28:02 -0700 (PDT) From: Yijie Yang Date: Thu, 14 Aug 2025 15:27:29 +0800 Subject: [PATCH v5 2/3] arm64: dts: qcom: Add HAMOA-IOT-SOM platform Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250814-hamoa_initial-v5-2-817a9c6e8d47@oss.qualcomm.com> References: <20250814-hamoa_initial-v5-0-817a9c6e8d47@oss.qualcomm.com> In-Reply-To: <20250814-hamoa_initial-v5-0-817a9c6e8d47@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Yijie Yang , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , Yingying Tang X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755156471; l=15992; i=yijie.yang@oss.qualcomm.com; s=20240408; h=from:subject:message-id; bh=rs+I3NxdGWGPrWcdV6a4tDGuvafkt/lAKauxDP5ubTg=; b=qZMIi1GiPdSBSjcYqQFvyFM+D0m1KgdyHl3yKMyJe+zGhFuwv04nHcIUPqTzc0DKycyDA5D+Y 5HPONvhLmDyDiDWeNIuxlLCfa02f3Ja95nun1+oE4HohNetDfw8QD+m X-Developer-Key: i=yijie.yang@oss.qualcomm.com; a=ed25519; pk=XvMv0rxjrXLYFdBXoFjTdOdAwDT5SPbQ5uAKGESDihk= X-Authority-Analysis: v=2.4 cv=G6EcE8k5 c=1 sm=1 tr=0 ts=689d9004 cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=EUspDBNiAAAA:8 a=COk6AnOGAAAA:8 a=kJpOf-JYLzBZDkfq8aYA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODExMDA5NyBTYWx0ZWRfXzUXXjEaUXraV /4p8QD6aQnt6IESUfW68YAtlirl+XwKYE510ntoj5/wii7JgULb62+q1wB5VjgNp5iGPCLrFmYo ozcfH9Kl/R8Xhjy6UfrsqNSNvNxQzIIv7sNhRuiLSqIOLD2e/wzG07nM90nZLjRX1jfBp+MAShZ DCT/7uEk9AMlTfJkaVaiogaRGuC+eUXKLhJolvsQdb7flMUQF5ia/nk9MHt8YJoJrksCwe2CrUo o3fg82SZQSkCcwinDxugiONKqGqrWJH2j/HSCdB9uUvg8/pMvIXnBJ8TWS+7nKwbbtTbdnLdDGf wsZMfRSHbTqNIPM304gw555fvUVh9e+3P0KKLaGnO8gmr+rifs8oDugnR32HlnckIh3GHjK7KXf qYeNkMUF X-Proofpoint-ORIG-GUID: QbAl6_TheS8UA5lGaOhRxNqBMWzrwbOL X-Proofpoint-GUID: QbAl6_TheS8UA5lGaOhRxNqBMWzrwbOL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-13_02,2025-08-11_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 priorityscore=1501 bulkscore=0 spamscore=0 phishscore=0 malwarescore=0 adultscore=0 impostorscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508110097 The HAMOA-IOT-SOM is a compact computing module that integrates a System on Chip (SoC) =E2=80=94 specifically the x1e80100 =E2=80=94 along with esse= ntial components optimized for IoT applications. It is designed to be mounted on carrier boards, enabling the development of complete embedded systems. This change enables the following components: - Regulators on the SOM - Reserved memory regions - PCIe6a and its PHY - PCIe4 and its PHY - USB0 through USB6 and their PHYs - ADSP, CDSP - WLAN, Bluetooth (M.2 interface) Reviewed-by: Konrad Dybcio Co-developed-by: Yingying Tang # PCIe4 and WLAN Signed-off-by: Yingying Tang Signed-off-by: Yijie Yang --- arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi | 609 ++++++++++++++++++++++++= ++++ 1 file changed, 609 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi b/arch/arm64/boot/= dts/qcom/hamoa-iot-som.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..c9ce782fbc4d9d7a600048c9d30= 715176aae4457 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi @@ -0,0 +1,609 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "x1e80100.dtsi" +#include "x1e80100-pmics.dtsi" +#include +#include + +/ { + compatible =3D "hamoa-iot-som", "qcom,x1e80100"; + + reserved-memory { + linux,cma { + compatible =3D "shared-dma-pool"; + size =3D <0x0 0x8000000>; + reusable; + linux,cma-default; + }; + }; +}; + +&apps_rsc { + /* PMC8380C_B */ + regulators-0 { + compatible =3D "qcom,pm8550-rpmh-regulators"; + qcom,pmic-id =3D "b"; + + vdd-bob1-supply =3D <&vph_pwr>; + vdd-bob2-supply =3D <&vph_pwr>; + vdd-l1-l4-l10-supply =3D <&vreg_s4c_1p8>; + vdd-l2-l13-l14-supply =3D <&vreg_bob1>; + vdd-l5-l16-supply =3D <&vreg_bob1>; + vdd-l6-l7-supply =3D <&vreg_bob2>; + vdd-l8-l9-supply =3D <&vreg_bob1>; + vdd-l12-supply =3D <&vreg_s5j_1p2>; + vdd-l15-supply =3D <&vreg_s4c_1p8>; + vdd-l17-supply =3D <&vreg_bob2>; + + vreg_bob1: bob1 { + regulator-name =3D "vreg_bob1"; + regulator-min-microvolt =3D <3008000>; + regulator-max-microvolt =3D <3960000>; + regulator-initial-mode =3D ; + }; + + vreg_bob2: bob2 { + regulator-name =3D "vreg_bob2"; + regulator-min-microvolt =3D <2504000>; + regulator-max-microvolt =3D <3008000>; + regulator-initial-mode =3D ; + }; + + vreg_l1b_1p8: ldo1 { + regulator-name =3D "vreg_l1b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l2b_3p0: ldo2 { + regulator-name =3D "vreg_l2b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3100000>; + regulator-initial-mode =3D ; + }; + + vreg_l4b_1p8: ldo4 { + regulator-name =3D "vreg_l4b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l5b_3p0: ldo5 { + regulator-name =3D "vreg_l5b_3p0"; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + regulator-initial-mode =3D ; + }; + + vreg_l6b_1p8: ldo6 { + regulator-name =3D "vreg_l6b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l7b_2p8: ldo7 { + regulator-name =3D "vreg_l7b_2p8"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + regulator-initial-mode =3D ; + }; + + vreg_l8b_3p0: ldo8 { + regulator-name =3D "vreg_l8b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l9b_2p9: ldo9 { + regulator-name =3D "vreg_l9b_2p9"; + regulator-min-microvolt =3D <2960000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l10b_1p8: ldo10 { + regulator-name =3D "vreg_l10b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l12b_1p2: ldo12 { + regulator-name =3D "vreg_l12b_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + regulator-always-on; + }; + + vreg_l13b_3p0: ldo13 { + regulator-name =3D "vreg_l13b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3100000>; + regulator-initial-mode =3D ; + }; + + vreg_l14b_3p0: ldo14 { + regulator-name =3D "vreg_l14b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l15b_1p8: ldo15 { + regulator-name =3D "vreg_l15b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + regulator-always-on; + }; + + vreg_l16b_2p9: ldo16 { + regulator-name =3D "vreg_l16b_2p9"; + regulator-min-microvolt =3D <2912000>; + regulator-max-microvolt =3D <2912000>; + regulator-initial-mode =3D ; + }; + + vreg_l17b_2p5: ldo17 { + regulator-name =3D "vreg_l17b_2p5"; + regulator-min-microvolt =3D <2504000>; + regulator-max-microvolt =3D <2504000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380VE_C */ + regulators-1 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "c"; + + vdd-l1-supply =3D <&vreg_s5j_1p2>; + vdd-l2-supply =3D <&vreg_s1f_0p7>; + vdd-l3-supply =3D <&vreg_s1f_0p7>; + vdd-s4-supply =3D <&vph_pwr>; + + vreg_s4c_1p8: smps4 { + regulator-name =3D "vreg_s4c_1p8"; + regulator-min-microvolt =3D <1856000>; + regulator-max-microvolt =3D <2000000>; + regulator-initial-mode =3D ; + }; + + vreg_l1c_1p2: ldo1 { + regulator-name =3D "vreg_l1c_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l2c_0p8: ldo2 { + regulator-name =3D "vreg_l2c_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l3c_0p8: ldo3 { + regulator-name =3D "vreg_l3c_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380_D */ + regulators-2 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "d"; + + vdd-l1-supply =3D <&vreg_s1f_0p7>; + vdd-l2-supply =3D <&vreg_s1f_0p7>; + vdd-l3-supply =3D <&vreg_s4c_1p8>; + vdd-s1-supply =3D <&vph_pwr>; + + vreg_l1d_0p8: ldo1 { + regulator-name =3D "vreg_l1d_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l2d_0p9: ldo2 { + regulator-name =3D "vreg_l2d_0p9"; + regulator-min-microvolt =3D <912000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l3d_1p8: ldo3 { + regulator-name =3D "vreg_l3d_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380_E */ + regulators-3 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "e"; + + vdd-l2-supply =3D <&vreg_s1f_0p7>; + vdd-l3-supply =3D <&vreg_s5j_1p2>; + + vreg_l2e_0p8: ldo2 { + regulator-name =3D "vreg_l2e_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l3e_1p2: ldo3 { + regulator-name =3D "vreg_l3e_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380_F */ + regulators-4 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "f"; + + vdd-l1-supply =3D <&vreg_s5j_1p2>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-l3-supply =3D <&vreg_s5j_1p2>; + vdd-s1-supply =3D <&vph_pwr>; + + vreg_s1f_0p7: smps1 { + regulator-name =3D "vreg_s1f_0p7"; + regulator-min-microvolt =3D <700000>; + regulator-max-microvolt =3D <1100000>; + regulator-initial-mode =3D ; + }; + + vreg_l1f_1p0: ldo1 { + regulator-name =3D "vreg_l1f_1p0"; + regulator-min-microvolt =3D <1024000>; + regulator-max-microvolt =3D <1024000>; + regulator-initial-mode =3D ; + }; + + vreg_l2f_1p0: ldo2 { + regulator-name =3D "vreg_l2f_1p0"; + regulator-min-microvolt =3D <1024000>; + regulator-max-microvolt =3D <1024000>; + regulator-initial-mode =3D ; + }; + + vreg_l3f_1p0: ldo3 { + regulator-name =3D "vreg_l3f_1p0"; + regulator-min-microvolt =3D <1024000>; + regulator-max-microvolt =3D <1024000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380VE_I */ + regulators-6 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "i"; + + vdd-l1-supply =3D <&vreg_s4c_1p8>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-l3-supply =3D <&vreg_s1f_0p7>; + vdd-s1-supply =3D <&vph_pwr>; + vdd-s2-supply =3D <&vph_pwr>; + + vreg_s1i_0p9: smps1 { + regulator-name =3D "vreg_s1i_0p9"; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_s2i_1p0: smps2 { + regulator-name =3D "vreg_s2i_1p0"; + regulator-min-microvolt =3D <1000000>; + regulator-max-microvolt =3D <1100000>; + regulator-initial-mode =3D ; + }; + + vreg_l1i_1p8: ldo1 { + regulator-name =3D "vreg_l1i_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l2i_1p2: ldo2 { + regulator-name =3D "vreg_l2i_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l3i_0p8: ldo3 { + regulator-name =3D "vreg_l3i_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380VE_J */ + regulators-7 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "j"; + + vdd-l1-supply =3D <&vreg_s1f_0p7>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-l3-supply =3D <&vreg_s1f_0p7>; + vdd-s5-supply =3D <&vph_pwr>; + + vreg_s5j_1p2: smps5 { + regulator-name =3D "vreg_s5j_1p2"; + regulator-min-microvolt =3D <1256000>; + regulator-max-microvolt =3D <1304000>; + regulator-initial-mode =3D ; + }; + + vreg_l1j_0p8: ldo1 { + regulator-name =3D "vreg_l1j_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l2j_1p2: ldo2 { + regulator-name =3D "vreg_l2j_1p2"; + regulator-min-microvolt =3D <1256000>; + regulator-max-microvolt =3D <1256000>; + regulator-initial-mode =3D ; + }; + + vreg_l3j_0p8: ldo3 { + regulator-name =3D "vreg_l3j_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + }; +}; + +&pcie4 { + perst-gpios =3D <&tlmm 146 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 148 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&pcie4_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie4_phy { + vdda-phy-supply =3D <&vreg_l3i_0p8>; + vdda-pll-supply =3D <&vreg_l3e_1p2>; + + status =3D "okay"; +}; + +&pcie6a { + perst-gpios =3D <&tlmm 152 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 154 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&pcie6a_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie6a_phy { + vdda-phy-supply =3D <&vreg_l1d_0p8>; + vdda-pll-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&qupv3_0 { + status =3D "okay"; +}; + +&qupv3_1 { + status =3D "okay"; +}; + +&qupv3_2 { + status =3D "okay"; +}; + +&remoteproc_adsp { + firmware-name =3D "qcom/x1e80100/adsp.mbn", + "qcom/x1e80100/adsp_dtb.mbn"; + + status =3D "okay"; +}; + +&remoteproc_cdsp { + firmware-name =3D "qcom/x1e80100/cdsp.mbn", + "qcom/x1e80100/cdsp_dtb.mbn"; + + status =3D "okay"; +}; + +&tlmm { + gpio-reserved-ranges =3D <34 2>, /* TPM LP & INT */ + <44 4>; /* SPI (TPM) */ + + pcie4_default: pcie4-default-state { + clkreq-n-pins { + pins =3D "gpio147"; + function =3D "pcie4_clk"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-n-pins { + pins =3D "gpio146"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wake-n-pins { + pins =3D "gpio148"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + pcie6a_default: pcie6a-default-state { + clkreq-n-pins { + pins =3D "gpio153"; + function =3D "pcie6a_clk"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-n-pins { + pins =3D "gpio152"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wake-n-pins { + pins =3D "gpio154"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + + }; + }; +}; + +&usb_1_ss0 { + status =3D "okay"; +}; + +&usb_1_ss0_dwc3 { + dr_mode =3D "otg"; + usb-role-switch; +}; + +&usb_1_ss0_hsphy { + vdd-supply =3D <&vreg_l3j_0p8>; + vdda12-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&usb_1_ss0_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l1j_0p8>; + + status =3D "okay"; +}; + +&usb_1_ss1 { + status =3D "okay"; +}; + +&usb_1_ss1_dwc3 { + dr_mode =3D "otg"; + usb-role-switch; +}; + +&usb_1_ss1_hsphy { + vdd-supply =3D <&vreg_l3j_0p8>; + vdda12-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&usb_1_ss1_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l2d_0p9>; + + status =3D "okay"; +}; + +&usb_1_ss2 { + status =3D "okay"; +}; + +&usb_1_ss2_dwc3 { + dr_mode =3D "otg"; + usb-role-switch; +}; + +&usb_1_ss2_hsphy { + vdd-supply =3D <&vreg_l3j_0p8>; + vdda12-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&usb_1_ss2_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l2d_0p9>; + + status =3D "okay"; +}; + +&usb_2 { + status =3D "okay"; +}; + +&usb_2_dwc3 { + dr_mode =3D "host"; +}; + +&usb_2_hsphy { + vdd-supply =3D <&vreg_l2e_0p8>; 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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3232f8c8e4bsm535458a91.2.2025.08.14.00.28.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Aug 2025 00:28:05 -0700 (PDT) From: Yijie Yang Date: Thu, 14 Aug 2025 15:27:30 +0800 Subject: [PATCH v5 3/3] arm64: dts: qcom: Add base HAMOA-IOT-EVK board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250814-hamoa_initial-v5-3-817a9c6e8d47@oss.qualcomm.com> References: <20250814-hamoa_initial-v5-0-817a9c6e8d47@oss.qualcomm.com> In-Reply-To: <20250814-hamoa_initial-v5-0-817a9c6e8d47@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Yijie Yang , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Shuai Zhang , Yongxing Mou X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755156471; l=22428; i=yijie.yang@oss.qualcomm.com; s=20240408; h=from:subject:message-id; bh=S+PRcLshjcevgFFkRmnpF2ebfw+1GgiwYl5B8VOawtQ=; b=4YdzFEHbcM/+fKBXYB3Q8pQnyAsSm9RmwM9+ylrHULFeoCLysTyOZI+ol2jaQgo15DC1tJ/B6 EoRnXG/t2sHDhf59dwy9es84k5FCLfgRBva6No0s4EFxv9Ro/tL9F1l X-Developer-Key: i=yijie.yang@oss.qualcomm.com; a=ed25519; pk=XvMv0rxjrXLYFdBXoFjTdOdAwDT5SPbQ5uAKGESDihk= X-Proofpoint-GUID: wvK98lTvV6brB7bENKazfiUwlb_s8agy X-Proofpoint-ORIG-GUID: wvK98lTvV6brB7bENKazfiUwlb_s8agy X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODExMDA2OCBTYWx0ZWRfX093w19/ojpYo 757iLyIckvl/CxmK7VnyOuJCKg34AGMLjTY8bnvGqKxRning147jAZcS9sDGBtUutxmqqOdfJSA PAcn377gz4yLOmjEeGGsfV9y6oiQuE/7Wpg1xAZZztPIj1CLf6p0NOmvXVpUjiuzRAYcLWAlaC3 KJji7i83Lqgij3AgpChdKeBtJg3mkqWyuyWSqw+H/CzRGfAE64AlL2aR/0eWVbpC1VQYed95uhl Z7tm+Op1sj9hlApL5MJU/FZ13BcmR9UfDkW1FyjKXm9Gqk0GCtxX/SK8zbvHzLg5yhKOKjEBi2r 5M1p3X4RyJlqZAWn0dQMGLvlRuN53oWyUrDktIyXRAfYsGPTEE5ejEGhMtrvqcz+vSsRf0zR91T GlTAYLny X-Authority-Analysis: v=2.4 cv=YMafyQGx c=1 sm=1 tr=0 ts=689d9008 cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=_DTKrxg_pFKH8Kdk8cMA:9 a=QEXdDO2ut3YA:10 a=_Vgx9l1VpLgwpw_dHYaR:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-13_02,2025-08-11_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 clxscore=1015 priorityscore=1501 spamscore=0 suspectscore=0 adultscore=0 impostorscore=0 malwarescore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508110068 The HAMOA-IOT-EVK is an evaluation platform for IoT products, composed of the Hamoa IoT SoM and a carrier board. Together, they form a complete embedded system capable of booting to UART. This change enables the following peripherals on the carrier board: - UART - On-board regulators - USB Type-C mux - Pinctrl - Embedded USB (EUSB) repeaters - NVMe - pmic-glink - USB DisplayPorts Co-developed-by: Shuai Zhang # Bluetooth Signed-off-by: Shuai Zhang Co-developed-by: Yongxing Mou # USB DisplayPorts Signed-off-by: Yongxing Mou Signed-off-by: Yijie Yang --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts | 987 +++++++++++++++++++++++++= ++++ 2 files changed, 988 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 94a84770b0802a9dc0c56ce6c59eea20967a5d89..5e19535ad63d4ec48342024bba0= 84ee04f2a6ce0 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D apq8039-t2.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D apq8094-sony-xperia-kitakami-karin_windy.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D apq8096-db820c.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D apq8096-ifc6640.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D hamoa-iot-evk.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D ipq5018-rdp432-c2.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D ipq5018-tplink-archer-ax55-v1.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D ipq5332-rdp441.dtb diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts b/arch/arm64/boot/d= ts/qcom/hamoa-iot-evk.dts new file mode 100644 index 0000000000000000000000000000000000000000..c7b7e4481b2c873be5ce68cbd52= 931b4971f7e85 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts @@ -0,0 +1,987 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "hamoa-iot-som.dtsi" + +/ { + model =3D "Qualcomm Technologies, Inc. Hamoa IoT EVK"; + compatible =3D "qcom,hamoa-iot-evk", "qcom,hamoa-iot-som", "qcom,x1e80100= "; + chassis-type =3D "embedded"; + + aliases { + serial0 =3D &uart21; + serial1 =3D &uart14; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + pmic-glink { + compatible =3D "qcom,x1e80100-pmic-glink", + "qcom,sm8550-pmic-glink", + "qcom,pmic-glink"; + #address-cells =3D <1>; + #size-cells =3D <0>; + orientation-gpios =3D <&tlmm 121 GPIO_ACTIVE_HIGH>, + <&tlmm 123 GPIO_ACTIVE_HIGH>, + <&tlmm 125 GPIO_ACTIVE_HIGH>; + + connector@0 { + compatible =3D "usb-c-connector"; + reg =3D <0>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_ss0_hs_in: endpoint { + remote-endpoint =3D <&usb_1_ss0_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss0_ss_in: endpoint { + remote-endpoint =3D <&usb_1_ss0_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss0_sbu: endpoint { + remote-endpoint =3D <&usb_1_ss0_sbu_mux>; + }; + }; + }; + }; + + connector@1 { + compatible =3D "usb-c-connector"; + reg =3D <1>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_ss1_hs_in: endpoint { + remote-endpoint =3D <&usb_1_ss1_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss1_ss_in: endpoint { + remote-endpoint =3D <&retimer_ss1_ss_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss1_con_sbu_in: endpoint { + remote-endpoint =3D <&retimer_ss1_con_sbu_out>; + }; + }; + }; + }; + + connector@2 { + compatible =3D "usb-c-connector"; + reg =3D <2>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_ss2_hs_in: endpoint { + remote-endpoint =3D <&usb_1_ss2_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss2_ss_in: endpoint { + remote-endpoint =3D <&retimer_ss2_ss_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss2_con_sbu_in: endpoint { + remote-endpoint =3D <&retimer_ss2_con_sbu_out>; + }; + }; + }; + }; + }; + + vreg_edp_3p3: regulator-edp-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_EDP_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 70 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&edp_reg_en>; + pinctrl-names =3D "default"; + + regulator-always-on; + regulator-boot-on; + }; + + vph_pwr: regulator-vph-pwr { + compatible =3D "regulator-fixed"; + + regulator-name =3D "vph_pwr"; + regulator-min-microvolt =3D <3700000>; + regulator-max-microvolt =3D <3700000>; + + regulator-always-on; + regulator-boot-on; + }; + + vreg_nvme: regulator-nvme { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_NVME_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 18 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&nvme_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + /* Left unused as the retimer is not used on this board. */ + vreg_rtmr0_1p15: regulator-rtmr0-1p15 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR0_1P15"; + regulator-min-microvolt =3D <1150000>; + regulator-max-microvolt =3D <1150000>; + + gpio =3D <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb0_pwr_1p15_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr0_1p8: regulator-rtmr0-1p8 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR0_1P8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + gpio =3D <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb0_1p8_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr0_3p3: regulator-rtmr0-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR0_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb0_3p3_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_1p15: regulator-rtmr1-1p15 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR1_1P15"; + regulator-min-microvolt =3D <1150000>; + regulator-max-microvolt =3D <1150000>; + + gpio =3D <&tlmm 188 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb1_pwr_1p15_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_1p8: regulator-rtmr1-1p8 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR1_1P8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + gpio =3D <&tlmm 175 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb1_pwr_1p8_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_3p3: regulator-rtmr1-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR1_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 186 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb1_pwr_3p3_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr2_1p15: regulator-rtmr2-1p15 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR2_1P15"; + regulator-min-microvolt =3D <1150000>; + regulator-max-microvolt =3D <1150000>; + + gpio =3D <&tlmm 189 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb2_pwr_1p15_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr2_1p8: regulator-rtmr2-1p8 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR2_1P8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + gpio =3D <&tlmm 126 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb2_pwr_1p8_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr2_3p3: regulator-rtmr2-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR2_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 187 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb2_pwr_3p3_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_wcn_3p3: regulator-wcn-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 214 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&wcn_sw_en>; + pinctrl-names =3D "default"; + + regulator-always-on; + }; + + usb-1-ss0-sbu-mux { + compatible =3D "onnn,fsusb42", "gpio-sbu-mux"; + + enable-gpios =3D <&tlmm 168 GPIO_ACTIVE_LOW>; + select-gpios =3D <&tlmm 167 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&usb_1_ss0_sbu_default>; + pinctrl-names =3D "default"; + + mode-switch; + orientation-switch; + + port { + usb_1_ss0_sbu_mux: endpoint { + remote-endpoint =3D <&pmic_glink_ss0_sbu>; + }; + }; + }; + + /* + * TODO: These two regulators are actually part of the removable M.2 + * card and not the CRD mainboard. Need to describe this differently. + * Functionally it works correctly, because all we need to do is to + * turn on the actual 3.3V supply above. + */ + vreg_wcn_0p95: regulator-wcn-0p95 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_0P95"; + regulator-min-microvolt =3D <950000>; + regulator-max-microvolt =3D <950000>; + + vin-supply =3D <&vreg_wcn_3p3>; + }; + + vreg_wcn_1p9: regulator-wcn-1p9 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_1P9"; + regulator-min-microvolt =3D <1900000>; + regulator-max-microvolt =3D <1900000>; + + vin-supply =3D <&vreg_wcn_3p3>; + }; + + vreg_wwan: regulator-wwan { + compatible =3D "regulator-fixed"; + + regulator-name =3D "SDX_VPH_PWR"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 221 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&wwan_sw_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + wcn7850-pmu { + compatible =3D "qcom,wcn7850-pmu"; + + vdd-supply =3D <&vreg_wcn_0p95>; + vddio-supply =3D <&vreg_l15b_1p8>; + vddaon-supply =3D <&vreg_wcn_0p95>; + vdddig-supply =3D <&vreg_wcn_0p95>; + vddrfa1p2-supply =3D <&vreg_wcn_1p9>; + vddrfa1p8-supply =3D <&vreg_wcn_1p9>; + + bt-enable-gpios =3D <&tlmm 116 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&wcn_bt_en>; + pinctrl-names =3D "default"; + + regulators { + vreg_pmu_rfa_cmn: ldo0 { + regulator-name =3D "vreg_pmu_rfa_cmn"; + }; + + vreg_pmu_aon_0p59: ldo1 { + regulator-name =3D "vreg_pmu_aon_0p59"; + }; + + vreg_pmu_wlcx_0p8: ldo2 { + regulator-name =3D "vreg_pmu_wlcx_0p8"; + }; + + vreg_pmu_wlmx_0p85: ldo3 { + regulator-name =3D "vreg_pmu_wlmx_0p85"; + }; + + vreg_pmu_btcmx_0p85: ldo4 { + regulator-name =3D "vreg_pmu_btcmx_0p85"; + }; + + vreg_pmu_rfa_0p8: ldo5 { + regulator-name =3D "vreg_pmu_rfa_0p8"; + }; + + vreg_pmu_rfa_1p2: ldo6 { + regulator-name =3D "vreg_pmu_rfa_1p2"; + }; + + vreg_pmu_rfa_1p8: ldo7 { + regulator-name =3D "vreg_pmu_rfa_1p8"; + }; + + vreg_pmu_pcie_0p9: ldo8 { + regulator-name =3D "vreg_pmu_pcie_0p9"; + }; + + vreg_pmu_pcie_1p8: ldo9 { + regulator-name =3D "vreg_pmu_pcie_1p8"; + }; + }; + }; +}; + +&i2c1 { + clock-frequency =3D <400000>; + status =3D "okay"; + + typec-mux@8 { + compatible =3D "parade,ps8830"; + reg =3D <0x08>; + + clocks =3D <&rpmhcc RPMH_RF_CLK5>; + + vdd-supply =3D <&vreg_rtmr2_1p15>; + vdd33-supply =3D <&vreg_rtmr2_3p3>; + vdd33-cap-supply =3D <&vreg_rtmr2_3p3>; + vddar-supply =3D <&vreg_rtmr2_1p15>; + vddat-supply =3D <&vreg_rtmr2_1p15>; + vddio-supply =3D <&vreg_rtmr2_1p8>; + + reset-gpios =3D <&tlmm 185 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&rtmr2_default>; + pinctrl-names =3D "default"; + + orientation-switch; + retimer-switch; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + retimer_ss2_ss_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss2_ss_in>; + }; + }; + + port@1 { + reg =3D <1>; + + retimer_ss2_ss_in: endpoint { + remote-endpoint =3D <&usb_1_ss2_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + retimer_ss2_con_sbu_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss2_con_sbu_in>; + }; + }; + }; + }; +}; + +&i2c5 { + clock-frequency =3D <400000>; + status =3D "okay"; + + eusb3_repeater: redriver@47 { + compatible =3D "nxp,ptn3222"; + reg =3D <0x47>; + #phy-cells =3D <0>; + + vdd3v3-supply =3D <&vreg_l13b_3p0>; + vdd1v8-supply =3D <&vreg_l4b_1p8>; + + reset-gpios =3D <&tlmm 6 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&eusb3_reset_n>; + pinctrl-names =3D "default"; + }; + + eusb5_repeater: redriver@43 { + compatible =3D "nxp,ptn3222"; + reg =3D <0x43>; + #phy-cells =3D <0>; + + vdd3v3-supply =3D <&vreg_l13b_3p0>; + vdd1v8-supply =3D <&vreg_l4b_1p8>; + + reset-gpios =3D <&tlmm 7 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&eusb5_reset_n>; + pinctrl-names =3D "default"; + }; + + eusb6_repeater: redriver@4f { + compatible =3D "nxp,ptn3222"; + reg =3D <0x4f>; + #phy-cells =3D <0>; + + vdd3v3-supply =3D <&vreg_l13b_3p0>; + vdd1v8-supply =3D <&vreg_l4b_1p8>; + + reset-gpios =3D <&tlmm 184 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&eusb6_reset_n>; + pinctrl-names =3D "default"; + }; +}; + +&i2c7 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + typec-mux@8 { + compatible =3D "parade,ps8830"; + reg =3D <0x8>; + + clocks =3D <&rpmhcc RPMH_RF_CLK4>; + + vdd-supply =3D <&vreg_rtmr1_1p15>; + vdd33-supply =3D <&vreg_rtmr1_3p3>; + vdd33-cap-supply =3D <&vreg_rtmr1_3p3>; + vddar-supply =3D <&vreg_rtmr1_1p15>; + vddat-supply =3D <&vreg_rtmr1_1p15>; + vddio-supply =3D <&vreg_rtmr1_1p8>; + + reset-gpios =3D <&tlmm 176 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&rtmr1_default>; + pinctrl-names =3D "default"; + + retimer-switch; + orientation-switch; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + retimer_ss1_ss_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss1_ss_in>; + }; + }; + + port@1 { + reg =3D <1>; + + retimer_ss1_ss_in: endpoint { + remote-endpoint =3D <&usb_1_ss1_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + retimer_ss1_con_sbu_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss1_con_sbu_in>; + }; + }; + }; + }; +}; + +&mdss { + status =3D "okay"; +}; + +&mdss_dp0 { + status =3D "okay"; +}; + +&mdss_dp0_out { + data-lanes =3D <0 1>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +&mdss_dp1 { + status =3D "okay"; +}; + +&mdss_dp1_out { + data-lanes =3D <0 1>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +&mdss_dp2 { + status =3D "okay"; +}; + +&mdss_dp2_out { + data-lanes =3D <0 1>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +&mdss_dp3 { + /delete-property/ #sound-dai-cells; + + status =3D "okay"; + + aux-bus { + panel { + compatible =3D "edp-panel"; + power-supply =3D <&vreg_edp_3p3>; + + port { + edp_panel_in: endpoint { + remote-endpoint =3D <&mdss_dp3_out>; + }; + }; + }; + }; +}; + +&mdss_dp3_out { + data-lanes =3D <0 1 2 3>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; + + remote-endpoint =3D <&edp_panel_in>; +}; + +&mdss_dp3_phy { + vdda-phy-supply =3D <&vreg_l3j_0p8>; + vdda-pll-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&pcie6a { + vddpe-3v3-supply =3D <&vreg_nvme>; +}; + +&pm8550_gpios { + rtmr0_default: rtmr0-reset-n-active-state { + pins =3D "gpio10"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + bias-disable; + input-disable; + output-enable; + }; + + usb0_3p3_reg_en: usb0-3p3-reg-en-state { + pins =3D "gpio11"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + bias-disable; + input-disable; + output-enable; + }; +}; + +&pm8550ve_9_gpios { + usb0_1p8_reg_en: usb0-1p8-reg-en-state { + pins =3D "gpio8"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + bias-disable; + input-disable; + output-enable; + }; +}; + +&pmc8380_5_gpios { + usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state { + pins =3D "gpio8"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + bias-disable; + input-disable; + output-enable; + }; +}; + +&smb2360_0 { + status =3D "okay"; +}; + +&smb2360_0_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l2b_3p0>; +}; + +&smb2360_1 { + status =3D "okay"; +}; + +&smb2360_1_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l14b_3p0>; +}; + +&smb2360_2 { + status =3D "okay"; +}; + +&smb2360_2_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l8b_3p0>; +}; + +&tlmm { + edp_reg_en: edp-reg-en-state { + pins =3D "gpio70"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + }; + + eusb3_reset_n: eusb3-reset-n-state { + pins =3D "gpio6"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + output-low; + }; + + eusb5_reset_n: eusb5-reset-n-state { + pins =3D "gpio7"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + output-low; + }; + + eusb6_reset_n: eusb6-reset-n-state { + pins =3D "gpio184"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + output-low; + }; + + nvme_reg_en: nvme-reg-en-state { + pins =3D "gpio18"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + rtmr1_default: rtmr1-reset-n-active-state { + pins =3D "gpio176"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + rtmr2_default: rtmr2-reset-n-active-state { + pins =3D "gpio185"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb1_pwr_1p15_reg_en: usb1-pwr-1p15-reg-en-state { + pins =3D "gpio188"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb1_pwr_1p8_reg_en: usb1-pwr-1p8-reg-en-state { + pins =3D "gpio175"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb1_pwr_3p3_reg_en: usb1-pwr-3p3-reg-en-state { + pins =3D "gpio186"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb2_pwr_1p15_reg_en: usb2-pwr-1p15-reg-en-state { + pins =3D "gpio189"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb2_pwr_1p8_reg_en: usb2-pwr-1p8-reg-en-state { + pins =3D "gpio126"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb2_pwr_3p3_reg_en: usb2-pwr-3p3-reg-en-state { + pins =3D "gpio187"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb_1_ss0_sbu_default: usb-1-ss0-sbu-state { + mode-pins { + pins =3D "gpio166"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + output-high; + }; + + oe-n-pins { + pins =3D "gpio168"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + }; + + sel-pins { + pins =3D "gpio167"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + }; + }; + + wcn_bt_en: wcn-bt-en-state { + pins =3D "gpio116"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wwan_sw_en: wwan-sw-en-state { + pins =3D "gpio221"; + function =3D "gpio"; + drive-strength =3D <4>; + bias-disable; + }; + + wcn_sw_en: wcn-sw-en-state { + pins =3D "gpio214"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + /* Switches USB signal routing between the USB connector and the Wi-Fi ca= rd. */ + wcn_usb_sw_n: wcn-usb-sw-n-state { + pins =3D "gpio225"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + output-high; + }; +}; + +&uart14 { + status =3D "okay"; + + bluetooth { + compatible =3D "qcom,wcn7850-bt"; + max-speed =3D <3200000>; + + vddaon-supply =3D <&vreg_pmu_aon_0p59>; + vddwlcx-supply =3D <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply =3D <&vreg_pmu_wlmx_0p85>; + vddrfacmn-supply =3D <&vreg_pmu_rfa_cmn>; + vddrfa0p8-supply =3D <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply =3D <&vreg_pmu_rfa_1p2>; + vddrfa1p8-supply =3D <&vreg_pmu_rfa_1p8>; + }; +}; + +&uart21 { + compatible =3D "qcom,geni-debug-uart"; + + status =3D "okay"; +}; + +&usb_1_ss0_dwc3_hs { + remote-endpoint =3D <&pmic_glink_ss0_hs_in>; +}; + +&usb_1_ss0_hsphy { + phys =3D <&smb2360_0_eusb2_repeater>; +}; + +&usb_1_ss0_qmpphy_out { + remote-endpoint =3D <&pmic_glink_ss0_ss_in>; +}; + +&usb_1_ss1_dwc3_hs { + remote-endpoint =3D <&pmic_glink_ss1_hs_in>; +}; + +&usb_1_ss1_hsphy { + phys =3D <&smb2360_1_eusb2_repeater>; +}; + +&usb_1_ss1_qmpphy_out { + remote-endpoint =3D <&retimer_ss1_ss_in>; +}; + +&usb_1_ss2_dwc3_hs { + remote-endpoint =3D <&pmic_glink_ss2_hs_in>; +}; + +&usb_1_ss2_hsphy { + phys =3D <&smb2360_2_eusb2_repeater>; +}; + +&usb_1_ss2_qmpphy_out { + remote-endpoint =3D <&retimer_ss2_ss_in>; +}; + +&usb_2_hsphy { + phys =3D <&eusb5_repeater>; + + pinctrl-0 =3D <&wcn_usb_sw_n>; + pinctrl-names =3D "default"; +}; + +&usb_mp_hsphy0 { + phys =3D <&eusb6_repeater>; +}; + +&usb_mp_hsphy1 { + phys =3D <&eusb3_repeater>; +}; --=20 2.34.1