From nobody Sat Oct 4 15:59:01 2025 Received: from mail-ed1-f42.google.com (mail-ed1-f42.google.com [209.85.208.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7D0311C3C08 for ; Thu, 14 Aug 2025 14:31:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755181915; cv=none; b=KKBGTwR8KG/eP/WPi9NWdFz6LW3ipZm8P4BsMXzvMXLAGagr/Qa7LFxGEda66fWhU6pusobr6PZwc8SOGffhZudENtGccgH59ONRdwchU/aI9YnIxk6H/AU+W1zoK0TdPTUW8AvWs2oWovrYc9HFTCTa+7nG9mZj12TjS6AQzyg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755181915; c=relaxed/simple; bh=BZdTeafb2fIS+8xb3EXpKbZfWOteCkbfzVO0j3x+Ptg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=WmZyaxuEbSq4agkNGBvXOZqcNB/bIYT+7WJd2AyTPCeADDLHiR8azIvC4l5mwPf2nbkgn+bYkfNnwbXUz2Bemha7Q4nyh33S7TGVMsocD9LwyWyVRrKjArUP0LG72LJ69P1TR2J9OQUvYLMZXxEsXxjXiJ/C2qEFSDZkDUypqHU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=fairphone.com; spf=pass smtp.mailfrom=fairphone.com; dkim=pass (2048-bit key) header.d=fairphone.com header.i=@fairphone.com header.b=VeX4dCJW; arc=none smtp.client-ip=209.85.208.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=fairphone.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fairphone.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=fairphone.com header.i=@fairphone.com header.b="VeX4dCJW" Received: by mail-ed1-f42.google.com with SMTP id 4fb4d7f45d1cf-6188b6f501cso1255599a12.2 for ; Thu, 14 Aug 2025 07:31:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fairphone.com; s=fair; t=1755181912; x=1755786712; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=JEqX9zvov7BfNQVFU55b1bzbOryL5AKEWqRXjMmfMXU=; b=VeX4dCJWP+vsOvz1BixDVE5+CF8Jsi6tAIJ6EgjoxTzbGJfaH0F4qFReYZcRTRIZkz a4J+1varcbah6+LnMIyKngSJCWNKqjMSjjEqVyJ38vgGN1cXfOxlq5bPoqmjayeJMGjL QbHSF6sTkAIKWr99A1JoQuwWrUlulER//R5NgjJqkAjg7PkJjezHUqgTYPKE0QMIg1pd G7BvEyqDOI9W7iEjGikUZ7/Jn2oV31fept1tu75b89KG0H3HPf/EDIu4a0D4+dOroPUh uaHeHdVXqHEMuZv2Pt1xHruoTt96jhxf5NxVsODv4QmmEz5H/v9mcEVsS87lhgm53vuD xycA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1755181912; x=1755786712; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JEqX9zvov7BfNQVFU55b1bzbOryL5AKEWqRXjMmfMXU=; b=Ni8lKXgr0nQJ/eVdD/AIXy5iq8619gLBw7255nQCnh0gqsMqLaQrD7yTgQNtmIPKwv MEG6i0E9v4Mwx34qnCvzVrPjt4vOZzAp056Au/c51VtpVyxaosNmz4NyXmFJ1OU7MiJf ZfTXlLL0UFjTDyuMQsDu2UeR/4/9YuR4/oD88sFGUvm/8J7ygpNcj9z/5n/sm7hXypZ1 tqJ6G8D0KcfFei0edG2KoKC2JOLmQkay+wITaI0IxGDVmKxvw2o8vCvwxASkpq3712jI kaW5oJB15GhYT3eLt1skfU1ut78kYWL+3mYonI62ut/RBe5sG3ct9ue0b7kMcI7BaRb2 0efQ== X-Forwarded-Encrypted: i=1; AJvYcCU+ngg5wqRTjNDTDKVp042YhqYKIiw6OOrDdvXQ53HFqZx+qGGODi56omdR4YqU7WiI8HRD2UGKu+tNu7A=@vger.kernel.org X-Gm-Message-State: AOJu0Yx0jUz2273tQH0XmL9dqE1DNcVKr1VSpYDjPCsvlX7Lo8JUcN52 xfdX9QLG5JosCDpr+3zEf+N5BoyKh46RGJRXy4GYAipkqd5rMbM5BaVz2xukpPGhFHQ= X-Gm-Gg: ASbGncvPGVluJ6Rb6tbwFCg8eD97ZLC3z9zn+ouf/0BX6ZooEwDxns1kEs4/5Xtrsbg wChqKi8WzhEiBRGXMEhnGFt2gUQj+5p/AufCxBW797GhtI+MZXp/wt8LgQ8kuMZMjFYt9pHa//3 Zk01SUOeitjunprIrA4hAqpMHRFA98YrAcplxlPO1uv2sSQClYOhz+ifEpEiXoDiG+0SbqgsMvX LduExo9wlMOffANAc++JzCV52npWNyxerI3lCT3Q5wzL55y7EvFI6XSTbkcW6JTweoZcCpJXevd 2ixmK0y5aAHlYMqtgCsrtHprg3h5aVbUF/DlUAFNyohGegEz0oxfnwjVlMrf3NqaBE2nBqlve/z g05lfKfuoWXLfOnOClmnk3RaD9A1k746CA0I4clHJw9ayY0GVOk1KNXHKuO4jp9Ub34YmhK5ptW k/3kQi4Ol+OFdrGA== X-Google-Smtp-Source: AGHT+IEscad7XFu9F5AnodmiCH/Hokbb83KhwDiZDACpHGTrIewPrZnEhM8Ko3M6BprKO/NXfmD88w== X-Received: by 2002:a17:906:aac8:b0:afc:c736:8b0d with SMTP id a640c23a62f3a-afcc7368bf6mr152416666b.22.1755181911822; Thu, 14 Aug 2025 07:31:51 -0700 (PDT) Received: from [172.16.220.71] (144-178-202-139.static.ef-service.nl. [144.178.202.139]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-af91a0a313esm2609421066b.32.2025.08.14.07.31.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Aug 2025 07:31:51 -0700 (PDT) From: Griffin Kroah-Hartman Date: Thu, 14 Aug 2025 16:31:35 +0200 Subject: [PATCH v3 1/3] dt-bindings: input: Add Awinic AW86927 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250814-aw86927-v3-1-c99434083e6a@fairphone.com> References: <20250814-aw86927-v3-0-c99434083e6a@fairphone.com> In-Reply-To: <20250814-aw86927-v3-0-c99434083e6a@fairphone.com> To: Dmitry Torokhov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Luca Weiss Cc: linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Griffin Kroah-Hartman , Krzysztof Kozlowski X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755181907; l=1690; i=griffin.kroah@fairphone.com; s=20250804; h=from:subject:message-id; bh=BZdTeafb2fIS+8xb3EXpKbZfWOteCkbfzVO0j3x+Ptg=; b=cUbTJuFur+OPq6hsBbfa8gIQC7YNKpH9hQq8W6bp2waXgGoHR172g8sJez7QnVRXykls0oWHo sMHDPtgLJitB1CrZPpEW11K2xfRSBKfdKe05N8pIEoBA7q6HUxApa+G X-Developer-Key: i=griffin.kroah@fairphone.com; a=ed25519; pk=drSBvqKFiR+xucmLWONHSq/wGrW+YvcVtBXFYnYzn8U= Add bindings for the Awinic AW86927 haptic chip which can be found in smartphones. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Griffin Kroah-Hartman --- .../devicetree/bindings/input/awinic,aw86927.yaml | 48 ++++++++++++++++++= ++++ 1 file changed, 48 insertions(+) diff --git a/Documentation/devicetree/bindings/input/awinic,aw86927.yaml b/= Documentation/devicetree/bindings/input/awinic,aw86927.yaml new file mode 100644 index 000000000000..b7252916bd72 --- /dev/null +++ b/Documentation/devicetree/bindings/input/awinic,aw86927.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/awinic,aw86927.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Awinic AW86927 LRA Haptic IC + +maintainers: + - Griffin Kroah-Hartman + +properties: + compatible: + const: awinic,aw86927 + + reg: + maxItems: 1 + + reset-gpios: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - reset-gpios + - interrupts + +additionalProperties: false + +examples: + - | + #include + #include + + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + vibrator@5a { + compatible =3D "awinic,aw86927"; + reg =3D <0x5a>; + interrupts-extended =3D <&tlmm 101 IRQ_TYPE_EDGE_FALLING>; + reset-gpios =3D <&tlmm 100 GPIO_ACTIVE_LOW>; + }; + }; --=20 2.43.0 From nobody Sat Oct 4 15:59:01 2025 Received: from mail-ej1-f52.google.com (mail-ej1-f52.google.com [209.85.218.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 71FE11C831A for ; Thu, 14 Aug 2025 14:31:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755181917; cv=none; b=RIr89dDpzYB0aJSQdORkXfWlMkxretfMOPNAIHEtaUGyRzA8/eTwn+x+dt1qkmmG7RwNA9mxr4afSjyq6embRd7eqnZRZINwNRS8m8C9jH0tDSXJrzO4JihiQGXb5XnQvRtMZ2mgdZuydUbze6Ir6StVDXs/3no7gJIYa+7em68= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755181917; c=relaxed/simple; bh=EnAoYpLjysJSSUEqTbSvEcYlVgo6r7A3WjGiHgwrJT0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=WCCov/7Jsnwb0D3ELQauMNPHvHqIzFX5cxtwtQKIUWdHpTxQCQKfRgpaEMLT+ZpgApd1c0DY4JILu8Gkcivt+qnaL+fXQFDsj117cTy+0mKic7QTNtgBQQeX1TYBFj6lkaTkQHGn8+e6WW8sGG8fVHhCzFlQNudV1q8pJEKVoXg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=fairphone.com; spf=pass smtp.mailfrom=fairphone.com; dkim=pass (2048-bit key) header.d=fairphone.com header.i=@fairphone.com header.b=tg455y2V; arc=none smtp.client-ip=209.85.218.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=fairphone.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fairphone.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=fairphone.com header.i=@fairphone.com header.b="tg455y2V" Received: by mail-ej1-f52.google.com with SMTP id a640c23a62f3a-afcb7a3b3a9so147129666b.2 for ; Thu, 14 Aug 2025 07:31:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fairphone.com; s=fair; t=1755181913; x=1755786713; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=5xYJbk7CsG1TJHamUXe0wuY9qjcbYdPTRHbXkSzavCU=; b=tg455y2V1cGVs2cbLvpQ45/TsA3ixIKsP+IOTO8C75O00/2RbHu4y5Tn5u+lFreKi4 +251EcstuH1T/LkHXUB67RnV6b9G0BSbzTCGQ0mk7MO/EkNI7lw7XzJMIMFOtAFAiGPy tJTnKE+VoH4LSxGFJQu2P1xc875rAWghwoKXbMsh9fQHNnym2mLz4AtHc7teSPUwRV6s AgbgPQrEXE/ZcQgHz/AgKF31Rz5NHuhY74wgwHf5w3A+aO44WM1JKk8EV7FCtluFfJVk 47kWOgxruTHACoEW8avU+CtzCu5KU+reb0nPG6qgc3RjYKpqIa8kaqWo2lb2LOAgl2ze YzPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1755181913; x=1755786713; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5xYJbk7CsG1TJHamUXe0wuY9qjcbYdPTRHbXkSzavCU=; b=YOVIZMYzTCU36a7g5A6eD132Sak5rXULLp+EQNos4AkHgR0zMWm88IJr4r3HUH4ec1 /yZ5qCUsHv7Ka6BtKxmNXpgs1OTiy7xgX4WeYgPAG6AyhDzNUKb/Y1wZE3vDg+ZtXuKc A7ON3/eTlCMV8zXdOmg/CqO8HCYp4dJ9Xc20mSspLf8m/JcJFHm8LvZYpTJsvkdPtrdX UpZztIkkQ5ep4+6dnY/dHlTBX1mBAVB2H7iGX33FSmjZfR36ADdxShReWqUTkiJJzUs0 WGkt4r/HGbyEoEvUuBI9vBGz7lvCAfvaFrrT10q0CMsWYdwm1slUyYIn/XX56iTltzqg 6h4w== X-Forwarded-Encrypted: i=1; AJvYcCU0InhU2IL0KpNhLbIK/hEffatQLBWSnoRA/JI9ivsovBmTk6jWw8cqg0l2yNtFiBdfhCg8T1Ec3723sdg=@vger.kernel.org X-Gm-Message-State: AOJu0YyHZoHDtO/8EPEWJZxigHl/s9YTWHAFKCZCcaiSRFHavnh5Hadq 6t+HH2ZYctzi84497I/WTK4iCLT7G4KeO8vx8p/ivwqdwZ4DBPCRmTg6S1JIzBlVxLU= X-Gm-Gg: ASbGncsqsh3h82dTOEJZMdY2NfiRxshH+TiVFf/0XnO71JvpvHp2+qUnw1eQzPutnMc CoCbNQr5bboo3R15mp6rVFnH40/6XFouWj/GYLk74xVGPwoWjbIEH8cDecABxwFOcQO6sY9Dkm3 H8b4lyaU41+ihGz0c70HxZOWa71XcpD6u+S16ndfxUi18J6AQfLfkO7gNGnhn8L+8ikowi/dCki qmVmWAfXXNk1z+kBeZsToCUOtftnlzcwg94h+jmMMqHegZK7M9VjUjTH+3Qo5MJn9D5zHJ1TQD0 QQPtluk8zVVS/lzZce6MyN7YkTEhQpz2GZOtcRlpYTDjPThkDtDBuaHQRAdt5zScBsq83PYEREi RYj/jWuPAfA6igL8XJmk+kgjgcJyMq751L85X/BopvHwwcfN+J51kl8mWqeMNIhT3YVxcJPmtCY wsvAyVLMTXFhXXv/zB5qGOWTCo X-Google-Smtp-Source: AGHT+IFJjuoqcpUHRRPJiNP/6OB1AwkKsMSi0H9PYF+64sMNCmsHHvM39H73Z6l46yGGM8B5D1Kxxw== X-Received: by 2002:a17:907:9406:b0:af9:4075:4ea5 with SMTP id a640c23a62f3a-afcb97e05a5mr351463566b.25.1755181912393; Thu, 14 Aug 2025 07:31:52 -0700 (PDT) Received: from [172.16.220.71] (144-178-202-139.static.ef-service.nl. [144.178.202.139]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-af91a0a313esm2609421066b.32.2025.08.14.07.31.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Aug 2025 07:31:52 -0700 (PDT) From: Griffin Kroah-Hartman Date: Thu, 14 Aug 2025 16:31:36 +0200 Subject: [PATCH v3 2/3] Input: aw86927 - add driver for Awinic AW86927 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250814-aw86927-v3-2-c99434083e6a@fairphone.com> References: <20250814-aw86927-v3-0-c99434083e6a@fairphone.com> In-Reply-To: <20250814-aw86927-v3-0-c99434083e6a@fairphone.com> To: Dmitry Torokhov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Luca Weiss Cc: linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Griffin Kroah-Hartman X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755181907; l=27446; i=griffin.kroah@fairphone.com; s=20250804; h=from:subject:message-id; bh=EnAoYpLjysJSSUEqTbSvEcYlVgo6r7A3WjGiHgwrJT0=; b=UU09EiEUhnpsZFh0OCoUfslI7upx/9x3e4iBiktovDFlS/FJaMEKDUT3vG57x+xK7dL7eNbhY 2BGsV2O1FaZDGfD/jjiBxJOuMgWJLkhFpxYfA38ehA3eiltktipuRaD X-Developer-Key: i=griffin.kroah@fairphone.com; a=ed25519; pk=drSBvqKFiR+xucmLWONHSq/wGrW+YvcVtBXFYnYzn8U= Add support for the I2C-connected Awinic AW86927 LRA haptic driver. This driver includes a hardcoded sine waveform to be uploaded to the AW86927's SRAM for haptic playback. This driver does not currently support all the capabilities of the AW86927, such as F0 calibration, RTP mode, and CONT mode. Signed-off-by: Griffin Kroah-Hartman --- drivers/input/misc/Kconfig | 11 + drivers/input/misc/Makefile | 1 + drivers/input/misc/aw86927.c | 854 +++++++++++++++++++++++++++++++++++++++= ++++ 3 files changed, 866 insertions(+) diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig index f5496ca0c0d2..20a5f552d9f4 100644 --- a/drivers/input/misc/Kconfig +++ b/drivers/input/misc/Kconfig @@ -126,6 +126,17 @@ config INPUT_ATMEL_CAPTOUCH To compile this driver as a module, choose M here: the module will be called atmel_captouch. =20 +config INPUT_AW86927 + tristate "Awinic AW86927 Haptic Driver Support" + depends on I2C && INPUT + select INPUT_FF_MEMLESS + select REGMAP_I2C + help + Say Y here if you have an Awinic AW86927 haptic chip. + + To compile this driver as a module, choose M here: the + module will be called aw86927. + config INPUT_BBNSM_PWRKEY tristate "NXP BBNSM Power Key Driver" depends on ARCH_MXC || COMPILE_TEST diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile index 6d91804d0a6f..a311a84d1b70 100644 --- a/drivers/input/misc/Makefile +++ b/drivers/input/misc/Makefile @@ -22,6 +22,7 @@ obj-$(CONFIG_INPUT_ATC260X_ONKEY) +=3D atc260x-onkey.o obj-$(CONFIG_INPUT_ATI_REMOTE2) +=3D ati_remote2.o obj-$(CONFIG_INPUT_ATLAS_BTNS) +=3D atlas_btns.o obj-$(CONFIG_INPUT_ATMEL_CAPTOUCH) +=3D atmel_captouch.o +obj-$(CONFIG_INPUT_AW86927) +=3D aw86927.o obj-$(CONFIG_INPUT_BBNSM_PWRKEY) +=3D nxp-bbnsm-pwrkey.o obj-$(CONFIG_INPUT_BMA150) +=3D bma150.o obj-$(CONFIG_INPUT_CM109) +=3D cm109.o diff --git a/drivers/input/misc/aw86927.c b/drivers/input/misc/aw86927.c new file mode 100644 index 000000000000..bd1913b8fc56 --- /dev/null +++ b/drivers/input/misc/aw86927.c @@ -0,0 +1,854 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2025 Griffin Kroah-Hartman + * + * Partially based on vendor driver: + * Copyright (c) 2021 AWINIC Technology CO., LTD + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define AW86927_RSTCFG_REG 0x00 +#define AW86927_RSTCFG_SOFTRST 0xaa + +#define AW86927_SYSINT_REG 0x02 +#define AW86927_SYSINT_BST_SCPI BIT(7) +#define AW86927_SYSINT_BST_OVPI BIT(6) +#define AW86927_SYSINT_UVLI BIT(5) +#define AW86927_SYSINT_FF_AEI BIT(4) +#define AW86927_SYSINT_FF_AFI BIT(3) +#define AW86927_SYSINT_OCDI BIT(2) +#define AW86927_SYSINT_OTI BIT(1) +#define AW86927_SYSINT_DONEI BIT(0) + +#define AW86927_SYSINTM_REG 0x03 +#define AW86927_SYSINTM_BST_OVPM BIT(6) +#define AW86927_SYSINTM_FF_AEM BIT(4) +#define AW86927_SYSINTM_FF_AFM BIT(3) +#define AW86927_SYSINTM_DONEM BIT(0) + +#define AW86927_PLAYCFG1_REG 0x06 +#define AW86927_PLAYCFG1_BST_MODE_MASK GENMASK(7, 7) +#define AW86927_PLAYCFG1_BST_MODE_BYPASS 0 +#define AW86927_PLAYCFG1_BST_VOUT_VREFSET_MASK GENMASK(6, 0) +#define AW86927_PLAYCFG1_BST_8500MV 0x50 + +#define AW86927_PLAYCFG2_REG 0x07 + +#define AW86927_PLAYCFG3_REG 0x08 +#define AW86927_PLAYCFG3_AUTO_BST_MASK GENMASK(4, 4) +#define AW86927_PLAYCFG3_AUTO_BST_ENABLE 1 +#define AW86927_PLAYCFG3_AUTO_BST_DISABLE 0 +#define AW86927_PLAYCFG3_PLAY_MODE_MASK GENMASK(1, 0) +#define AW86927_PLAYCFG3_PLAY_MODE_RAM 0 + +#define AW86927_PLAYCFG4_REG 0x09 +#define AW86927_PLAYCFG4_STOP BIT(1) +#define AW86927_PLAYCFG4_GO BIT(0) + +#define AW86927_WAVCFG1_REG 0x0a +#define AW86927_WAVCFG1_WAVSEQ1_MASK GENMASK(6, 0) + +#define AW86927_WAVCFG2_REG 0x0b +#define AW86927_WAVCFG2_WAVSEQ2_MASK GENMASK(6, 0) + +#define AW86927_WAVCFG9_REG 0x12 +#define AW86927_WAVCFG9_SEQ1LOOP_MASK GENMASK(7, 4) +#define AW86927_WAVCFG9_SEQ1LOOP_INFINITELY 0x0f + +#define AW86927_CONTCFG1_REG 0x18 +#define AW86927_CONTCFG1_BRK_BST_MD_MASK GENMASK(6, 6) + +#define AW86927_CONTCFG5_REG 0x1c +#define AW86927_CONTCFG5_BST_BRK_GAIN_MASK GENMASK(7, 4) +#define AW86927_CONTCFG5_BRK_GAIN_MASK GENMASK(3, 0) + +#define AW86927_CONTCFG10_REG 0x21 +#define AW86927_CONTCFG10_BRK_TIME_MASK GENMASK(7, 0) +#define AW86927_CONTCFG10_BRK_TIME_DEFAULT 8 + +#define AW86927_CONTCFG13_REG 0x24 +#define AW86927_CONTCFG13_TSET_MASK GENMASK(7, 4) +#define AW86927_CONTCFG13_BEME_SET_MASK GENMASK(3, 0) + +#define AW86927_BASEADDRH_REG 0x2d +#define AW86927_BASEADDRL_REG 0x2e + +#define AW86927_GLBRD5_REG 0x3f +#define AW86927_GLBRD5_STATE_MASK GENMASK(3, 0) +#define AW86927_GLBRD5_STATE_STANDBY 0 + +#define AW86927_RAMADDRH_REG 0x40 + +#define AW86927_RAMADDRL_REG 0x41 + +#define AW86927_RAMDATA_REG 0x42 + +#define AW86927_SYSCTRL3_REG 0x45 +#define AW86927_SYSCTRL3_STANDBY_MASK GENMASK(5, 5) +#define AW86927_SYSCTRL3_STANDBY_ON 1 +#define AW86927_SYSCTRL3_STANDBY_OFF 0 +#define AW86927_SYSCTRL3_EN_RAMINIT_MASK GENMASK(2, 2) +#define AW86927_SYSCTRL3_EN_RAMINIT_ON 1 +#define AW86927_SYSCTRL3_EN_RAMINIT_OFF 0 + +#define AW86927_SYSCTRL4_REG 0x46 +#define AW86927_SYSCTRL4_WAVDAT_MODE_MASK GENMASK(6, 5) +#define AW86927_SYSCTRL4_WAVDAT_24K 0 +#define AW86927_SYSCTRL4_INT_EDGE_MODE_MASK GENMASK(4, 4) +#define AW86927_SYSCTRL4_INT_EDGE_MODE_POS 0 +#define AW86927_SYSCTRL4_INT_MODE_MASK GENMASK(3, 3) +#define AW86927_SYSCTRL4_INT_MODE_EDGE 1 +#define AW86927_SYSCTRL4_GAIN_BYPASS_MASK GENMASK(0, 0) + +#define AW86927_PWMCFG1_REG 0x48 +#define AW86927_PWMCFG1_PRC_EN_MASK GENMASK(7, 7) +#define AW86927_PWMCFG1_PRC_DISABLE 0 + +#define AW86927_PWMCFG3_REG 0x4a +#define AW86927_PWMCFG3_PR_EN_MASK GENMASK(7, 7) +#define AW86927_PWMCFG3_PRCTIME_MASK GENMASK(6, 0) + +#define AW86927_PWMCFG4_REG 0x4b +#define AW86927_PWMCFG4_PRTIME_MASK GENMASK(7, 0) + +#define AW86927_VBATCTRL_REG 0x4c +#define AW86927_VBATCTRL_VBAT_MODE_MASK GENMASK(6, 6) +#define AW86927_VBATCTRL_VBAT_MODE_SW 0 + +#define AW86927_DETCFG1_REG 0x4d +#define AW86927_DETCFG1_DET_GO_MASK GENMASK(1, 0) +#define AW86927_DETCFG1_DET_GO_DET_SEQ0 1 +#define AW86927_DETCFG1_DET_GO_NA 0 + +#define AW86927_DETCFG2_REG 0x4e +#define AW86927_DETCFG2_DET_SEQ0_MASK GENMASK(6, 3) +#define AW86927_DETCFG2_DET_SEQ0_VBAT 0 +#define AW86927_DETCFG2_D2S_GAIN_MASK GENMASK(2, 0) +#define AW86927_DETCFG2_D2S_GAIN_10 4 + +#define AW86927_CHIPIDH_REG 0x57 +#define AW86927_CHIPIDL_REG 0x58 +#define AW86927_CHIPID 0x9270 + +#define AW86927_TMCFG_REG 0x5b +#define AW86927_TMCFG_UNLOCK 0x7d +#define AW86927_TMCFG_LOCK 0x00 + +#define AW86927_ANACFG11_REG 0x70 + +#define AW86927_ANACFG12_REG 0x71 +#define AW86927_ANACFG12_BST_SKIP_MASK GENMASK(7, 7) +#define AW86927_ANACFG12_BST_SKIP_SHUTDOWN 1 + +#define AW86927_ANACFG13_REG 0x72 +#define AW86927_ANACFG13_BST_PC_MASK GENMASK(7, 4) +#define AW86927_ANACFG13_BST_PEAKCUR_3P45A 6 + +#define AW86927_ANACFG15_REG 0x74 +#define AW86927_ANACFG15_BST_PEAK_MODE_MASK GENMASK(7, 7) +#define AW86927_ANACFG15_BST_PEAK_BACK 1 + +#define AW86927_ANACFG16_REG 0x75 +#define AW86927_ANACFG16_BST_SRC_MASK GENMASK(4, 4) +#define AW86927_ANACFG16_BST_SRC_3NS 0 + +/* default value of base addr */ +#define AW86927_RAM_BASE_ADDR 0x800 +#define AW86927_BASEADDRH_VAL 0x08 +#define AW86927_BASEADDRL_VAL 0x00 + +enum aw86927_work_mode { + AW86927_STANDBY_MODE, + AW86927_RAM_MODE, +}; + +struct aw86927_data { + struct work_struct play_work; + struct device *dev; + struct input_dev *input_dev; + struct i2c_client *client; + struct regmap *regmap; + struct gpio_desc *reset_gpio; + bool running; +}; + +static const struct regmap_config aw86927_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 8, + .cache_type =3D REGCACHE_NONE, + .max_register =3D 0x80, +}; + +/* + * Sine wave representing the magnitude of the drive to be used. + * Data is encoded in two's complement. + * round(84 * sin(x / 16.25)) + */ +static const uint8_t aw86927_waveform[] =3D { + 0x00, 0x05, 0x0a, 0x0f, 0x14, 0x1a, 0x1f, 0x23, 0x28, 0x2d, 0x31, 0x35, + 0x39, 0x3d, 0x41, 0x44, 0x47, 0x4a, 0x4c, 0x4f, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x55, 0x55, 0x55, 0x55, 0x54, 0x52, 0x51, 0x4f, 0x4d, 0x4a, 0x47, + 0x44, 0x41, 0x3d, 0x3a, 0x36, 0x31, 0x2d, 0x28, 0x24, 0x1f, 0x1a, 0x15, + 0x10, 0x0a, 0x05, 0x00, 0xfc, 0xf6, 0xf1, 0xec, 0xe7, 0xe2, 0xdd, 0xd8, + 0xd4, 0xcf, 0xcb, 0xc7, 0xc3, 0xbf, 0xbc, 0xb9, 0xb6, 0xb4, 0xb1, 0xb0, + 0xae, 0xad, 0xac, 0xab, 0xab, 0xab, 0xab, 0xab, 0xac, 0xae, 0xaf, 0xb1, + 0xb3, 0xb6, 0xb8, 0xbc, 0xbf, 0xc2, 0xc6, 0xca, 0xce, 0xd3, 0xd7, 0xdc, + 0xe1, 0xe6, 0xeb, 0xf0, 0xf5, 0xfb +}; + +struct aw86927_sram_waveform_header { + uint8_t version; + __be16 start_address; + __be16 end_address; +} __packed; + +static const struct aw86927_sram_waveform_header sram_waveform_header =3D { + .version =3D 0x01, + .start_address =3D cpu_to_be16(AW86927_RAM_BASE_ADDR + + sizeof(struct aw86927_sram_waveform_header)), + .end_address =3D cpu_to_be16(AW86927_RAM_BASE_ADDR + + sizeof(struct aw86927_sram_waveform_header) + + ARRAY_SIZE(aw86927_waveform) - 1), +}; + +static int aw86927_wait_enter_standby(struct aw86927_data *haptics) +{ + unsigned int reg_val; + int err; + + err =3D regmap_read_poll_timeout(haptics->regmap, + AW86927_GLBRD5_REG, reg_val, + (FIELD_GET(AW86927_GLBRD5_STATE_MASK, reg_val) =3D=3D AW86927_GLBRD5_ST= ATE_STANDBY), + 2500, 2500 * 100); + + if (err) { + dev_err(haptics->dev, "did not enter standby: %d\n", err); + return err; + } + return 0; +} + +static int aw86927_play_mode(struct aw86927_data *haptics, uint8_t play_mo= de) +{ + int err; + + switch (play_mode) { + case AW86927_STANDBY_MODE: + /* Briefly toggle standby, then toggle back to standby off */ + err =3D regmap_update_bits(haptics->regmap, + AW86927_SYSCTRL3_REG, + AW86927_SYSCTRL3_STANDBY_MASK, + FIELD_PREP(AW86927_SYSCTRL3_STANDBY_MASK, + AW86927_SYSCTRL3_STANDBY_ON)); + if (err) + return err; + + err =3D regmap_update_bits(haptics->regmap, + AW86927_SYSCTRL3_REG, + AW86927_SYSCTRL3_STANDBY_MASK, + FIELD_PREP(AW86927_SYSCTRL3_STANDBY_MASK, + AW86927_SYSCTRL3_STANDBY_OFF)); + if (err) + return err; + break; + case AW86927_RAM_MODE: + err =3D regmap_update_bits(haptics->regmap, + AW86927_PLAYCFG3_REG, + AW86927_PLAYCFG3_PLAY_MODE_MASK, + FIELD_PREP(AW86927_PLAYCFG3_PLAY_MODE_MASK, + AW86927_PLAYCFG3_PLAY_MODE_RAM)); + if (err) + return err; + + err =3D regmap_update_bits(haptics->regmap, + AW86927_PLAYCFG1_REG, + AW86927_PLAYCFG1_BST_MODE_MASK, + FIELD_PREP(AW86927_PLAYCFG1_BST_MODE_MASK, + AW86927_PLAYCFG1_BST_MODE_BYPASS)); + if (err) + return err; + + err =3D regmap_update_bits(haptics->regmap, + AW86927_VBATCTRL_REG, + AW86927_VBATCTRL_VBAT_MODE_MASK, + FIELD_PREP(AW86927_VBATCTRL_VBAT_MODE_MASK, + AW86927_VBATCTRL_VBAT_MODE_SW)); + if (err) + return err; + break; + } + return 0; +} + +static int aw86927_stop(struct aw86927_data *haptics) +{ + int err; + + err =3D regmap_write(haptics->regmap, AW86927_PLAYCFG4_REG, AW86927_PLAYC= FG4_STOP); + if (err) { + dev_err(haptics->dev, "Failed to stop playback: %d\n", err); + return err; + } + + err =3D aw86927_wait_enter_standby(haptics); + if (err) { + dev_err(haptics->dev, "Failed to enter standby, trying to force it\n"); + err =3D aw86927_play_mode(haptics, AW86927_STANDBY_MODE); + if (err) + return err; + } + return 0; +} + +static int aw86927_haptics_play(struct input_dev *dev, void *data, struct = ff_effect *effect) +{ + struct aw86927_data *haptics =3D input_get_drvdata(dev); + int level; + + level =3D effect->u.rumble.strong_magnitude; + if (!level) + level =3D effect->u.rumble.weak_magnitude; + + /* If already running, don't restart playback */ + if (haptics->running && level) + return 0; + + haptics->running =3D level; + schedule_work(&haptics->play_work); + + return 0; +} + +static int aw86927_play_sine(struct aw86927_data *haptics) +{ + int err; + + err =3D aw86927_stop(haptics); + if (err) + return err; + + err =3D aw86927_play_mode(haptics, AW86927_RAM_MODE); + if (err) + return err; + + err =3D regmap_update_bits(haptics->regmap, AW86927_PLAYCFG3_REG, + AW86927_PLAYCFG3_AUTO_BST_MASK, + FIELD_PREP(AW86927_PLAYCFG3_AUTO_BST_MASK, + AW86927_PLAYCFG3_AUTO_BST_ENABLE)); + if (err) + return err; + + /* Set waveseq 1 to the first wave */ + err =3D regmap_update_bits(haptics->regmap, AW86927_WAVCFG1_REG, + AW86927_WAVCFG1_WAVSEQ1_MASK, + FIELD_PREP(AW86927_WAVCFG1_WAVSEQ1_MASK, + 1)); + if (err) + return err; + + /* set wavseq 2 to zero */ + err =3D regmap_update_bits(haptics->regmap, AW86927_WAVCFG2_REG, + AW86927_WAVCFG2_WAVSEQ2_MASK, + FIELD_PREP(AW86927_WAVCFG2_WAVSEQ2_MASK, + 0)); + if (err) + return err; + + err =3D regmap_update_bits(haptics->regmap, + AW86927_WAVCFG9_REG, + AW86927_WAVCFG9_SEQ1LOOP_MASK, + FIELD_PREP(AW86927_WAVCFG9_SEQ1LOOP_MASK, + AW86927_WAVCFG9_SEQ1LOOP_INFINITELY)); + if (err) + return err; + + /* set gain to value lower than 0x80 to avoid distorted playback */ + err =3D regmap_write(haptics->regmap, AW86927_PLAYCFG2_REG, 0x7c); + if (err) + return err; + + /* Start playback */ + err =3D regmap_write(haptics->regmap, AW86927_PLAYCFG4_REG, AW86927_PLAYC= FG4_GO); + if (err) + return err; + + return 0; +} + +static void aw86927_close(struct input_dev *input) +{ + struct aw86927_data *haptics =3D input_get_drvdata(input); + struct device *dev =3D &haptics->client->dev; + int err; + + cancel_work_sync(&haptics->play_work); + + err =3D aw86927_stop(haptics); + if (err) + dev_err(dev, "Failed to close the Driver: %d\n", err); +} + +static void aw86927_haptics_play_work(struct work_struct *work) +{ + struct aw86927_data *haptics =3D + container_of(work, struct aw86927_data, play_work); + struct device *dev =3D &haptics->client->dev; + int err; + + if (haptics->running) + err =3D aw86927_play_sine(haptics); + else + err =3D aw86927_stop(haptics); + + if (err) + dev_err(dev, "Failed to execute work command: %d\n", err); +} + +static void aw86927_hw_reset(struct aw86927_data *haptics) +{ + /* Assert reset */ + gpiod_set_value_cansleep(haptics->reset_gpio, 1); + /* Wait ~1ms */ + usleep_range(1000, 2000); + /* Deassert reset */ + gpiod_set_value_cansleep(haptics->reset_gpio, 0); + /* Wait ~8ms until I2C is accessible */ + usleep_range(8000, 8500); +} + +static int aw86927_haptic_init(struct aw86927_data *haptics) +{ + int err; + + err =3D regmap_update_bits(haptics->regmap, + AW86927_SYSCTRL4_REG, + AW86927_SYSCTRL4_WAVDAT_MODE_MASK, + FIELD_PREP(AW86927_SYSCTRL4_WAVDAT_MODE_MASK, + AW86927_SYSCTRL4_WAVDAT_24K)); + if (err) + return err; + + /* enable gain bypass */ + err =3D regmap_update_bits(haptics->regmap, + AW86927_SYSCTRL4_REG, + AW86927_SYSCTRL4_GAIN_BYPASS_MASK, + FIELD_PREP(AW86927_SYSCTRL4_GAIN_BYPASS_MASK, + 0x01)); + if (err) + return err; + + err =3D regmap_write(haptics->regmap, + AW86927_TMCFG_REG, + AW86927_TMCFG_UNLOCK); + if (err) + return err; + + err =3D regmap_write(haptics->regmap, + AW86927_ANACFG11_REG, + 0x0f); + if (err) + return err; + + err =3D regmap_update_bits(haptics->regmap, + AW86927_ANACFG12_REG, + AW86927_ANACFG12_BST_SKIP_MASK, + FIELD_PREP(AW86927_ANACFG12_BST_SKIP_MASK, + AW86927_ANACFG12_BST_SKIP_SHUTDOWN)); + if (err) + return err; + + err =3D regmap_update_bits(haptics->regmap, + AW86927_ANACFG15_REG, + AW86927_ANACFG15_BST_PEAK_MODE_MASK, + FIELD_PREP(AW86927_ANACFG15_BST_PEAK_MODE_MASK, + AW86927_ANACFG15_BST_PEAK_BACK)); + if (err) + return err; + + err =3D regmap_update_bits(haptics->regmap, + AW86927_ANACFG16_REG, + AW86927_ANACFG16_BST_SRC_MASK, + FIELD_PREP(AW86927_ANACFG16_BST_SRC_MASK, + AW86927_ANACFG16_BST_SRC_3NS)); + if (err) + return err; + + err =3D regmap_write(haptics->regmap, + AW86927_TMCFG_REG, + AW86927_TMCFG_LOCK); + if (err) + return err; + + err =3D regmap_update_bits(haptics->regmap, + AW86927_CONTCFG1_REG, + AW86927_CONTCFG1_BRK_BST_MD_MASK, + FIELD_PREP(AW86927_CONTCFG1_BRK_BST_MD_MASK, + 0x00)); + if (err) + return err; + + err =3D regmap_write(haptics->regmap, + AW86927_CONTCFG5_REG, + FIELD_PREP(AW86927_CONTCFG5_BST_BRK_GAIN_MASK, 0x05) | + FIELD_PREP(AW86927_CONTCFG5_BRK_GAIN_MASK, 0x08)); + if (err) + return err; + + err =3D regmap_update_bits(haptics->regmap, AW86927_CONTCFG10_REG, + AW86927_CONTCFG10_BRK_TIME_MASK, + FIELD_PREP(AW86927_CONTCFG10_BRK_TIME_MASK, + AW86927_CONTCFG10_BRK_TIME_DEFAULT)); + if (err) + return err; + + err =3D regmap_write(haptics->regmap, + AW86927_CONTCFG13_REG, + FIELD_PREP(AW86927_CONTCFG13_TSET_MASK, 0x06) | + FIELD_PREP(AW86927_CONTCFG13_BEME_SET_MASK, 0x02)); + if (err) + return err; + + err =3D regmap_update_bits(haptics->regmap, + AW86927_DETCFG2_REG, + AW86927_DETCFG2_D2S_GAIN_MASK, + FIELD_PREP(AW86927_DETCFG2_D2S_GAIN_MASK, + AW86927_DETCFG2_D2S_GAIN_10)); + if (err) + return err; + + err =3D regmap_update_bits(haptics->regmap, + AW86927_PWMCFG1_REG, + AW86927_PWMCFG1_PRC_EN_MASK, + FIELD_PREP(AW86927_PWMCFG1_PRC_EN_MASK, + AW86927_PWMCFG1_PRC_DISABLE)); + if (err) + return err; + + err =3D regmap_write(haptics->regmap, + AW86927_PWMCFG3_REG, + FIELD_PREP(AW86927_PWMCFG3_PR_EN_MASK, 0x01) | + FIELD_PREP(AW86927_PWMCFG3_PRCTIME_MASK, 0x3f)); + if (err) + return err; + + err =3D regmap_update_bits(haptics->regmap, + AW86927_PWMCFG4_REG, + AW86927_PWMCFG4_PRTIME_MASK, + FIELD_PREP(AW86927_PWMCFG4_PRTIME_MASK, + 0x32)); + if (err) + return err; + + err =3D regmap_write(haptics->regmap, + AW86927_TMCFG_REG, + AW86927_TMCFG_UNLOCK); + if (err) + return err; + + err =3D regmap_update_bits(haptics->regmap, + AW86927_ANACFG13_REG, + AW86927_ANACFG13_BST_PC_MASK, + FIELD_PREP(AW86927_ANACFG13_BST_PC_MASK, + AW86927_ANACFG13_BST_PEAKCUR_3P45A)); + if (err) + return err; + + err =3D regmap_write(haptics->regmap, + AW86927_TMCFG_REG, + AW86927_TMCFG_LOCK); + if (err) + return err; + + err =3D regmap_update_bits(haptics->regmap, + AW86927_PLAYCFG1_REG, + AW86927_PLAYCFG1_BST_VOUT_VREFSET_MASK, + FIELD_PREP(AW86927_PLAYCFG1_BST_VOUT_VREFSET_MASK, + AW86927_PLAYCFG1_BST_8500MV)); + if (err) + return err; + + err =3D regmap_update_bits(haptics->regmap, + AW86927_PLAYCFG3_REG, + AW86927_PLAYCFG3_AUTO_BST_MASK, + FIELD_PREP(AW86927_PLAYCFG3_AUTO_BST_MASK, + AW86927_PLAYCFG3_AUTO_BST_DISABLE)); + if (err) + return err; + + return 0; +} + +static int aw86927_ram_init(struct aw86927_data *haptics) +{ + int err; + + err =3D aw86927_wait_enter_standby(haptics); + if (err) + return err; + + /* Enable SRAM init */ + err =3D regmap_update_bits(haptics->regmap, + AW86927_SYSCTRL3_REG, + AW86927_SYSCTRL3_EN_RAMINIT_MASK, + FIELD_PREP(AW86927_SYSCTRL3_EN_RAMINIT_MASK, + AW86927_SYSCTRL3_EN_RAMINIT_ON)); + + /* Set base address for the start of the SRAM waveforms */ + err =3D regmap_write(haptics->regmap, + AW86927_BASEADDRH_REG, + AW86927_BASEADDRH_VAL); + if (err) + return err; + + err =3D regmap_write(haptics->regmap, + AW86927_BASEADDRL_REG, + AW86927_BASEADDRL_VAL); + if (err) + return err; + + /* Set start of SRAM, before the data is written it will be the same as t= he base */ + err =3D regmap_write(haptics->regmap, + AW86927_RAMADDRH_REG, + AW86927_BASEADDRH_VAL); + if (err) + return err; + + err =3D regmap_write(haptics->regmap, + AW86927_RAMADDRL_REG, + AW86927_BASEADDRL_VAL); + if (err) + return err; + + /* Write waveform header to SRAM */ + err =3D regmap_noinc_write(haptics->regmap, AW86927_RAMDATA_REG, + &sram_waveform_header, sizeof(sram_waveform_header)); + if (err) + return err; + + /* Write waveform to SRAM */ + err =3D regmap_noinc_write(haptics->regmap, AW86927_RAMDATA_REG, + aw86927_waveform, ARRAY_SIZE(aw86927_waveform)); + if (err) + return err; + + err =3D regmap_update_bits(haptics->regmap, + AW86927_DETCFG2_REG, + AW86927_DETCFG2_DET_SEQ0_MASK, + FIELD_PREP(AW86927_DETCFG2_DET_SEQ0_MASK, + AW86927_DETCFG2_DET_SEQ0_VBAT)); + if (err) + return err; + + err =3D regmap_update_bits(haptics->regmap, + AW86927_DETCFG1_REG, + AW86927_DETCFG1_DET_GO_MASK, + FIELD_PREP(AW86927_DETCFG1_DET_GO_MASK, + AW86927_DETCFG1_DET_GO_DET_SEQ0)); + if (err) + return err; + + usleep_range(3000, 3500); + + err =3D regmap_update_bits(haptics->regmap, + AW86927_DETCFG1_REG, + AW86927_DETCFG1_DET_GO_MASK, + FIELD_PREP(AW86927_DETCFG1_DET_GO_MASK, + AW86927_DETCFG1_DET_GO_NA)); + if (err) + return err; + + /* Disable SRAM init */ + err =3D regmap_update_bits(haptics->regmap, + AW86927_SYSCTRL3_REG, + AW86927_SYSCTRL3_EN_RAMINIT_MASK, + FIELD_PREP(AW86927_SYSCTRL3_EN_RAMINIT_MASK, + AW86927_SYSCTRL3_EN_RAMINIT_OFF)); + if (err) + return err; + + return 0; +} + +static irqreturn_t aw86927_irq(int irq, void *data) +{ + struct aw86927_data *haptics =3D data; + struct device *dev =3D &haptics->client->dev; + unsigned int reg_val; + int err; + + err =3D regmap_read(haptics->regmap, AW86927_SYSINT_REG, ®_val); + if (err) { + dev_err(dev, "Failed to read SYSINT register: %d\n", err); + return IRQ_NONE; + } + + if (reg_val & AW86927_SYSINT_BST_SCPI) + dev_err(dev, "Received a Short Circuit Protection interrupt\n"); + if (reg_val & AW86927_SYSINT_BST_OVPI) + dev_err(dev, "Received an Over Voltage Protection interrupt\n"); + if (reg_val & AW86927_SYSINT_UVLI) + dev_err(dev, "Received an Under Voltage Lock Out interrupt\n"); + if (reg_val & AW86927_SYSINT_OCDI) + dev_err(dev, "Received an Over Current interrupt\n"); + if (reg_val & AW86927_SYSINT_OTI) + dev_err(dev, "Received an Over Temperature interrupt\n"); + + if (reg_val & AW86927_SYSINT_DONEI) + dev_dbg(dev, "Chip playback done!\n"); + if (reg_val & AW86927_SYSINT_FF_AFI) + dev_dbg(dev, "The RTP mode FIFO is almost full!\n"); + if (reg_val & AW86927_SYSINT_FF_AEI) + dev_dbg(dev, "The RTP mode FIFO is almost empty!\n"); + + return IRQ_HANDLED; +} + +static int aw86927_detect(struct aw86927_data *haptics) +{ + __be16 read_buf; + u16 chip_id; + int err; + + err =3D regmap_bulk_read(haptics->regmap, AW86927_CHIPIDH_REG, &read_buf,= 2); + if (err) + return dev_err_probe(haptics->dev, err, "Failed to read CHIPID registers= \n"); + + chip_id =3D be16_to_cpu(read_buf); + + if (chip_id !=3D AW86927_CHIPID) { + dev_err(haptics->dev, "Unexpected CHIPID value 0x%x\n", chip_id); + return -ENODEV; + } + + return 0; +} + +static int aw86927_probe(struct i2c_client *client) +{ + struct aw86927_data *haptics; + int err; + + haptics =3D devm_kzalloc(&client->dev, sizeof(struct aw86927_data), GFP_K= ERNEL); + if (!haptics) + return -ENOMEM; + + haptics->dev =3D &client->dev; + haptics->client =3D client; + + i2c_set_clientdata(client, haptics); + + haptics->regmap =3D devm_regmap_init_i2c(client, &aw86927_regmap_config); + if (IS_ERR(haptics->regmap)) + return dev_err_probe(haptics->dev, PTR_ERR(haptics->regmap), + "Failed to allocate register map\n"); + + haptics->input_dev =3D devm_input_allocate_device(haptics->dev); + if (!haptics->input_dev) + return -ENOMEM; + + haptics->reset_gpio =3D devm_gpiod_get(haptics->dev, "reset", GPIOD_OUT_H= IGH); + if (IS_ERR(haptics->reset_gpio)) + return dev_err_probe(haptics->dev, PTR_ERR(haptics->reset_gpio), + "Failed to get reset gpio\n"); + + /* Hardware reset */ + aw86927_hw_reset(haptics); + + /* Software reset */ + err =3D regmap_write(haptics->regmap, AW86927_RSTCFG_REG, AW86927_RSTCFG_= SOFTRST); + if (err) + return dev_err_probe(haptics->dev, PTR_ERR(haptics->regmap), + "Failed Software reset\n"); + + /* Wait ~3ms until I2C is accessible */ + usleep_range(3000, 3500); + + err =3D aw86927_detect(haptics); + if (err) + return dev_err_probe(haptics->dev, err, "Failed to find chip\n"); + + /* IRQ config */ + err =3D regmap_write(haptics->regmap, AW86927_SYSCTRL4_REG, + FIELD_PREP(AW86927_SYSCTRL4_INT_MODE_MASK, + AW86927_SYSCTRL4_INT_MODE_EDGE) | + FIELD_PREP(AW86927_SYSCTRL4_INT_EDGE_MODE_MASK, + AW86927_SYSCTRL4_INT_EDGE_MODE_POS)); + if (err) + return dev_err_probe(haptics->dev, err, "Failed to configure interrupt m= odes\n"); + + err =3D regmap_write(haptics->regmap, AW86927_SYSINTM_REG, + AW86927_SYSINTM_BST_OVPM | + AW86927_SYSINTM_FF_AEM | + AW86927_SYSINTM_FF_AFM | + AW86927_SYSINTM_DONEM); + if (err) + return dev_err_probe(haptics->dev, err, "Failed to configure interrupt m= asks\n"); + + err =3D devm_request_threaded_irq(haptics->dev, client->irq, NULL, + aw86927_irq, IRQF_ONESHOT, NULL, haptics); + if (err) + return dev_err_probe(haptics->dev, err, "Failed to request threaded irq\= n"); + + INIT_WORK(&haptics->play_work, aw86927_haptics_play_work); + + haptics->input_dev->name =3D "aw86927-haptics"; + haptics->input_dev->close =3D aw86927_close; + + input_set_drvdata(haptics->input_dev, haptics); + input_set_capability(haptics->input_dev, EV_FF, FF_RUMBLE); + + err =3D input_ff_create_memless(haptics->input_dev, NULL, + aw86927_haptics_play); + if (err) + return dev_err_probe(haptics->dev, err, "Failed to create FF dev\n"); + + /* Set up registers */ + err =3D aw86927_play_mode(haptics, AW86927_STANDBY_MODE); + if (err) + return dev_err_probe(haptics->dev, err, "Failed to enter standby for Hap= tic init\n"); + + err =3D aw86927_haptic_init(haptics); + if (err) + return dev_err_probe(haptics->dev, err, "Haptic init failed\n"); + + /* RAM init, upload the waveform for playback */ + err =3D aw86927_ram_init(haptics); + if (err) + return dev_err_probe(haptics->dev, err, "Failed to init aw86927 sram\n"); + + err =3D input_register_device(haptics->input_dev); + if (err) + return dev_err_probe(haptics->dev, err, "Failed to register input device= \n"); + + return 0; +} + +static const struct of_device_id aw86927_of_id[] =3D { + { .compatible =3D "awinic,aw86927" }, + { /* sentinel */ } +}; + +MODULE_DEVICE_TABLE(of, aw86927_of_id); + +static struct i2c_driver aw86927_driver =3D { + .driver =3D { + .name =3D "aw86927-haptics", + .of_match_table =3D aw86927_of_id, + }, + .probe =3D aw86927_probe, +}; + +module_i2c_driver(aw86927_driver); + +MODULE_AUTHOR("Griffin Kroah-Hartman "); +MODULE_DESCRIPTION("AWINIC AW86927 LRA Haptic Driver"); +MODULE_LICENSE("GPL"); --=20 2.43.0 From nobody Sat Oct 4 15:59:01 2025 Received: from mail-ej1-f52.google.com (mail-ej1-f52.google.com [209.85.218.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 320601D63F3 for ; Thu, 14 Aug 2025 14:31:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755181917; cv=none; b=danJp6s64isMNZ7n1wDVEJnf/SMB877OUK4/PBKHls0A3OMoBMbIrRbtHJbs33q3nEfmkjAbV75LDnqpxF53A+6wRs+E9VWOb1iGpzMaRa0JGRd7gF2XtY403BDsPRj99fOHmgGDrGQ76njvH6RMdXnIHUgU4HuCxhlbgI6QdxY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755181917; c=relaxed/simple; bh=DhSXH5X/MnMSzKpEZ4Sb383iahpmcRMY2QF61lP6iQY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=jJIjslPUai5g18OyqhORU+LV80/haM5/GgxFC07J7kfJkyOqwMITrYu7LIiJ26Cc7vfgklsHgjHvlKHt/yjsb0KBM5Nj1Kbj7wnOtIbalKl9HRgkHI/E8ZYP7AZXahHE9d+Fso29YDqSxF9tiX5P8lXqDCUOqe+E5Rs9iZEBQ/Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=fairphone.com; spf=pass smtp.mailfrom=fairphone.com; dkim=pass (2048-bit key) header.d=fairphone.com header.i=@fairphone.com header.b=i4EX0dqD; arc=none smtp.client-ip=209.85.218.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=fairphone.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fairphone.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=fairphone.com header.i=@fairphone.com header.b="i4EX0dqD" Received: by mail-ej1-f52.google.com with SMTP id a640c23a62f3a-afcb7aea37cso130292766b.3 for ; Thu, 14 Aug 2025 07:31:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fairphone.com; s=fair; t=1755181913; x=1755786713; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=hMvQYBfsoacMumg+rF9fJxblVybPFTp+y3sBY09KX/4=; b=i4EX0dqDMx6D3GL3u0fymmiQ2gtuD/7PB/i7aL8LXjhAgQ0JBiBnTEaGxVcYILnwy1 fzn5gsMgXHbuWREZZ3x6QbD9vtGdGKSwsnBEWRjjVcn/hNwV9YpCPUpsGtV2x3aOqWEf Ce2E9k8EBbFalrzW/1mZs1bJkKqGsaEAIZPRe+hCiX5L7AV+hEq0Vr6QN/Thc5fj6/Tr 4CTOrgRtupR8vdMVLdGtmENvuq03/pXYrV48P/gNgUH1PrG/qmztt2G7pVigaMFFGvYA xUoycP258w4v5Hc/3wjccp8hNExC4kslsloj9FBVD5G3biL1ULXngL0AyTJIT3boj0vO +SnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1755181913; x=1755786713; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hMvQYBfsoacMumg+rF9fJxblVybPFTp+y3sBY09KX/4=; b=PIT8Idrn1hBGtQonykp7YFPyp1+N5tr366uyWvPHY2wtjFK1AtIabFAXXYsNQHsR// NzjjGRQHJF+80dYj6ACTgRWd9hqCYPrgn0qyZKJUb4erDqxXysCs60SPeza24MGqwct3 J/kcfjEgMYJtUeia28oTdAyZox8nLnKW8F9pL9fcEtDZG76tuMfA7AFX82vHm0jZHeop 0g8HrsoMvkSPNLCqA7g6y5uAMdRTSpMf/6luLBiXxIdfjEwyR2TJUcdMpUNb5ecFUECx E9KibWdJt9WV6+DgWjMOq8o/CH7mC0CfnrVDIRSnCYmHbGnAkvkY8uRfm5LbvKPXrDdZ DzhQ== X-Forwarded-Encrypted: i=1; AJvYcCX4Pc6jEbju/fmnnWDktjzTW7jPl0T11yz+kHvvEVKsFnoBd8CkkQuoG7aRdtvhM7ghujm35xdt5GV5c2c=@vger.kernel.org X-Gm-Message-State: AOJu0YzWclBEhHZ6IHjlrW2moSo+xY38v7z8zXaiGq2PLd3jGVW98WG8 IEwPai26l9vD8QOaWwXFNFkAjOtM1RJtrJIkt/As7vM3i5zYfNoijJWv32IyK4LhIfk= X-Gm-Gg: ASbGncstlUR1ELwZgZQ9k2JV9Vnl1+lUNJm+dA+xsWTjD7T9daGi4tWqshVYE7tzFbK 1zIwrlYAYzb32KFQ+qL/8Uc/TZGhKm7k6MHcnPRxkl6gxL5xlaiFGdcHJbZrTSVkP5eeKVw26QQ tNKS00eZYxckPvsoRVHrPYCaM/S/OV6dFbGEiv2ubtrNorl0d9/rPmmeAzG9AwLAPEg/+xgq9qU v6BR1KQ+HiVCcAlbJ7AlpZhD7HNMBiQX/b3fnSGYFT+j2ZvqwzaiB5O4ZvCJglXd+gpwtEjwSK6 XUdW4ttSh2G12+9NTZbWvIm3g/PU4Uk3KbxVaIgrvGc8SRj+7LVIH0XU3bBNjzvXjJDj1krGFnW eqx2HmnYZceIOZsBns6TjwWSHUcs/H0vQVouzMwgZG4UkOta3Hpv2I83lAJiFl40O1iMjO0QqGY ZQCLU= X-Google-Smtp-Source: AGHT+IEpDMl3bfkZteiiPPVcvc7b/5mISGkuZFWMxDGLxGwbf+rrygSrZ8ELSREV1Oqg8RPpbuYWGA== X-Received: by 2002:a17:907:3f0f:b0:aec:6600:dbe3 with SMTP id a640c23a62f3a-afcb9a3a917mr317894866b.56.1755181912991; Thu, 14 Aug 2025 07:31:52 -0700 (PDT) Received: from [172.16.220.71] (144-178-202-139.static.ef-service.nl. [144.178.202.139]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-af91a0a313esm2609421066b.32.2025.08.14.07.31.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Aug 2025 07:31:52 -0700 (PDT) From: Griffin Kroah-Hartman Date: Thu, 14 Aug 2025 16:31:37 +0200 Subject: [PATCH v3 3/3] arm64: dts: qcom: qcm6490-fairphone-fp5: Add vibrator support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250814-aw86927-v3-3-c99434083e6a@fairphone.com> References: <20250814-aw86927-v3-0-c99434083e6a@fairphone.com> In-Reply-To: <20250814-aw86927-v3-0-c99434083e6a@fairphone.com> To: Dmitry Torokhov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Luca Weiss Cc: linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Griffin Kroah-Hartman , Konrad Dybcio X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755181907; l=1292; i=griffin.kroah@fairphone.com; s=20250804; h=from:subject:message-id; bh=DhSXH5X/MnMSzKpEZ4Sb383iahpmcRMY2QF61lP6iQY=; b=QPyR7vmm/q1jEnw+7pvkm5NHW/TE9mIdQwCqN5nSjgrcQ1PhHSdZfRB40DOgz9Izj4zpqXswJ GCCHy9nz+KtCxR8ghCwu+dtaVSWYeVq+YQhfqkZJxW7/VZDaAsutD6d X-Developer-Key: i=griffin.kroah@fairphone.com; a=ed25519; pk=drSBvqKFiR+xucmLWONHSq/wGrW+YvcVtBXFYnYzn8U= Add the required node for haptic playback (Awinic AW86927). Reviewed-by: Konrad Dybcio Signed-off-by: Griffin Kroah-Hartman --- arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts b/arch/arm6= 4/boot/dts/qcom/qcm6490-fairphone-fp5.dts index 4c6cb4a644e2..9576efdf1e8d 100644 --- a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts +++ b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts @@ -866,7 +866,16 @@ ocp96011_sbu_mux: endpoint { }; }; =20 - /* AW86927FCR haptics @ 5a */ + vibrator@5a { + compatible =3D "awinic,aw86927"; + reg =3D <0x5a>; + + interrupts-extended =3D <&tlmm 101 IRQ_TYPE_EDGE_FALLING>; + reset-gpios =3D <&tlmm 100 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&aw86927_int_default>; + pinctrl-names =3D "default"; + }; }; =20 &i2c2 { @@ -1415,6 +1424,13 @@ usb_redrive_1v8_en_default: usb-redrive-1v8-en-defau= lt-state { bias-disable; output-high; }; + + aw86927_int_default: aw86927-int-default-state { + pins =3D "gpio101"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; }; =20 &uart5 { --=20 2.43.0