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Thu, 14 Aug 2025 04:40:51 -0400 (EDT) From: Janne Grunau Date: Thu, 14 Aug 2025 10:40:24 +0200 Subject: [PATCH 1/3] iommu: apple-dart: Make the hw register fields u32s Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250814-apple-dart-4levels-v1-1-db2214a78c08@jannau.net> References: <20250814-apple-dart-4levels-v1-0-db2214a78c08@jannau.net> In-Reply-To: <20250814-apple-dart-4levels-v1-0-db2214a78c08@jannau.net> To: Sven Peter , Alyssa Rosenzweig , Neal Gompa , Joerg Roedel , Will Deacon , Robin Murphy Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Janne Grunau , Hector Martin X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1124; i=j@jannau.net; s=yk2024; h=from:subject:message-id; bh=Ah2FtuAI2Pz9rAwG3UdfiegkoAw7DTu7B/zqezSouiI=; b=owGbwMvMwCW2UNrmdq9+ahrjabUkhoy5C/lm/zDfVRph9d3OmFnl3Qox5ramw3xB3WnW0k+PW 19PLNXpKGVhEONikBVTZEnSftnBsLpGMab2QRjMHFYmkCEMXJwCMJEFWgz/fVoq+NS6AxoKJN5e knb75SSVz7j72+tXuYv5/73SXcn6jJFhV1DhUYYXrw7tf+Yl/OjfxDvTdPWuF8TWmktYRbRuSD3 PDgA= X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 From: Hector Martin The registers are 32-bit and the offsets definitely don't need 64 bits either, these should've been u32s. Signed-off-by: Hector Martin Signed-off-by: Janne Grunau Reviewed-by: Sven Peter --- drivers/iommu/apple-dart.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/iommu/apple-dart.c b/drivers/iommu/apple-dart.c index 190f28d76615159527649cd288df395a50d950ef..e72a93e78e26ca61b233c83d439= dbdfadf040fc6 100644 --- a/drivers/iommu/apple-dart.c +++ b/drivers/iommu/apple-dart.c @@ -166,22 +166,22 @@ struct apple_dart_hw { =20 int max_sid_count; =20 - u64 lock; - u64 lock_bit; + u32 lock; + u32 lock_bit; =20 - u64 error; + u32 error; =20 - u64 enable_streams; + u32 enable_streams; =20 - u64 tcr; - u64 tcr_enabled; - u64 tcr_disabled; - u64 tcr_bypass; + u32 tcr; + u32 tcr_enabled; + u32 tcr_disabled; + u32 tcr_bypass; =20 - u64 ttbr; - u64 ttbr_valid; - u64 ttbr_addr_field_shift; - u64 ttbr_shift; + u32 ttbr; + u32 ttbr_valid; + u32 ttbr_addr_field_shift; + u32 ttbr_shift; int ttbr_count; }; =20 --=20 2.50.1