From nobody Mon Dec 15 22:44:38 2025 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9FCA02D29AC; Wed, 13 Aug 2025 06:33:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755066790; cv=none; b=Uratg1Wz/APnCYXBJ5AVgYVuXMqXvgf8H64dC7p8c39lz/GeP6Lv50GYCbV6IruZUC62PUD9JbSxS5LmulCA7OxgB69ZiUeWepYEJTeyqJo4MhjMUoU/vE/JdqWMPvydREhUTiuaRcLv0lV6etHiigySL/RaJLrP3QjO1xzXdII= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755066790; c=relaxed/simple; bh=xaVW3Re5wTG0RgIX+rnnhBCvng3HCXcONcdAxXFE71o=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=dRniAIp/F1Fi4t9RFuyr41y0h/d+bBVgxEO6IYciI5zYJfE5D1S/ZrEeUhf3p82PbTyZe+djQiDh3O2NbjUAk0xqRQchjkxGNfmPDKvF0oIHG6aN5XfHjWk2W1CksLb0xHXFdviN+e+JkeiAKI+cfLTTtdUYk8hMBKhJxCIKI44= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 13 Aug 2025 14:33:01 +0800 Received: from mail.aspeedtech.com (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 13 Aug 2025 14:33:01 +0800 From: Jacky Chou To: Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery CC: Simon Horman , Heiner Kallweit , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Po-Yu Chuang , , , , , , , Subject: [net-next v2 1/4] dt-bindings: net: ftgmac100: Restrict phy-mode and delay properties for AST2600 Date: Wed, 13 Aug 2025 14:32:58 +0800 Message-ID: <20250813063301.338851-2-jacky_chou@aspeedtech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250813063301.338851-1-jacky_chou@aspeedtech.com> References: <20250813063301.338851-1-jacky_chou@aspeedtech.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Create the new compatibles to identify AST2600 MAC0/1 and MAC3/4. Add conditional schema constraints for Aspeed AST2600 MAC controllers: - For "aspeed,ast2600-mac01", restrict phy-mode to "rgmii-id" and "rgmii-rxid", and require rx/tx-internal-delay-ps properties with 45ps step. - For "aspeed,ast2600-mac23", require rx/tx-internal-delay-ps properties with 250ps step. - Both require the "scu" property. Other compatible values remain unrestricted. Because the RGMII delay on AST2600 MAC0/1 is 45ps and its total delay step is 32, cannot cover 2ns delay for RGMII to meet center. We need the PHY side enables RX internal delay and the phy_mode must be "rgmii-id" or "rgmii-rxid". Signed-off-by: Jacky Chou --- .../bindings/net/faraday,ftgmac100.yaml | 50 +++++++++++++++++-- 1 file changed, 47 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml b= /Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml index 55d6a8379025..82c7c81eab10 100644 --- a/Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml +++ b/Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml @@ -6,9 +6,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# =20 title: Faraday Technology FTGMAC100 gigabit ethernet controller =20 -allOf: - - $ref: ethernet-controller.yaml# - maintainers: - Po-Yu Chuang =20 @@ -21,6 +18,8 @@ properties: - aspeed,ast2400-mac - aspeed,ast2500-mac - aspeed,ast2600-mac + - aspeed,ast2600-mac01 + - aspeed,ast2600-mac23 - const: faraday,ftgmac100 =20 reg: @@ -69,6 +68,12 @@ properties: mdio: $ref: /schemas/net/mdio.yaml# =20 + scu: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the SCU (System Control Unit) syscon node for Aspeed plat= form. + This reference is used by the MAC controller to configure the RGMII = delays. + required: - compatible - reg @@ -76,6 +81,45 @@ required: =20 unevaluatedProperties: false =20 +allOf: + - $ref: ethernet-controller.yaml# + - if: + properties: + compatible: + contains: + const: aspeed,ast2600-mac01 + then: + properties: + phy-mode: + enum: [rgmii-id, rgmii-rxid] + rx-internal-delay-ps: + minimum: 0 + maximum: 1395 + multipleOf: 45 + tx-internal-delay-ps: + minimum: 0 + maximum: 1395 + multipleOf: 45 + required: + - scu + - if: + properties: + compatible: + contains: + const: aspeed,ast2600-mac23 + then: + properties: + rx-internal-delay-ps: + minimum: 0 + maximum: 7750 + multipleOf: 250 + tx-internal-delay-ps: + minimum: 0 + maximum: 7750 + multipleOf: 250 + required: + - scu + examples: - | ethernet@1e660000 { --=20 2.43.0 From nobody Mon Dec 15 22:44:38 2025 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B29502D3ECC; Wed, 13 Aug 2025 06:33:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755066792; cv=none; b=YUPbDmcq/9P2xT14BOhTTEZGlYfAqLWrdd2nchSYWUn1Y6Oq3WOJwxekvqWYsZvmBCRK6X0C0XFNtVx3EWcXFsZev5PzS8k0y95+AWo4MkmsjYDugRYtOxyov2fmVx5dLyD5VnywH57qcxpdIvID+AjzJ6lcMtlJpGvS9xfistg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755066792; c=relaxed/simple; bh=44z6JC/dYsisM9QTRjJb5WpZz82pj6uC2AOQl6oYHmY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ZEFyvSKKM7dqMjUIh6pqFTEKMZTh8PYMbok52A2gJ1y4Z2act6MT2byT+xfdA929G+WJWoWWaE1xSS6X2FZecNAiCKoNNdUlEXN77znK7lZRz5O3cnW55UEVE4XBcCrsyg7E1YALTO+Hf7fS6YsRVD1M+WHgN+JizsMPhPfc4g4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 13 Aug 2025 14:33:01 +0800 Received: from mail.aspeedtech.com (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 13 Aug 2025 14:33:01 +0800 From: Jacky Chou To: Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery CC: Simon Horman , Heiner Kallweit , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Po-Yu Chuang , , , , , , , Subject: [net-next v2 2/4] ARM: dts: aspeed-g6: Add ethernet alise and update MAC compatible Date: Wed, 13 Aug 2025 14:32:59 +0800 Message-ID: <20250813063301.338851-3-jacky_chou@aspeedtech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250813063301.338851-1-jacky_chou@aspeedtech.com> References: <20250813063301.338851-1-jacky_chou@aspeedtech.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" For RGMII delay setting, the MAC0 and MAC1 use the SCU0x340 to configure the RGMII delay. We use the ethernet alise to identify the index of MAC. And add the new compatible for MAC0/1 and MAC2/3 to calculate the RGMII delay with different delay unit. Finally, the RGMII delay of AST2600 is configured in SCU region and add the scu phandle for configuration. Signed-off-by: Jacky Chou --- arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/as= peed/aspeed-g6.dtsi index 8ed715bd53aa..6be17b18da46 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi @@ -40,6 +40,10 @@ aliases { mdio1 =3D &mdio1; mdio2 =3D &mdio2; mdio3 =3D &mdio3; + ethernet0 =3D &mac0; + ethernet1 =3D &mac1; + ethernet2 =3D &mac2; + ethernet3 =3D &mac3; }; =20 =20 @@ -232,34 +236,46 @@ mdio3: mdio@1e650018 { }; =20 mac0: ethernet@1e660000 { - compatible =3D "aspeed,ast2600-mac", "faraday,ftgmac100"; + compatible =3D "aspeed,ast2600-mac01", + "aspeed,ast2600-mac", + "faraday,ftgmac100"; reg =3D <0x1e660000 0x180>; interrupts =3D ; clocks =3D <&syscon ASPEED_CLK_GATE_MAC1CLK>; + scu =3D <&syscon>; status =3D "disabled"; }; =20 mac1: ethernet@1e680000 { - compatible =3D "aspeed,ast2600-mac", "faraday,ftgmac100"; + compatible =3D "aspeed,ast2600-mac01", + "aspeed,ast2600-mac", + "faraday,ftgmac100"; reg =3D <0x1e680000 0x180>; interrupts =3D ; clocks =3D <&syscon ASPEED_CLK_GATE_MAC2CLK>; + scu =3D <&syscon>; status =3D "disabled"; }; =20 mac2: ethernet@1e670000 { - compatible =3D "aspeed,ast2600-mac", "faraday,ftgmac100"; + compatible =3D "aspeed,ast2600-mac23", + "aspeed,ast2600-mac", + "faraday,ftgmac100"; reg =3D <0x1e670000 0x180>; interrupts =3D ; clocks =3D <&syscon ASPEED_CLK_GATE_MAC3CLK>; + scu =3D <&syscon>; status =3D "disabled"; }; =20 mac3: ethernet@1e690000 { - compatible =3D "aspeed,ast2600-mac", "faraday,ftgmac100"; + compatible =3D "aspeed,ast2600-mac23", + "aspeed,ast2600-mac", + "faraday,ftgmac100"; reg =3D <0x1e690000 0x180>; interrupts =3D ; clocks =3D <&syscon ASPEED_CLK_GATE_MAC4CLK>; + scu =3D <&syscon>; status =3D "disabled"; }; =20 --=20 2.43.0 From nobody Mon Dec 15 22:44:38 2025 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B0BD62D46D1; Wed, 13 Aug 2025 06:33:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755066794; cv=none; b=F5UcJbDeVF8ENrqhYLoRz8SHh3+Jc6Vpo6Ls+rF79qqZgBcREmDyfBOfIUoy6WMoByTCvfve+lXhsAaOQeDiYqutifKTZoApP4THq5ioG03U6mDhpUvro2gwSVM6X6SqPfFwvX9cCH1pEjyzy2xciRuSJEkdLM009hTuUxRs3Jg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755066794; c=relaxed/simple; bh=j4YAxQn2KRUaeEamaRjZGZdiY1KOc3QEORdou34sN9E=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=L17lolrb7UBJxYKuflMBgnFdehoWtHVwYan4vXLZaVH2//Ezs/2WZPlBXrnszf1pc+46Kji13aOUVJ9szcDgo+1mdiin393WrIW9FTO1Wt9WrPtvOES0wj13/PIGGcOtivCyluAMK6oldiGHnygAmo+Mw4TE9q8T3f1zTPyLJ/Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 13 Aug 2025 14:33:01 +0800 Received: from mail.aspeedtech.com (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 13 Aug 2025 14:33:01 +0800 From: Jacky Chou To: Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery CC: Simon Horman , Heiner Kallweit , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Po-Yu Chuang , , , , , , , Subject: [net-next v2 3/4] ARM: dts: aspeed: ast2600evb: Add delay setting for MAC Date: Wed, 13 Aug 2025 14:33:00 +0800 Message-ID: <20250813063301.338851-4-jacky_chou@aspeedtech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250813063301.338851-1-jacky_chou@aspeedtech.com> References: <20250813063301.338851-1-jacky_chou@aspeedtech.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" We use the rx-internal-delay-ps and the tx-internal-delay-ps to configure the RGMII delay. And change the phy_mode of MAC0 and MAC1 to "rgmii-id" to enable the TX/RX internal delay on PHY side. MAC0 and MAC1 configure on the edge delay. Keep the phy_mode of MAC2 and MAC3 to "rgmii". The RGMII delay of MAC2 and MAC3 can generate the delay to meet clock center, so we just add the delay property to let driver to configure 2ns delay. Signed-off-by: Jacky Chou --- arch/arm/boot/dts/aspeed/aspeed-ast2600-evb.dts | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/aspeed/aspeed-ast2600-evb.dts b/arch/arm/boo= t/dts/aspeed/aspeed-ast2600-evb.dts index de83c0eb1d6e..dc4d437a39ed 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-ast2600-evb.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-ast2600-evb.dts @@ -123,22 +123,28 @@ ethphy3: ethernet-phy@0 { &mac0 { status =3D "okay"; =20 - phy-mode =3D "rgmii-rxid"; + phy-mode =3D "rgmii-id"; phy-handle =3D <ðphy0>; =20 pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_rgmii1_default>; + + rx-internal-delay-ps =3D <0>; + tx-internal-delay-ps =3D <0>; }; =20 =20 &mac1 { status =3D "okay"; =20 - phy-mode =3D "rgmii-rxid"; + phy-mode =3D "rgmii-id"; phy-handle =3D <ðphy1>; =20 pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_rgmii2_default>; + + rx-internal-delay-ps =3D <0>; + tx-internal-delay-ps =3D <0>; }; =20 &mac2 { @@ -149,6 +155,9 @@ &mac2 { =20 pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_rgmii3_default>; + + rx-internal-delay-ps =3D <2000>; + tx-internal-delay-ps =3D <2000>; }; =20 &mac3 { @@ -159,6 +168,9 @@ &mac3 { =20 pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_rgmii4_default>; + + rx-internal-delay-ps =3D <2000>; + tx-internal-delay-ps =3D <2000>; }; =20 &emmc_controller { --=20 2.43.0 From nobody Mon Dec 15 22:44:38 2025 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9D1192D542F; Wed, 13 Aug 2025 06:33:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755066796; cv=none; b=SHfb1fh1Ossv8xPD2xgZzyWkGcAd/m3C6FYRJbMgIdJpN4gVKBawilIgb7TjWMZGVidKBXMSnJtXrJHAaTOAftsAQBWAmd51qd9lFoxE/21oEZ7wV0rU3lnrUxRjOAcl6FxLgQofbo5G7ylkrENoiHkuMT6JYio4X36bvhVTOQ0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755066796; c=relaxed/simple; bh=8gjWsXm0VlB8Wbugiu6rvJc3y4PeQEm4UtIZEPaOnlw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=lriTe2julegY/4hzw5h1P8FEUe+c45IuchnAlmrYUpzK4cyd5HH29iygJnAYIPigiFOWHcNVcegXdis84es6bNneBDmJADGAbJuJnrQPcdrnEWGrQcLLJvxXS9P31Y2ue2fa4v9ainLBH9wC4Ck9zCaz+SgazVTGndfQfWnT+7s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 13 Aug 2025 14:33:01 +0800 Received: from mail.aspeedtech.com (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 13 Aug 2025 14:33:01 +0800 From: Jacky Chou To: Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery CC: Simon Horman , Heiner Kallweit , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Po-Yu Chuang , , , , , , , Subject: [net-next v2 4/4] net: ftgmac100: Add RGMII delay configuration for AST2600 Date: Wed, 13 Aug 2025 14:33:01 +0800 Message-ID: <20250813063301.338851-5-jacky_chou@aspeedtech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250813063301.338851-1-jacky_chou@aspeedtech.com> References: <20250813063301.338851-1-jacky_chou@aspeedtech.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In AST2600, the RGMII delay is configured in SCU register. The MAC0/1 and the MAC2/3 on AST2600 have different delay unit with their delay chain. These MACs all have the 32 stage to configure delay chain. |Delay Unit|Delay Stage|TX Edge Stage|RX Edge Stage| ------+----------+-----------+-------------+-------------+ MAC0/1| 45 ps| 32 | 0 | 0 | ------+----------+-----------+-------------+-------------+ MAC2/3| 250 ps| 32 | 0 | 26 | ------+----------+-----------+-------------+-------------+ The RX edge stage of MAC2 and MAC3 are strating from 26. We calculate the delay stage from the rx-internal-delay-ps of MAC2/3 to add 26. If the stage is equel to or bigger than 32, the delay stage will be mask 0x1f to get the correct setting. The delay chain is like a ring for configuration. So, the rx-internal-delay-ps of MAC2/3 is 2000 ps, we will get the delay stage is 2. Signed-off-by: Jacky Chou --- drivers/net/ethernet/faraday/ftgmac100.c | 86 ++++++++++++++++++++++++ drivers/net/ethernet/faraday/ftgmac100.h | 12 ++++ 2 files changed, 98 insertions(+) diff --git a/drivers/net/ethernet/faraday/ftgmac100.c b/drivers/net/etherne= t/faraday/ftgmac100.c index a98d5af3f9e3..02f49558bed8 100644 --- a/drivers/net/ethernet/faraday/ftgmac100.c +++ b/drivers/net/ethernet/faraday/ftgmac100.c @@ -25,6 +25,9 @@ #include #include #include +#include +#include +#include #include #include =20 @@ -1812,6 +1815,86 @@ static bool ftgmac100_has_child_node(struct device_n= ode *np, const char *name) return ret; } =20 +static void ftgmac100_set_internal_delay(struct platform_device *pdev) +{ + struct device_node *np =3D pdev->dev.of_node; + struct regmap *scu; + u32 rgmii_tx_delay; + u32 rgmii_rx_delay; + int dly_mask; + int dly_reg; + int id; + + if (!(of_device_is_compatible(np, "aspeed,ast2600-mac01") || + of_device_is_compatible(np, "aspeed,ast2600-mac23"))) + return; + + /* If lack one of them, do not configure anything */ + if (of_property_read_u32(np, "tx-internal-delay-ps", &rgmii_tx_delay)) { + dev_warn(&pdev->dev, "failed to get tx-internal-delay-ps\n"); + return; + } + if (of_property_read_u32(np, "rx-internal-delay-ps", &rgmii_rx_delay)) { + dev_warn(&pdev->dev, "failed to get tx-internal-delay-ps\n"); + return; + } + id =3D of_alias_get_id(np, "ethernet"); + if (id < 0 || id > 3) { + /* If lack alias or out of range, do not configure anything */ + dev_warn(&pdev->dev, "get wrong alise id %d\n", id); + return; + } + + if (of_device_is_compatible(np, "aspeed,ast2600-mac01")) { + dly_reg =3D AST2600_MAC01_CLK_DLY; + if (rgmii_tx_delay > AST2600_MAC01_CLK_DLY_MAX) { + dev_warn(&pdev->dev, "tx-internal-delay-ps %u is out of range\n", + rgmii_tx_delay); + return; + } + if (rgmii_rx_delay > AST2600_MAC01_CLK_DLY_MAX) { + dev_warn(&pdev->dev, "rx-internal-delay-ps %u is out of range\n", + rgmii_rx_delay); + return; + } + rgmii_tx_delay /=3D AST2600_MAC01_CLK_DLY_UNIT; + rgmii_rx_delay /=3D AST2600_MAC01_CLK_DLY_UNIT; + } else if (of_device_is_compatible(np, "aspeed,ast2600-mac23")) { + dly_reg =3D AST2600_MAC23_CLK_DLY; + if (rgmii_tx_delay > AST2600_MAC23_CLK_DLY_MAX) { + dev_warn(&pdev->dev, "tx-internal-delay-ps %u is out of range\n", + rgmii_tx_delay); + return; + } + if (rgmii_rx_delay > AST2600_MAC23_CLK_DLY_MAX) { + dev_warn(&pdev->dev, "rx-internal-delay-ps %u is out of range\n", + rgmii_rx_delay); + return; + } + rgmii_tx_delay /=3D AST2600_MAC23_CLK_DLY_UNIT; + /* The index of rx edge delay is started from 0x1a */ + rgmii_rx_delay =3D (0x1a + (rgmii_rx_delay / AST2600_MAC23_CLK_DLY_UNIT)= ) & 0x1f; + } + + if (id =3D=3D 0 || id =3D=3D 2) { + dly_mask =3D ASPEED_MAC0_2_TX_DLY | ASPEED_MAC0_2_RX_DLY; + rgmii_tx_delay =3D FIELD_PREP(ASPEED_MAC0_2_TX_DLY, rgmii_tx_delay); + rgmii_rx_delay =3D FIELD_PREP(ASPEED_MAC0_2_RX_DLY, rgmii_rx_delay); + } else { + dly_mask =3D ASPEED_MAC1_3_TX_DLY | ASPEED_MAC1_3_RX_DLY; + rgmii_tx_delay =3D FIELD_PREP(ASPEED_MAC1_3_TX_DLY, rgmii_tx_delay); + rgmii_rx_delay =3D FIELD_PREP(ASPEED_MAC1_3_RX_DLY, rgmii_rx_delay); + } + + scu =3D syscon_regmap_lookup_by_phandle(np, "scu"); + if (IS_ERR(scu)) { + dev_warn(&pdev->dev, "failed to map scu base"); + return; + } + + regmap_update_bits(scu, dly_reg, dly_mask, rgmii_tx_delay | rgmii_rx_dela= y); +} + static int ftgmac100_probe(struct platform_device *pdev) { struct resource *res; @@ -1977,6 +2060,9 @@ static int ftgmac100_probe(struct platform_device *pd= ev) if (of_device_is_compatible(np, "aspeed,ast2600-mac")) iowrite32(FTGMAC100_TM_DEFAULT, priv->base + FTGMAC100_OFFSET_TM); + + /* Configure RGMII delay if there are the corresponding compatibles */ + ftgmac100_set_internal_delay(pdev); } =20 /* Default ring sizes */ diff --git a/drivers/net/ethernet/faraday/ftgmac100.h b/drivers/net/etherne= t/faraday/ftgmac100.h index 4968f6f0bdbc..a9f0f00ac784 100644 --- a/drivers/net/ethernet/faraday/ftgmac100.h +++ b/drivers/net/ethernet/faraday/ftgmac100.h @@ -271,4 +271,16 @@ struct ftgmac100_rxdes { #define FTGMAC100_RXDES1_UDP_CHKSUM_ERR (1 << 26) #define FTGMAC100_RXDES1_IP_CHKSUM_ERR (1 << 27) =20 +/* Aspeed SCU */ +#define AST2600_MAC01_CLK_DLY 0x340 +#define AST2600_MAC23_CLK_DLY 0x350 +#define AST2600_MAC01_CLK_DLY_MAX 1395 /* ps */ +#define AST2600_MAC01_CLK_DLY_UNIT 45 /* ps */ +#define AST2600_MAC23_CLK_DLY_MAX 7750 /* ps */ +#define AST2600_MAC23_CLK_DLY_UNIT 250 /* ps */ +#define ASPEED_MAC0_2_TX_DLY GENMASK(5, 0) +#define ASPEED_MAC0_2_RX_DLY GENMASK(17, 12) +#define ASPEED_MAC1_3_TX_DLY GENMASK(11, 6) +#define ASPEED_MAC1_3_RX_DLY GENMASK(23, 18) + #endif /* __FTGMAC100_H */ --=20 2.43.0