From nobody Sat Oct 4 21:03:17 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 01D1028000D for ; Tue, 12 Aug 2025 15:02:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755010939; cv=none; b=VayV3c26zChrT42sGVMQfut358KtOBtZ8Ccr85/3hnLd9UXiWllysvDyGG1zr0rXSNqu0OWlfsly9VFwpWodhifi8o/fmzmww3lLm/dsMVcNNhRbd5bjQhI6lLsJLjLdC/SqLaaS8yE8AoUe9OH/iRhy1iJL2fL/ir9t1BdLzCA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755010939; c=relaxed/simple; bh=+i9M0gmIij0VNVeyBfq3lwmL+fMAyFN7TKXMhNT7Sig=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=PjXJ/dfIbXznKt8d1MR5mH8pLltiwPQdZ7r55Ivwdy/t19Gz+XtwtKpzbrpvyoMzSQwmFZiy1HUodDC2xCgb5nhdvCyHauFX6snqrwxDB8qaThYEBOmX8MpiyO5UlX//BHnQ+fopP7R7ODqUnlsMIsJPloVGUyFN1Sf2+oenaZc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=wifyCwkw; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="wifyCwkw" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:Message-ID:Date: Subject:Cc:To:From:Reply-To:Content-Type:In-Reply-To:References; bh=2VkIKlblba9WFkmenTXpPIqq84rYzCyImM7Q0AHXy3k=; b=wifyCwkwUbqJZwuXlj5yaBcMH1 2/TVBmEOOq9QpItnTrSOyY0MjmhVotrk1eRpimODPFcZDC1bjmMuIjo44t2PwbAtOw7jYOm3pwvC6 7+CS6oidJ+xLxi6IFeQ1Sy9atvU8XHsmDNiqmwbsR6qqCVAgfqcDb2/ETKjtf30xp9KTEhqhZOWWs JrJu2OP/N+rejZVBlSiX9w3Uh+s3f5UCB4Lw5g/W8sK5nWcZl7UHzf5n4Zj2lgRO9NJa/YcMDZ8WB jbn9TrNJ+iIMj8PIEkU+0IOB9QZDj79lEMKMB+p8WaA4opNYq5bTcir8TJnAgEAIIL7lMwToMbni2 B/tzhhzw==; Received: from i53875a42.versanet.de ([83.135.90.66] helo=localhost.localdomain) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1ulqVd-0004VY-UD; Tue, 12 Aug 2025 17:01:53 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: hjc@rock-chips.com, andy.yan@rock-chips.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] drm/rockchip: vop2: move clk-disable into its own function Date: Tue, 12 Aug 2025 17:01:43 +0200 Message-ID: <20250812150143.1126584-1-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Right now vop2_enable calls vop2_core_clks_prepare_enable to handle the vop clocks, but vop2_disable directly disables the clocks. Not nice from a symmetry point of view and also if we ever need to disable the clocks elsewhere, this would become a problem, so move clock disable into its own function as well. Signed-off-by: Heiko Stuebner --- drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm= /rockchip/rockchip_drm_vop2.c index 07ea2d2cf6d6..827ce440026c 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -785,6 +785,13 @@ static int vop2_core_clks_prepare_enable(struct vop2 *= vop2) return ret; } =20 +static void vop2_core_clks_disable_unprepare(struct vop2 *vop2) +{ + clk_disable_unprepare(vop2->pclk); + clk_disable_unprepare(vop2->aclk); + clk_disable_unprepare(vop2->hclk); +} + static void rk3588_vop2_power_domain_enable_all(struct vop2 *vop2) { u32 pd; @@ -867,9 +874,7 @@ static void vop2_disable(struct vop2 *vop2) =20 regcache_drop_region(vop2->map, 0, vop2_regmap_config.max_register); =20 - clk_disable_unprepare(vop2->pclk); - clk_disable_unprepare(vop2->aclk); - clk_disable_unprepare(vop2->hclk); + vop2_core_clks_disable_unprepare(vop2); } =20 static bool vop2_vp_dsp_lut_is_enabled(struct vop2_video_port *vp) --=20 2.47.2