From nobody Sun Oct 5 01:50:07 2025 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 032DA207A22; Mon, 11 Aug 2025 19:33:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.235 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754940829; cv=none; b=Eo9YeNZhlCAqPAorStenvMhYOJOoZVzhDDYRaecKQ3FCRYflxYk3kD4HXNj2UYqJK8PfgUALf3jzaCJVSs5aBWZzjyGLF4YehDTkK0hXRJvfI3mGBewYsn3C7LRN20XcJTSrRSRcVTPxJthlBaEI2cYWejlOENr8rDFJQ7M4+V0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754940829; c=relaxed/simple; bh=pf5c+ZoVAYMGy0I3S72deyXTPHc0lFoJ/nL1xToERAU=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=dtR5KX9iJnubJcpr9EciyNtfgNoVgBz7TAIqS6Tg2Tgs3od88kJLTTOnRwnCmYs1olzHhvTetFwZ18I+2insmJ3x12lL3ms5ti7dne1lzS8OHtiGOM502TqqLD5E3aw2qDx8jvkpcukURbKPf7h2xLDeDsojagsrd8jd5nYbXY4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=f2B30xwH; arc=none smtp.client-ip=198.47.23.235 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="f2B30xwH" Received: from lelvem-sh01.itg.ti.com ([10.180.77.71]) by lelvem-ot02.ext.ti.com (8.15.2/8.15.2) with ESMTP id 57BJXBkB1678213; Mon, 11 Aug 2025 14:33:11 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1754940791; bh=YdngpaN6rCWaiPZrMnO8j4ato33z/K66hxWiRc0bfZs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=f2B30xwHAzok/DYFLm6sq1Nht6Lr2fTlpiSwUCWeHbmcN7Xx9sb15htsqz1XnOlCc g1wgvSvJExN0JMF7m1E90zZfNjDOfmAvw3jy0ywXvWL1myHhxaRsxyDCqccAcTkJT2 KLZ+PWBcVm633QwamgtUX6VJMI6VOUmPtX9Wbz/4= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by lelvem-sh01.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 57BJXBvX2910863 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Mon, 11 Aug 2025 14:33:11 -0500 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Mon, 11 Aug 2025 14:33:10 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Mon, 11 Aug 2025 14:33:10 -0500 Received: from santhoshkumark.dhcp.ti.com (santhoshkumark.dhcp.ti.com [172.24.233.254]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 57BJWq1q3690681; Mon, 11 Aug 2025 14:33:06 -0500 From: Santhosh Kumar K To: , , , , , , , CC: , , , , , , Subject: [RFC PATCH 03/10] mtd: nand: spi: Introduce _execute_tuning for mtd devices Date: Tue, 12 Aug 2025 01:02:12 +0530 Message-ID: <20250811193219.731851-4-s-k6@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250811193219.731851-1-s-k6@ti.com> References: <20250811193219.731851-1-s-k6@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Add _execute_tuning to mtd_info allowing mtd devices to run their own PHY tuning procedure to run at higher frequencies. Signed-off-by: Santhosh Kumar K --- drivers/mtd/nand/spi/core.c | 61 +++++++++++++++++++++++++++++++++++++ include/linux/mtd/mtd.h | 1 + 2 files changed, 62 insertions(+) diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index b0898990b2a5..c890a42cdb0a 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -1483,6 +1483,66 @@ static void spinand_mtd_resume(struct mtd_info *mtd) spinand_ecc_enable(spinand, false); } =20 +static int spinand_mtd_execute_tuning(struct mtd_info *mtd, struct mtd_par= t *part) +{ + struct spinand_device *spinand =3D mtd_to_spinand(mtd); + struct nand_device *nand =3D spinand_to_nand(spinand); + struct nand_pos page_pos; + struct nand_page_io_req page_req; + struct spi_mem_op read_page_op; + struct spi_mem_tuning_params *tuning_params; + int ret, pageoffs; + u8 status; + + tuning_params =3D kzalloc(sizeof(*tuning_params), GFP_KERNEL); + if (!tuning_params) + return -ENOMEM; + + ret =3D spi_mem_get_tuning_params(spinand->spimem, tuning_params); + if (ret) + goto err_free_tuning_params; + + /* + * TODO: + * Write the PHY pattern to cache using spinand_write_to_cache_op() + * and readback pattern from cache during tuning instead of using up + * the flash's space. + * + * For SPI NOR: + * Things remain same as done here, the PHY pattern will be preflashed to + * at an offset and will be readback during tuning. + */ + + pageoffs =3D nanddev_offs_to_pos(nand, part->offset, &page_pos); + page_req.pos =3D page_pos; + + read_page_op =3D *spinand->op_templates.read_cache; + read_page_op.addr.val =3D pageoffs; + read_page_op.data.nbytes =3D tuning_params->pattern_size; + + ret =3D spinand_load_page_op(spinand, &page_req); + if (ret) + goto err_free_tuning_params; + + ret =3D spinand_wait(spinand, SPINAND_READ_INITIAL_DELAY_US, + SPINAND_READ_POLL_DELAY_US, &status); + if (ret < 0) + goto err_free_tuning_params; + + spinand_ondie_ecc_save_status(nand, status); + ret =3D spi_mem_execute_tuning(spinand->spimem, &read_page_op); + + /* + * TODO: + * Fallback to a lower frequency and a less dummy cycle in case of + * PHY tuning failure + */ + +err_free_tuning_params: + kfree(tuning_params); + return ret; +} + static int spinand_init(struct spinand_device *spinand) { struct device *dev =3D &spinand->spimem->spi->dev; @@ -1551,6 +1611,7 @@ static int spinand_init(struct spinand_device *spinan= d) mtd->_erase =3D spinand_mtd_erase; mtd->_max_bad_blocks =3D nanddev_mtd_max_bad_blocks; mtd->_resume =3D spinand_mtd_resume; + mtd->_execute_tuning =3D spinand_mtd_execute_tuning; =20 if (spinand_user_otp_size(spinand) || spinand_fact_otp_size(spinand)) { ret =3D spinand_set_mtd_otp_ops(spinand); diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 8d10d9d2e830..5ac8dc02280d 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -355,6 +355,7 @@ struct mtd_info { int (*_suspend) (struct mtd_info *mtd); void (*_resume) (struct mtd_info *mtd); void (*_reboot) (struct mtd_info *mtd); + int (*_execute_tuning) (struct mtd_info *mtd, struct mtd_part *part); /* * If the driver is something smart, like UBI, it may need to maintain * its own reference counting. The below functions are only for driver. --=20 2.34.1