From nobody Sun Oct 5 01:49:23 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BA96B2E4271 for ; Mon, 11 Aug 2025 18:17:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754936268; cv=none; b=mqxOZa6wL42ULD3jqFDmCwBu7Qiczfjatz26JXNcZG9YfhPAfgpWcxycjG3JYvIv4Y39vcnYAaN0BPHJyLy/y6EmT3rTp/eopBAQwTJrbURdI6H736MIoe+EJGZ0BijnG6E/bYeI6usibEDvJ0CIZl+Kdnq2NEEWBhc46mLWYwg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754936268; c=relaxed/simple; bh=ssZTE+z9V//W/s5k1s1ZiZYrrJ05FU0h4Tp1p6ePZS0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tl/2eH6+0/JKHG6FViXnzomKdla6h8niJxRQ9Scw32vEoPJfzY1ALEcBLC+mjrc+/TQf1k4WTAC5x4oZWZJCKu9wp7v5TCpg8JZHzWlQeHPJOEAlFqCsCtXOGOh8zcSbHbPrnA5Dd95p2ocaZOOonW87fqNUjLy/2DajInZpUeI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=kacmu8yH; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="kacmu8yH" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1754936267; x=1786472267; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ssZTE+z9V//W/s5k1s1ZiZYrrJ05FU0h4Tp1p6ePZS0=; b=kacmu8yHNIaJbYrY8s+F/YIvcwpw8jAM4dkJ1z1HD15juDbAJkzj/uTi LJ7OEOjdRW8YDs1GLqejhIvwlPGSgw4ux0dYyMaJTYUCko+8vE+jVzuQE QmIqrLldomZN2xsLmQaN4rFQ2pCxn0+ovpmmjmQCh+BP602PrdaQpaNtE l0TJC2scA2P4MhWxYXF0qSCqnhHl+x5aDFgz657r/ApUiBewW14MDQhe9 rBHQzdMBCVPzsDobl8LO4ETKaoyqqb8xts/U5Cp/CIGvUmeA2zQz3xUlc NyxHS+TSG2nhI3UEPjYYXeg1Hc+AETWG6Kl3L2bJ6csPGixGEp8WkgPxe g==; X-CSE-ConnectionGUID: 6W5qyo2MSdScVj4fkfKXeg== X-CSE-MsgGUID: dE6+zqVWSkGDukYyPrEpiQ== X-IronPort-AV: E=McAfee;i="6800,10657,11518"; a="68277492" X-IronPort-AV: E=Sophos;i="6.17,278,1747724400"; d="scan'208";a="68277492" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Aug 2025 11:17:27 -0700 X-CSE-ConnectionGUID: pEyZBfZtSMapvlXkxpcvew== X-CSE-MsgGUID: gz6+gE8VQuajB3dcFaYXDg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.17,278,1747724400"; d="scan'208";a="196825694" Received: from puneetse-mobl.amr.corp.intel.com (HELO agluck-desk3.home.arpa) ([10.124.221.229]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Aug 2025 11:17:26 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin , Anil Keshavamurthy , Chen Yu Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v8 24/32] x86/resctrl: Add energy/perf choices to rdt boot option Date: Mon, 11 Aug 2025 11:16:58 -0700 Message-ID: <20250811181709.6241-25-tony.luck@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250811181709.6241-1-tony.luck@intel.com> References: <20250811181709.6241-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Legacy resctrl features are enumerated by X86_FEATURE_* flags. These may be overridden by quirks to disable features in the case of errata. Users can use kernel command line options to either disable a feature, or to force enable a feature that was disabled by a quirk. Provide similar functionality for hardware features that do not have an X86_FEATURE_* flag. Unlike other features that are tied to X86_FEATURE_* flags, these must be queried by name. Add rdt_is_feature_enabled() to check whether quirks or kernel command line have disabled a feature. Just like the legacy features the command line enable overrides quirk disable. Signed-off-by: Tony Luck --- .../admin-guide/kernel-parameters.txt | 2 +- arch/x86/kernel/cpu/resctrl/internal.h | 2 ++ arch/x86/kernel/cpu/resctrl/core.c | 30 +++++++++++++++++++ 3 files changed, 33 insertions(+), 1 deletion(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentatio= n/admin-guide/kernel-parameters.txt index 747a55abf494..b600e1b47b0c 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -6154,7 +6154,7 @@ rdt=3D [HW,X86,RDT] Turn on/off individual RDT features. List is: cmt, mbmtotal, mbmlocal, l3cat, l3cdp, l2cat, l2cdp, - mba, smba, bmec. + mba, smba, bmec, energy, perf. E.g. to turn on cmt and turn off mba use: rdt=3Dcmt,!mba =20 diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/r= esctrl/internal.h index cd911591625f..e76b5e35351b 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -177,6 +177,8 @@ void __init intel_rdt_mbm_apply_quirk(void); =20 void rdt_domain_reconfigure_cdp(struct rdt_resource *r); =20 +bool rdt_is_feature_enabled(char *name); + #ifdef CONFIG_X86_CPU_RESCTRL_INTEL_AET bool intel_aet_get_events(void); void __exit intel_aet_exit(void); diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index 7a0d81b4c230..d151aabe2b93 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -760,6 +760,8 @@ enum { RDT_FLAG_MBA, RDT_FLAG_SMBA, RDT_FLAG_BMEC, + RDT_FLAG_ENERGY, + RDT_FLAG_PERF, }; =20 #define RDT_OPT(idx, n, f) \ @@ -785,6 +787,8 @@ static struct rdt_options rdt_options[] __ro_after_ini= t =3D { RDT_OPT(RDT_FLAG_MBA, "mba", X86_FEATURE_MBA), RDT_OPT(RDT_FLAG_SMBA, "smba", X86_FEATURE_SMBA), RDT_OPT(RDT_FLAG_BMEC, "bmec", X86_FEATURE_BMEC), + RDT_OPT(RDT_FLAG_ENERGY, "energy", 0), + RDT_OPT(RDT_FLAG_PERF, "perf", 0), }; #define NUM_RDT_OPTIONS ARRAY_SIZE(rdt_options) =20 @@ -834,6 +838,32 @@ bool rdt_cpu_has(int flag) return ret; } =20 +/* + * Hardware features that do not have X86_FEATURE_* bits. + * There is no "hardware does not support this at all" case. + * Assume that the caller has already determined that hardware + * support is present and just needs to check if the feature has been + * disabled by a quirk that has not been overridden by a command + * line option. + */ +bool rdt_is_feature_enabled(char *name) +{ + struct rdt_options *o; + bool ret =3D true; + + for (o =3D rdt_options; o < &rdt_options[NUM_RDT_OPTIONS]; o++) { + if (!strcmp(name, o->name)) { + if (o->force_off) + ret =3D false; + if (o->force_on) + ret =3D true; + break; + } + } + + return ret; +} + bool resctrl_arch_is_evt_configurable(enum resctrl_event_id evt) { if (!rdt_cpu_has(X86_FEATURE_BMEC)) --=20 2.50.1