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charset="utf-8" From: Palash Kambar Enable Multi-Circular Queue (MCQ) support for the UFS host controller on the Qualcomm SM8750 platform by updating the device tree node. This includes adding new register region for MCQ and specifying the MSI parent required for MCQ operation. Signed-off-by: Palash Kambar Signed-off-by: Ram Kumar Dwivedi --- arch/arm64/boot/dts/qcom/sm8750.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qco= m/sm8750.dtsi index 4643705021c6..3cd701ca4020 100644 --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi @@ -3329,7 +3329,10 @@ ufs_mem_phy: phy@1d80000 { =20 ufs_mem_hc: ufs@1d84000 { compatible =3D "qcom,sm8750-ufshc", "qcom,ufshc", "jedec,ufs-2.0"; - reg =3D <0x0 0x01d84000 0x0 0x3000>; + reg =3D <0x0 0x01d84000 0x0 0x3000>, + <0x0 0x1da0000 0x0 0x2000>; + reg-names =3D "ufs_mem", + "mcq"; =20 interrupts =3D ; =20 @@ -3363,11 +3366,12 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, "cpu-ufs"; =20 power-domains =3D <&gcc GCC_UFS_PHY_GDSC>; + required-opps =3D <&rpmhpd_opp_nom>; =20 iommus =3D <&apps_smmu 0x60 0>; dma-coherent; - + msi-parent =3D <&gic_its 0x60>; lanes-per-direction =3D <2>; =20 phys =3D <&ufs_mem_phy>; --=20 2.50.1