From nobody Sun Oct 5 01:51:56 2025 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 969AB217F24; Mon, 11 Aug 2025 08:16:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754900184; cv=none; b=o2YgnWHjiUE8zvqnLUx9JRumQHHa7feecxiU7HAnJ0T+m42A2azjplvPx8nwo4JqK2PZ0wLRUpCNVhmd93ROonNogXMUx0tlAKgr+HvtYw464lQ6fc5hQUbkAsMbsy4KxMd4dTmlcWetvqI3b/tTKUBQSieLi3k4vrTeX4sUo7o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754900184; c=relaxed/simple; bh=n7CH/yu8a6YC3VFATMACJXJ8l67gHGodj6pyuiJFpps=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=jF9viUy46kfE/kj/99ttTmsanDL4wHe/9o6N5Qr0a9iPYO9U/4NPHLlQU9tPMjvnpgc90LLoFqsIJaBgrjcRZgrtv+hFEEQte4DtzDkROI8r4qhvI1JjK4cLcrExLzQGdhW5LV2zQuMb66bPw3Pe8qiBPFSqy3RGi7iedv7WiXA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=g1/++lYL; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="g1/++lYL" X-UUID: 6bd8d038768b11f0b33aeb1e7f16c2b6-20250811 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=a7Dr6EHXZb1zZv1XZgN30AHSOXgaHs9rJ38l2ZynADk=; b=g1/++lYLKYzRew9XOFMgGCDfBxHOScAqVNTsRfYA7EZ4jmFW99/QcIrVyGBLtJWriK9hwm9XeQCVT51uqcTpU2H+BDxQ/ppmiidBzI6eEgIHX0opVerX+Gy0NPZw3rr6V3Eu7raXBnayMTJ8qZj17rSe6GneHcuaFrMwMrae3Kw=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.3,REQID:0bd8d0f1-8fc6-4d3f-aa57-e76c7ca7292a,IP:0,UR L:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION:r elease,TS:0 X-CID-META: VersionHash:f1326cf,CLOUDID:dda74da1-1800-4e4f-b665-a3d622db32cf,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102,TC:-5,Content:0|15|50,EDM: -3,IP:nil,URL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0, AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 3,DMD|SSN|SDN X-CID-BAS: 3,DMD|SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 6bd8d038768b11f0b33aeb1e7f16c2b6-20250811 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1586326287; Mon, 11 Aug 2025 16:16:03 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by MTKMBS14N2.mediatek.inc (172.21.101.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.39; Mon, 11 Aug 2025 16:15:55 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.39 via Frontend Transport; Mon, 11 Aug 2025 16:15:55 +0800 From: To: Eddie Huang , Sean Wang , Alexandre Belloni , Matthias Brugger , Lee Jones , Shunxi Zhang CC: , , , , , , Subject: [PATCH v1 1/2] mfd: mt6397: Add new bit definitions for RTC_BBPU register Date: Mon, 11 Aug 2025 16:15:33 +0800 Message-ID: <20250811081543.4377-2-ot_shunxi.zhang@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250811081543.4377-1-ot_shunxi.zhang@mediatek.com> References: <20250811081543.4377-1-ot_shunxi.zhang@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Shunxi Zhang This patch adds new bit definitions for the RTC_BBPU register in the mt6397 RTC header file. The following bit definitions are introduced: Signed-off-by: Shunxi Zhang --- include/linux/mfd/mt6397/rtc.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/include/linux/mfd/mt6397/rtc.h b/include/linux/mfd/mt6397/rtc.h index 27883af44f87..001cef6b7302 100644 --- a/include/linux/mfd/mt6397/rtc.h +++ b/include/linux/mfd/mt6397/rtc.h @@ -15,8 +15,11 @@ #include =20 #define RTC_BBPU 0x0000 +#define RTC_BBPU_PWREN BIT(0) +#define RTC_BBPU_CLR BIT(1) +#define RTC_BBPU_RESET_AL BIT(3) #define RTC_BBPU_CBUSY BIT(6) -#define RTC_BBPU_KEY (0x43 << 8) +#define RTC_BBPU_KEY (0x43 << 8) =20 #define RTC_WRTGR_MT6358 0x003a #define RTC_WRTGR_MT6397 0x003c --=20 2.46.0 From nobody Sun Oct 5 01:51:56 2025 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6A30E17DFE7; Mon, 11 Aug 2025 08:16:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754900183; cv=none; b=rzYuHlY8x40ei3uxWACqHC4h3thoUOmpUITv6C0VRcs2IXnWm/kJGRVO5hYAIMFFMPU+JplFyQEvIQIShxUqspNxyXmhA753Hc6kHIpX5frOlMSP9isqz5PoLPmBjZ8HGvSW8hnH4Kyt5nXzYK7rfq3L8BoYfmujbIuKVlCt5EU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754900183; c=relaxed/simple; bh=srm3zsoprTKXB85DJvR2KprlSioEN2mDA9xeJVhDzcA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=IwkEZ1PRu6KrFeBQveUwB6fkrnONQUY6G7i+ZkCkIM9iBIF/UqgRB6/0CZMM0IU5nijyh4TgIpXiHH4pFRO0bJTaa8nlTy76wfo6j9iQGDshCJbyBjKFT3oJpoK9E5zK04xcJx1pre9g6l1TS8Wjsz5a5/HJIKYsCAOi1ulMsRo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=QNZtTEE2; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="QNZtTEE2" X-UUID: 6e046d2c768b11f0b33aeb1e7f16c2b6-20250811 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=x/e5kCslJYDoFpQ6zaF3VOwpJkCoYx1KKrXOFc+oh2Q=; b=QNZtTEE2rzaqZDZGephNySLtzpjwf0mgv++vMoadLqHf8URiYECyPcRluyhC8GiHfC8hSbAZGJ+QmnNvwJ1VzN4OLzkDIAeQNPi0FDcQ8KfZoaVLYn458j/JtTsM0KAHCy0KzhfFOo7AJvL9Gc3hh6p/zBrlviHf4ZEGJFCA+lw=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.3,REQID:1b0383d7-e001-4440-8e5f-6a0cb6f59297,IP:0,UR L:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION:r elease,TS:0 X-CID-META: VersionHash:f1326cf,CLOUDID:1335d09d-7ad4-4169-ab95-78e9164f00fe,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102,TC:-5,Content:0|15|50,EDM: -3,IP:nil,URL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0, AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 3,DMD|SSN|SDN X-CID-BAS: 3,DMD|SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 6e046d2c768b11f0b33aeb1e7f16c2b6-20250811 Received: from mtkmbs09n2.mediatek.inc [(172.21.101.94)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 392357454; Mon, 11 Aug 2025 16:16:06 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.39; Mon, 11 Aug 2025 16:16:00 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.39 via Frontend Transport; Mon, 11 Aug 2025 16:15:59 +0800 From: To: Eddie Huang , Sean Wang , Alexandre Belloni , Matthias Brugger , Lee Jones , Shunxi Zhang CC: , , , , , , Subject: [PATCH v1 2/2] rtc: mt6397: Add BBPU alarm status reset and shutdown handling Date: Mon, 11 Aug 2025 16:15:34 +0800 Message-ID: <20250811081543.4377-3-ot_shunxi.zhang@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250811081543.4377-1-ot_shunxi.zhang@mediatek.com> References: <20250811081543.4377-1-ot_shunxi.zhang@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Shunxi Zhang This patch introduces a new function, mtk_rtc_reset_bbpu_alarm_status, to reset the BBPU alarm status in the MT6397 RTC driver. This function writes the necessary bits to the RTC_BBPU register to clear the alarm status and ensure proper operation. Additionally, the mtk_rtc_shutdown function is added to handle RTC shutdown events. It resets the BBPU alarm status and updates the RTC_IRQ_EN register to disable the one-shot alarm interrupt, ensuring a clean shutdown process. Signed-off-by: Shunxi Zhang --- drivers/rtc/rtc-mt6397.c | 36 +++++++++++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/drivers/rtc/rtc-mt6397.c b/drivers/rtc/rtc-mt6397.c index 692c00ff544b..063bd399de8c 100644 --- a/drivers/rtc/rtc-mt6397.c +++ b/drivers/rtc/rtc-mt6397.c @@ -37,6 +37,21 @@ static int mtk_rtc_write_trigger(struct mt6397_rtc *rtc) return ret; } =20 +static void mtk_rtc_reset_bbpu_alarm_status(struct mt6397_rtc *rtc) +{ + u32 bbpu =3D RTC_BBPU_KEY | RTC_BBPU_PWREN | RTC_BBPU_RESET_AL; + int ret; + + ret =3D regmap_write(rtc->regmap, rtc->addr_base + RTC_BBPU, bbpu); + if (ret < 0) { + dev_err(rtc->rtc_dev->dev.parent, "%s: write rtc bbpu error\n", + __func__); + return; + } + + mtk_rtc_write_trigger(rtc); +} + static irqreturn_t mtk_rtc_irq_handler_thread(int irq, void *data) { struct mt6397_rtc *rtc =3D data; @@ -51,6 +66,8 @@ static irqreturn_t mtk_rtc_irq_handler_thread(int irq, vo= id *data) if (regmap_write(rtc->regmap, rtc->addr_base + RTC_IRQ_EN, irqen) =3D=3D 0) mtk_rtc_write_trigger(rtc); + + mtk_rtc_reset_bbpu_alarm_status(rtc); mutex_unlock(&rtc->lock); =20 return IRQ_HANDLED; @@ -297,6 +314,22 @@ static int mtk_rtc_probe(struct platform_device *pdev) return devm_rtc_register_device(rtc->rtc_dev); } =20 +static void mtk_rtc_shutdown(struct platform_device *pdev) +{ + struct mt6397_rtc *rtc =3D platform_get_drvdata(pdev); + int ret =3D 0; + + mtk_rtc_reset_bbpu_alarm_status(rtc); + + ret =3D regmap_update_bits(rtc->regmap, + rtc->addr_base + RTC_IRQ_EN, + RTC_IRQ_EN_ONESHOT_AL, 0); + if (ret < 0) + return; + + mtk_rtc_write_trigger(rtc); +} + #ifdef CONFIG_PM_SLEEP static int mt6397_rtc_suspend(struct device *dev) { @@ -345,7 +378,8 @@ static struct platform_driver mtk_rtc_driver =3D { .of_match_table =3D mt6397_rtc_of_match, .pm =3D &mt6397_pm_ops, }, - .probe =3D mtk_rtc_probe, + .probe =3D mtk_rtc_probe, + .shutdown =3D mtk_rtc_shutdown, }; =20 module_platform_driver(mtk_rtc_driver); --=20 2.46.0