From nobody Sun Oct 5 01:47:27 2025 Received: from mail-ej1-f42.google.com (mail-ej1-f42.google.com [209.85.218.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2D77626FA54; Mon, 11 Aug 2025 08:04:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754899489; cv=none; b=nMvm+sPVlEyJxR5G4ipAENhIPc7/5bcwFNb88row66gOv6psB3iyxU42+lOFMfPGZFxVIrfV9Xtp5UmMMVVtcX6ACOcWfeo+CBTKUnv+zF7S0yekWyhbkQZ7+462RHwsxj6JtyEv5i+l0l7I2dUZ04J2a/M6vgN4BdtYeGvhgvY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754899489; c=relaxed/simple; bh=e/AbcwBM9uIFEwZ/6mpXZP2Y3Z4bGt/eHFgnbobATzs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kzxx536nyqV1tSy/EhVFu8FuE7h81DrmN29b/odTh2wAlRt41Y5D3nCBJDodfbiP5GMus+M276fXr6YMdTpeajDFkDeXpgsJ6DapM1E7+reQ9iCh4oZfs5BRs1qkDf5e+xz9ZwGKFjMsW8WgYaVycS2c9mxRaR2HwcoBuwOM34Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=dLCf2Q9P; arc=none smtp.client-ip=209.85.218.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="dLCf2Q9P" Received: by mail-ej1-f42.google.com with SMTP id a640c23a62f3a-af949bdf36cso644653066b.0; Mon, 11 Aug 2025 01:04:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1754899486; x=1755504286; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Jv63TPoByrIyI7mUvMKjVHJSZMGf19SIsGRaSMWTF9U=; b=dLCf2Q9Pa5DXwhYio+KJsjljVVT5v76/58i48A6u4fEMXC1SYLhMQrEZr1fZnK9dmY 62KcJRlcdm+PKLjanyv2fovvIoQE1Stq7PoB41Y9MwyqKjrCN1hg+171S4jXgjZEvwWF np+4dBnpKvqugZh9tvLC2/+Qw+zQ0Gjztx5jRjq8gcNmvNjJ37Ic5TiPWpT15Mo6N/PP zkkmDQg7+fUP5zT9O0d0RnJLrvvtDK4m+I+mXM+orrlH0OoCQg6FIbmYUuh0tFRFSiwD 3DNwPvYDNk679A56Cp1xoaJ3+Xp6ewP99pB/mM0ZfulHBD5UWcCvGeCAtva8e3CxmbJ7 7hPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1754899486; x=1755504286; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Jv63TPoByrIyI7mUvMKjVHJSZMGf19SIsGRaSMWTF9U=; b=Ktedu9UCOaIXRwubPfz66NUW5IY33sRhSCtb4BzFZuzQLlbdaWlPpljplLJYJDXgic ftXuKoOjmYJnhqKuvk2RNUV8ZtjypeMctC0mI3gYwv8xpUYyBW0rXjkvkO2FOzrhefvQ WQCT4vYmcLMs91TA/KiqaTDW2D+qSWlfbDjC6Cds0RFPmC4KxTTaSLRSW74xjwp3ZsGx KGAT4BGlB66Zp4zHQkVAbKyhlugbAHM1yYqe7DhC5LkMSyXOtW8sjK7bGoItl2c1q2K3 tkh1L+2ToqtUmuoeacBFffcu/7qO2nL1Vcr7xsUhYiHQ44vjxEii+GxDMmiDmC4JLnJ4 rL5g== X-Forwarded-Encrypted: i=1; AJvYcCXRe694NJU7ng/BqV8T7fYyfM0fe+KKmDlPz+ZYyxrSnZHn273T8JjYj+sVa6X+Ov+jEVbhUYaOd/daDwvZ@vger.kernel.org, AJvYcCXSonz0q1pUiZh691747mMum9GzuMoeTX1bN4XE/Sl+vSKl1WammsAHkhqCmCj8yZpxZkvT0FGJY+rP@vger.kernel.org, AJvYcCXWinZVU/xXT/Ot/IYRf56O124WZOzHRZ1S2oKNWOS4TkBzFAxKrngC6K9aMMh5aT9oWnkP/rNzANvyqTI=@vger.kernel.org X-Gm-Message-State: AOJu0YyBtkCsO08KDBGoxHU/1XKeyhPlPcEb1NZ4JltPnHqSqOC9YwPK r8oe5fM9qvzjvBDiBQyk+Zc8JTcjANdguSvzRRxdD6dZnmx+rltHh38b X-Gm-Gg: ASbGncseVWrAzoKXg8HAxDCY1sAK0SjxHMtDt65rLFVsrBOnQ2gsQ9zDjfs6hLQRGmQ VNCCdCP6Vu3hbthqTgZKRwoTNephWzyDiytv/vXUkeLfw3x5PEN0AaUwGRGMhBj6vY5RafQwSZR VjONdbv2B/sMcpXXqmVbS/f9P9GELNLKLYEycwdl85ymvKDES3cYHepyqlHHxjQAx9gkGtnx0uP 064f9ntSFyV29ZVK9wyDwhe4ShjFjcazuLwgUcpL5RfH8VK21l9s4zWz6kXlBX9GP03+gGzKtM/ q3dUtdrvMht1BiNevEhNOF9ytEc6PIiu/LPWiTw+xl/bJMvzuOudnbUw6SEvpw10cbKeSiKenHU jqvCJKaYiTeBiazZkBkvsQque X-Google-Smtp-Source: AGHT+IGApizmUMTKXXhSiuC+f8FzoBuedHHTP5BaIgAPwZgpqbjFqlVBQzlreBZe3b/Z+nC4/WZynA== X-Received: by 2002:a17:907:72c7:b0:ade:79c5:21dc with SMTP id a640c23a62f3a-af9c642fb1cmr1189293866b.25.1754899485734; Mon, 11 Aug 2025 01:04:45 -0700 (PDT) Received: from xeon.. ([188.163.112.70]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-af91a21c081sm1956446566b.97.2025.08.11.01.04.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Aug 2025 01:04:45 -0700 (PDT) From: Svyatoslav Ryhel To: "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Thierry Reding , Thierry Reding , Mikko Perttunen , Jonathan Hunter , Svyatoslav Ryhel Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/5 RESEND] soc: tegra: fuse: add Tegra114 nvmem cells and fuse lookups Date: Mon, 11 Aug 2025 11:04:18 +0300 Message-ID: <20250811080422.12300-2-clamor95@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250811080422.12300-1-clamor95@gmail.com> References: <20250811080422.12300-1-clamor95@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add missing Tegra114 nvmem cells and fuse lookups which were added for Tegra124+ but omitted for Tegra114. Signed-off-by: Svyatoslav Ryhel --- drivers/soc/tegra/fuse/fuse-tegra30.c | 122 ++++++++++++++++++++++++++ 1 file changed, 122 insertions(+) diff --git a/drivers/soc/tegra/fuse/fuse-tegra30.c b/drivers/soc/tegra/fuse= /fuse-tegra30.c index e24ab5f7d2bf..524fa1b0cd3d 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra30.c +++ b/drivers/soc/tegra/fuse/fuse-tegra30.c @@ -117,6 +117,124 @@ const struct tegra_fuse_soc tegra30_fuse_soc =3D { #endif =20 #ifdef CONFIG_ARCH_TEGRA_114_SOC +static const struct nvmem_cell_info tegra114_fuse_cells[] =3D { + { + .name =3D "tsensor-cpu1", + .offset =3D 0x084, + .bytes =3D 4, + .bit_offset =3D 0, + .nbits =3D 32, + }, { + .name =3D "tsensor-cpu2", + .offset =3D 0x088, + .bytes =3D 4, + .bit_offset =3D 0, + .nbits =3D 32, + }, { + .name =3D "tsensor-common", + .offset =3D 0x08c, + .bytes =3D 4, + .bit_offset =3D 0, + .nbits =3D 32, + }, { + .name =3D "tsensor-cpu0", + .offset =3D 0x098, + .bytes =3D 4, + .bit_offset =3D 0, + .nbits =3D 32, + }, { + .name =3D "xusb-pad-calibration", + .offset =3D 0x0f0, + .bytes =3D 4, + .bit_offset =3D 0, + .nbits =3D 32, + }, { + .name =3D "tsensor-cpu3", + .offset =3D 0x12c, + .bytes =3D 4, + .bit_offset =3D 0, + .nbits =3D 32, + }, { + .name =3D "tsensor-gpu", + .offset =3D 0x154, + .bytes =3D 4, + .bit_offset =3D 0, + .nbits =3D 32, + }, { + .name =3D "tsensor-mem0", + .offset =3D 0x158, + .bytes =3D 4, + .bit_offset =3D 0, + .nbits =3D 32, + }, { + .name =3D "tsensor-mem1", + .offset =3D 0x15c, + .bytes =3D 4, + .bit_offset =3D 0, + .nbits =3D 32, + }, { + .name =3D "tsensor-pllx", + .offset =3D 0x160, + .bytes =3D 4, + .bit_offset =3D 0, + .nbits =3D 32, + }, +}; + +static const struct nvmem_cell_lookup tegra114_fuse_lookups[] =3D { + { + .nvmem_name =3D "fuse", + .cell_name =3D "xusb-pad-calibration", + .dev_id =3D "7009f000.padctl", + .con_id =3D "calibration", + }, { + .nvmem_name =3D "fuse", + .cell_name =3D "tsensor-common", + .dev_id =3D "700e2000.thermal-sensor", + .con_id =3D "common", + }, { + .nvmem_name =3D "fuse", + .cell_name =3D "tsensor-cpu0", + .dev_id =3D "700e2000.thermal-sensor", + .con_id =3D "cpu0", + }, { + .nvmem_name =3D "fuse", + .cell_name =3D "tsensor-cpu1", + .dev_id =3D "700e2000.thermal-sensor", + .con_id =3D "cpu1", + }, { + .nvmem_name =3D "fuse", + .cell_name =3D "tsensor-cpu2", + .dev_id =3D "700e2000.thermal-sensor", + .con_id =3D "cpu2", + }, { + .nvmem_name =3D "fuse", + .cell_name =3D "tsensor-cpu3", + .dev_id =3D "700e2000.thermal-sensor", + .con_id =3D "cpu3", + }, { + .nvmem_name =3D "fuse", + .cell_name =3D "tsensor-mem0", + .dev_id =3D "700e2000.thermal-sensor", + .con_id =3D "mem0", + }, { + .nvmem_name =3D "fuse", + .cell_name =3D "tsensor-mem1", + .dev_id =3D "700e2000.thermal-sensor", + .con_id =3D "mem1", + }, { + .nvmem_name =3D "fuse", + .cell_name =3D "tsensor-gpu", + .dev_id =3D "700e2000.thermal-sensor", + .con_id =3D "gpu", + }, { + .nvmem_name =3D "fuse", + .cell_name =3D "tsensor-pllx", + .dev_id =3D "700e2000.thermal-sensor", + .con_id =3D "pllx", + }, +}; + static const struct tegra_fuse_info tegra114_fuse_info =3D { .read =3D tegra30_fuse_read, .size =3D 0x2a0, @@ -127,6 +245,10 @@ const struct tegra_fuse_soc tegra114_fuse_soc =3D { .init =3D tegra30_fuse_init, .speedo_init =3D tegra114_init_speedo_data, .info =3D &tegra114_fuse_info, + .lookups =3D tegra114_fuse_lookups, + .num_lookups =3D ARRAY_SIZE(tegra114_fuse_lookups), + .cells =3D tegra114_fuse_cells, + .num_cells =3D ARRAY_SIZE(tegra114_fuse_cells), .soc_attr_group =3D &tegra_soc_attr_group, .clk_suspend_on =3D false, }; --=20 2.48.1 From nobody Sun Oct 5 01:47:27 2025 Received: from mail-ed1-f45.google.com (mail-ed1-f45.google.com [209.85.208.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B82D12DA750; Mon, 11 Aug 2025 08:04:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754899490; cv=none; b=Yy9+ybj5nJ+oodShekjK1NWL5BMoyRiAByduS1CM7HXcOzgzH3pJx39b61bjErtjJdPOBDImrJn+2nSlJ+ZK7myhmh+XtfwGScyNkMAPxQfIesdzWqWM0PvUAx0q+2N2kEAn3qOw1/uThlXc5WDeAtU6kGclDRUMR2PpROTsEA4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754899490; c=relaxed/simple; bh=L4F7l6/zYxQr6YTmwMkqwY0oWd9rKPsyg57GCchM8Aw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=T8Eip5jSEvQOXU4QVnBQmsY451VlF7emnF9VUlklv2jQ5Lip6CDcAB7Aeho3wi0IETA11efFLrrPmy7nc6JQe/Y3sLHKFmwdt57Qf6jIh4ZzUYf4r8r9LSAAExPN6AZeHY96MYhO0XI4hKzoO/kV58omiT/iL6RaDM+xtMf3xRU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=HfTBHuw0; arc=none smtp.client-ip=209.85.208.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="HfTBHuw0" Received: by mail-ed1-f45.google.com with SMTP id 4fb4d7f45d1cf-6180ce2197cso3076696a12.2; Mon, 11 Aug 2025 01:04:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1754899487; x=1755504287; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DSrkbcQygzyv3Mie6iN1oQzHFwmPp08jaxR7FqBTcno=; b=HfTBHuw0cVcQzedrulRPkD6Yv4IpZsB5icmHwQDDltbhB6M9YSZeoBRo5okcbao54t FaxmefqcsLEFfs8Jd6TZvgr0I0JUUahzhCNk3GWccaOZNM9HEcO6DxqqM0Uz5BPAoaHf y5Wr1mubu9Ja3bokG5zr4ICM8wHyHC/yXM8ftMeNM2FYv0V/W4nF+14odFUo+9h12HH/ itIi9cY52GtNEx0t+qJSjVQ1+nAwIpGvqXuAc9wv1TOWr+IJlfGUq44KFN7+1x69WL4y ptZp1MyeOLdpzmqmkXwrv+4JKvU0xQ0jCdE7FX6sFHKmiKjICN+Ua1S5hpiWCK3ZQ/zm mLIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1754899487; x=1755504287; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DSrkbcQygzyv3Mie6iN1oQzHFwmPp08jaxR7FqBTcno=; b=ugUM3Nn5RYdj1Nd//VtZSVQA+nxX6SoFdYucCb2zD1jf/4UekWOM7OiEztjHZZClS3 YkSCz6ml7cvhun5ekOY4qvZsdHDs4cAJTEGeLFoU1W7LJ55fSp5A0xvkh9VBKyADyMdf b/1ulbWljwjQQvfxmJsg/a1PolfWKzM/GKs/4LlpEJE0Mc7+SRzMeUCXStrIGVL0bqnW jZZp0pw4EXIOFInIaO3iiqc8xeCvMpc+phv7O1/rdLOeXEPkW3bf3jgPoAd0eyg4oVq0 EZ2Yvj6oqsR14yfGhCLsn5LeYuRkkxJmQ6ctulbizlvP6bImb6xsIMQ497lawN9HjM8k VChg== X-Forwarded-Encrypted: i=1; AJvYcCVVlIO3Cv1LZVO8vCNaoTs2rW5QvU+DT8tD5cMrZnm4gzFNz8quZyZ7BV716LR8ToEjKUzXyah/sRjDiNQ=@vger.kernel.org, AJvYcCVubPxzTmMQWWyP2NWSKYpg2/ELXZtRBUj/NtZ56GNdy9IHmTM/3CI1h3GHbYSI4kO3dA6e+cAuGcic6WsA@vger.kernel.org, AJvYcCWcqlj0BRHt4cxK4ax1NultGgB9VjQwNpJSu3ayL11wEtuXHtQSrhZ/ETc8hKRnojidPjpWhi+ipK3E@vger.kernel.org X-Gm-Message-State: AOJu0Yy+A7CnaEc9BpghQ4O9g+sMFTrK34rS0nTMUd/MQGxr4Mf4untl pN7OLXLRmGEpUCXS1r2KPVDSSl98Dzy8sX+wsURdkphdBGLBbRC2GAgo X-Gm-Gg: ASbGncsgPkHwsPvN7gGS81Vjbkgtet/jX0ALrWzJkTEbAtLXMIn8A3aVYDfGnjzE36i iQpknjT8gAhJhaIi0YM39Y5afGUQVyvMIGU2Jg0uE79zOQdEekj0boJdKS0+c30iKtXrkS2HSky MqPah1on6q0Um/J0KB1DS7wkWcHWZjf6ml35TPeTwIs8oEbdBPX6WvdNs+F6rC3j39hWb++/g4Z dYhWVWosjL8d89XmEBN2adA7ap3tNQRCSNn64773TJkZ+u/+4Tsv3ar6mx1kRIE+sAdSbuiYnxe Pm96fCvjAs3VkLCfAEKgZTqS7DXaSGToWmXQL5A5xJlt7iH4cHNTS8++mScP/E4CANxeuDoo06A 0uIsSR3e0goiDOA== X-Google-Smtp-Source: AGHT+IHB6M7SGwUJ2tRZfwCzH64DsUsSxsbiwb6G9W2l201EHQHJ4866GRslagyC8SPRnoVDmoE1mw== X-Received: by 2002:a17:907:7855:b0:af9:e1f0:cd33 with SMTP id a640c23a62f3a-af9e1f0d283mr427375966b.2.1754899486800; Mon, 11 Aug 2025 01:04:46 -0700 (PDT) Received: from xeon.. ([188.163.112.70]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-af91a21c081sm1956446566b.97.2025.08.11.01.04.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Aug 2025 01:04:46 -0700 (PDT) From: Svyatoslav Ryhel To: "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Thierry Reding , Thierry Reding , Mikko Perttunen , Jonathan Hunter , Svyatoslav Ryhel Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/5 RESEND] dt-bindings: thermal: Document Tegra114 SOCTHERM Thermal Management System Date: Mon, 11 Aug 2025 11:04:19 +0300 Message-ID: <20250811080422.12300-3-clamor95@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250811080422.12300-1-clamor95@gmail.com> References: <20250811080422.12300-1-clamor95@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Document SOCTHERM Thermal Management System found in the Tegra 4 SoC. Signed-off-by: Svyatoslav Ryhel Acked-by: Rob Herring (Arm) --- .../devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soct= herm.yaml b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-socth= erm.yaml index 19bb1f324183..2fd493fcca63 100644 --- a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.ya= ml +++ b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.ya= ml @@ -18,6 +18,7 @@ description: The SOCTHERM IP block contains thermal senso= rs, support for properties: compatible: enum: + - nvidia,tegra114-soctherm - nvidia,tegra124-soctherm - nvidia,tegra132-soctherm - nvidia,tegra210-soctherm @@ -205,6 +206,7 @@ allOf: compatible: contains: enum: + - nvidia,tegra114-soctherm - nvidia,tegra124-soctherm - nvidia,tegra210-soctherm then: --=20 2.48.1 From nobody Sun Oct 5 01:47:27 2025 Received: from mail-ej1-f44.google.com (mail-ej1-f44.google.com [209.85.218.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D6EF72DA77E; Mon, 11 Aug 2025 08:04:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754899491; cv=none; b=TkhsvbJ2dpEDdNU7u9N/BWKe5mJk9eMXODBuTVjNvD1vM1fmXWXtMaeV1wGocM2TiLPE6axmUbtUDd0fUjfpE4qmXFHEnU6Rrw7i40sZ7BsfuaUlWkTpVctjSGWp7d3nM0N3ZU/08W4isS3Omk1mimo9ZDHOb9onvrj0OXv1V3k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754899491; c=relaxed/simple; bh=TgtXIAr3IGEHvtydhEWp8c7auiDqocGddu9PnevEWY4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=NgEtp0GIqwOcQwjmFpB4FCwgrE46AY5AYM05lfREifE6d+grHz3WQpkw93SX/cdSb7Ng1iKMZn4VBpQ9APzOw/Tbra9t8RqEYb8iKhZL3elmsMyKFfB1c2wmGrIl8IEPQDiOY8FgcD4DhvhjktClw5BFGMJvrRavj6pjfI92Scg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=BAjmLAln; arc=none smtp.client-ip=209.85.218.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="BAjmLAln" Received: by mail-ej1-f44.google.com with SMTP id a640c23a62f3a-af95ecfbd5bso679418266b.1; Mon, 11 Aug 2025 01:04:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1754899488; x=1755504288; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=miny/PoDyZMHIwzlLhKH1Yc3uh/Hp6mfXYgqs94khEQ=; b=BAjmLAln3xIMkz/aoT0q5ClY2FO+XpDRzzOuScEas0Wa6zJkQTCAPQr5QUBfOjYXyy kDFtt+x8ahSihLdARy1g3uFZOnper6EEs/yQEJBYeaiQgEF1y+86k224UDl9zczQpx5b VxVQi4lawDyysummXrKvEfO2Aizk7RvYEJF/tocwl1ZMQXznCRLl/ZLsZdZ8bvM3daz/ J1pHjEkoA300t9cL9xWMgtekjtL42fr1Zrt2mN3VmvcmpMKKB5atLCpOBtNjPdVW8Iey NvBanjPxiJ4Bmf4Zn/W/nSGDeoouWS7wHVbLMYb2PHkwlpwRR6zvlpQ7NeaQd6O/S8RO yV0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1754899488; x=1755504288; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=miny/PoDyZMHIwzlLhKH1Yc3uh/Hp6mfXYgqs94khEQ=; b=TqIM9F6kGU+4rXC0Tp7V29HW8G/IlgWAZVPeTsAeovR9QpPOBc/zSzjy4LExvhFoVh eVPk0rUCB94mw9qHvrpBVTIMgVE3lX6hhH5zlpvH9wfIWS6vJMbNeplpr32v7qJu31UK fGEBOU8y6TsbYK+9GbnpzZivOectbfd+AOBj9v+DcOgMG5trMsL0hcEXpnr3qRxPkK1a HmBw3v5YLUb43e2r4DPkUh6VZpSJt0BE1mjPkT3Z4YdI8xB4N0CMvgtLht3G2AxXKoPW igqXzx++WlWM+8KAUIKmwGJZP43I7Q+iFWHP3/iNX5PeiYGkbQh9ABDmrsBb5FRvRt6Y XG7Q== X-Forwarded-Encrypted: i=1; AJvYcCUs0eCemaSRJ6qnk1f42iT3y+qJ1GwYI5ic6xf2kQXhLO4mFhKiZiGkgVrNhzWVtVRFJMvKv5sg6tcbqIy7@vger.kernel.org, AJvYcCWfv6Ju+UcmMEzr6TVkmn9B3njvO4xdxUSq4iqGAeP7Zsii9l9W3/GznBTIAcAP/i6d43+fbQOUtxoD@vger.kernel.org, AJvYcCXOXvCwpPtw5Pbi/jns33yL5rrJ2mi6VSqSa+NL0Ji2h3Lt5wJrqjOySTTGZX7r4km9aPV/3elltAys8uA=@vger.kernel.org X-Gm-Message-State: AOJu0YwnsTXRSIpmHFyMziteEcZDdN4mIKkeLT/CLb+cEESf5BuykJ7a ooDiYXPCorTLBOWYa4Qt2BAnkdWAtGcMPObqMEFpjkLDwu/mZ8zLieoZ X-Gm-Gg: ASbGncv+h+yDogaThSdq+gSVbuiGCqCcwLWXjIn7aHUoHdJwczgsUemuFDSah5X6fr1 S0arsiAesLnoZhv3oqREKVSp7AeZqkjYO2oKD8c6+/e1FxnXjACRGoTy74t3SFs6/UfGFrpoCej dMXwYzDBo77bxJSReY2mRgZ2xA9XdJhoATj01qARfKRfU9/GOcpGgSXbkTwjJvmqs+H0PqMirwL 2mePj4SgkDiXPdnFwB6v6+rrUowqN6XI4uxOEwfwTYxzUZff1WS5SV45b0/SPBMM6TYTg3V1gzv 76lbod5BorN06/kHUONIBxvXj4FX17LWOtTBK/EmGCoINzKH/JFN0hCypRIEkhQoqqaHZxjHSti FYmb4BaOegx/jJQ== X-Google-Smtp-Source: AGHT+IHIs9owlKlIFRcYdVp75nuuNgVtyha0a+t1N7FB6jqRj5Ux6wTuHvwXUNZxVivGKpT5YEukRg== X-Received: by 2002:a17:907:c08:b0:ad8:9a86:cf52 with SMTP id a640c23a62f3a-af9c640db18mr1123840666b.11.1754899487851; Mon, 11 Aug 2025 01:04:47 -0700 (PDT) Received: from xeon.. ([188.163.112.70]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-af91a21c081sm1956446566b.97.2025.08.11.01.04.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Aug 2025 01:04:47 -0700 (PDT) From: Svyatoslav Ryhel To: "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Thierry Reding , Thierry Reding , Mikko Perttunen , Jonathan Hunter , Svyatoslav Ryhel Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/5 RESEND] thermal: tegra: soctherm-fuse: parametrize configuration further Date: Mon, 11 Aug 2025 11:04:20 +0300 Message-ID: <20250811080422.12300-4-clamor95@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250811080422.12300-1-clamor95@gmail.com> References: <20250811080422.12300-1-clamor95@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Prepare soctherm fuse calibration for Tegra114 support. Signed-off-by: Svyatoslav Ryhel --- drivers/thermal/tegra/soctherm-fuse.c | 33 ++++++++++++++++------- drivers/thermal/tegra/soctherm.h | 13 ++++++++- drivers/thermal/tegra/tegra124-soctherm.c | 8 ++++++ drivers/thermal/tegra/tegra132-soctherm.c | 8 ++++++ drivers/thermal/tegra/tegra210-soctherm.c | 8 ++++++ 5 files changed, 59 insertions(+), 11 deletions(-) diff --git a/drivers/thermal/tegra/soctherm-fuse.c b/drivers/thermal/tegra/= soctherm-fuse.c index 190f95280e0b..3b808c4521b8 100644 --- a/drivers/thermal/tegra/soctherm-fuse.c +++ b/drivers/thermal/tegra/soctherm-fuse.c @@ -9,15 +9,10 @@ =20 #include "soctherm.h" =20 -#define NOMINAL_CALIB_FT 105 -#define NOMINAL_CALIB_CP 25 - #define FUSE_TSENSOR_CALIB_CP_TS_BASE_MASK 0x1fff #define FUSE_TSENSOR_CALIB_FT_TS_BASE_MASK (0x1fff << 13) #define FUSE_TSENSOR_CALIB_FT_TS_BASE_SHIFT 13 =20 -#define FUSE_TSENSOR_COMMON 0x180 - /* * Tegra210: Layout of bits in FUSE_TSENSOR_COMMON: * 3 2 1 0 @@ -44,6 +39,13 @@ * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ * |---------------------------------------------------| SHIFT_CP | * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + * + * Tegra11x: Layout of bits in FUSE_TSENSOR_COMMON aka FUSE_VSENSOR_CALIB: + * 3 2 1 0 + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + * | SHFT_FT | BASE_FT | SHIFT_CP | BASE_CP | + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ */ =20 #define CALIB_COEFFICIENT 1000000LL @@ -77,7 +79,7 @@ int tegra_calc_shared_calib(const struct tegra_soctherm_f= use *tfuse, s32 shifted_cp, shifted_ft; int err; =20 - err =3D tegra_fuse_readl(FUSE_TSENSOR_COMMON, &val); + err =3D tegra_fuse_readl(tfuse->fuse_common_reg, &val); if (err) return err; =20 @@ -88,7 +90,7 @@ int tegra_calc_shared_calib(const struct tegra_soctherm_f= use *tfuse, =20 shifted_ft =3D (val & tfuse->fuse_shift_ft_mask) >> tfuse->fuse_shift_ft_shift; - shifted_ft =3D sign_extend32(shifted_ft, 4); + shifted_ft =3D sign_extend32(shifted_ft, tfuse->fuse_shift_ft_bits); =20 if (tfuse->fuse_spare_realignment) { err =3D tegra_fuse_readl(tfuse->fuse_spare_realignment, &val); @@ -96,10 +98,21 @@ int tegra_calc_shared_calib(const struct tegra_soctherm= _fuse *tfuse, return err; } =20 - shifted_cp =3D sign_extend32(val, 5); + shifted_cp =3D (val & tfuse->fuse_shift_cp_mask) >> + tfuse->fuse_shift_cp_shift; + shifted_cp =3D sign_extend32(val, tfuse->fuse_shift_cp_bits); =20 - shared->actual_temp_cp =3D 2 * NOMINAL_CALIB_CP + shifted_cp; - shared->actual_temp_ft =3D 2 * NOMINAL_CALIB_FT + shifted_ft; + shared->actual_temp_cp =3D 2 * tfuse->nominal_calib_cp + shifted_cp; + shared->actual_temp_ft =3D 2 * tfuse->nominal_calib_ft + shifted_ft; + + /* + * Tegra114 provides fuse thermal corrections in 0.5C while expected + * precision should be 1C + */ + if (tfuse->lower_precision) { + shared->actual_temp_cp /=3D 2; + shared->actual_temp_ft /=3D 2; + } =20 return 0; } diff --git a/drivers/thermal/tegra/soctherm.h b/drivers/thermal/tegra/socth= erm.h index 70501e73d586..6c0e0cc594a5 100644 --- a/drivers/thermal/tegra/soctherm.h +++ b/drivers/thermal/tegra/soctherm.h @@ -56,6 +56,13 @@ #define SENSOR_TEMP2_MEM_TEMP_MASK (0xffff << 16) #define SENSOR_TEMP2_PLLX_TEMP_MASK 0xffff =20 +#define NOMINAL_CALIB_FT 105 +#define T114X_CALIB_FT 90 +#define NOMINAL_CALIB_CP 25 + +#define FUSE_VSENSOR_CALIB 0x08c +#define FUSE_TSENSOR_COMMON 0x180 + /** * struct tegra_tsensor_group - SOC_THERM sensor group data * @name: short name of the temperature sensor group @@ -109,9 +116,13 @@ struct tsensor_group_thermtrips { =20 struct tegra_soctherm_fuse { u32 fuse_base_cp_mask, fuse_base_cp_shift; + u32 fuse_shift_cp_mask, fuse_shift_cp_shift; u32 fuse_base_ft_mask, fuse_base_ft_shift; u32 fuse_shift_ft_mask, fuse_shift_ft_shift; - u32 fuse_spare_realignment; + u32 fuse_shift_cp_bits, fuse_shift_ft_bits; + u32 fuse_common_reg, fuse_spare_realignment; + u32 nominal_calib_cp, nominal_calib_ft; + bool lower_precision; }; =20 struct tsensor_shared_calib { diff --git a/drivers/thermal/tegra/tegra124-soctherm.c b/drivers/thermal/te= gra/tegra124-soctherm.c index 20ad27f4d1a1..dd4dd7e9014d 100644 --- a/drivers/thermal/tegra/tegra124-soctherm.c +++ b/drivers/thermal/tegra/tegra124-soctherm.c @@ -200,11 +200,19 @@ static const struct tegra_tsensor tegra124_tsensors[]= =3D { static const struct tegra_soctherm_fuse tegra124_soctherm_fuse =3D { .fuse_base_cp_mask =3D 0x3ff, .fuse_base_cp_shift =3D 0, + .fuse_shift_cp_mask =3D 0x1f, + .fuse_shift_cp_shift =3D 0, .fuse_base_ft_mask =3D 0x7ff << 10, .fuse_base_ft_shift =3D 10, .fuse_shift_ft_mask =3D 0x1f << 21, .fuse_shift_ft_shift =3D 21, + .fuse_shift_cp_bits =3D 5, + .fuse_shift_ft_bits =3D 4, + .fuse_common_reg =3D FUSE_TSENSOR_COMMON, .fuse_spare_realignment =3D 0x1fc, + .nominal_calib_cp =3D NOMINAL_CALIB_CP, + .nominal_calib_ft =3D NOMINAL_CALIB_FT, + .lower_precision =3D false, }; =20 const struct tegra_soctherm_soc tegra124_soctherm =3D { diff --git a/drivers/thermal/tegra/tegra132-soctherm.c b/drivers/thermal/te= gra/tegra132-soctherm.c index b76308fdad9e..926836426688 100644 --- a/drivers/thermal/tegra/tegra132-soctherm.c +++ b/drivers/thermal/tegra/tegra132-soctherm.c @@ -200,11 +200,19 @@ static struct tegra_tsensor tegra132_tsensors[] =3D { static const struct tegra_soctherm_fuse tegra132_soctherm_fuse =3D { .fuse_base_cp_mask =3D 0x3ff, .fuse_base_cp_shift =3D 0, + .fuse_shift_cp_mask =3D 0x1f, + .fuse_shift_cp_shift =3D 0, .fuse_base_ft_mask =3D 0x7ff << 10, .fuse_base_ft_shift =3D 10, .fuse_shift_ft_mask =3D 0x1f << 21, .fuse_shift_ft_shift =3D 21, + .fuse_shift_cp_bits =3D 5, + .fuse_shift_ft_bits =3D 4, + .fuse_common_reg =3D FUSE_TSENSOR_COMMON, .fuse_spare_realignment =3D 0x1fc, + .nominal_calib_cp =3D NOMINAL_CALIB_CP, + .nominal_calib_ft =3D NOMINAL_CALIB_FT, + .lower_precision =3D false, }; =20 const struct tegra_soctherm_soc tegra132_soctherm =3D { diff --git a/drivers/thermal/tegra/tegra210-soctherm.c b/drivers/thermal/te= gra/tegra210-soctherm.c index d0ff793f18c5..2877a7b43f2a 100644 --- a/drivers/thermal/tegra/tegra210-soctherm.c +++ b/drivers/thermal/tegra/tegra210-soctherm.c @@ -201,11 +201,19 @@ static const struct tegra_tsensor tegra210_tsensors[]= =3D { static const struct tegra_soctherm_fuse tegra210_soctherm_fuse =3D { .fuse_base_cp_mask =3D 0x3ff << 11, .fuse_base_cp_shift =3D 11, + .fuse_shift_cp_mask =3D 0x1f, + .fuse_shift_cp_shift =3D 0, .fuse_base_ft_mask =3D 0x7ff << 21, .fuse_base_ft_shift =3D 21, .fuse_shift_ft_mask =3D 0x1f << 6, .fuse_shift_ft_shift =3D 6, + .fuse_shift_cp_bits =3D 5, + .fuse_shift_ft_bits =3D 4, + .fuse_common_reg =3D FUSE_TSENSOR_COMMON, .fuse_spare_realignment =3D 0, + .nominal_calib_cp =3D NOMINAL_CALIB_CP, + .nominal_calib_ft =3D NOMINAL_CALIB_FT, + .lower_precision =3D false, }; =20 static struct tsensor_group_thermtrips tegra210_tsensor_thermtrips[] =3D { --=20 2.48.1 From nobody Sun Oct 5 01:47:27 2025 Received: from mail-ej1-f41.google.com (mail-ej1-f41.google.com [209.85.218.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 18DF52DC321; Mon, 11 Aug 2025 08:04:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754899493; cv=none; b=fEnkMSTdwhWB/DMNgwqdOiWtl1oauFLIUscCrOXfxX97Bi4yx/BvUHhNKarnlVOc0CgFk4W9INe2NTkn+VjSiUagzOYH2ST7cdG5Bbl7tu/VPh0f/9D1yDH4fXlC+H4K/TSe+7E5kMyrSAWYdKkX87YlFrwjf5yO7wPDI05qgZ8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754899493; c=relaxed/simple; bh=HN4x+rGbwFeeGQ9jkNrN2rjGKUNghNgRdAhOiIYBkVg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=l0ka4++iZ7HCZVI/X5SKYllL37wRKJW31AEqJH6tFNnoZ6OZtJWGyFDh2Kby3ypD/7U45c/OvLnOKLkfpTMclKaHfa+5xpX2XEkwSLyQcMegfooYifcbj57GFgY7XJf0dLRU8uLpwnPxC1jMLHKoP8ax49/lRU1GtVDIjzzPwM0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=jj1kiqpo; arc=none smtp.client-ip=209.85.218.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="jj1kiqpo" Received: by mail-ej1-f41.google.com with SMTP id a640c23a62f3a-af66d49daffso677587266b.1; Mon, 11 Aug 2025 01:04:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1754899489; x=1755504289; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=n161/sPnFiwcbLYbE50unUbqsgVzUjhparEDLVM1oPc=; b=jj1kiqpofyar/afsANE4Q/nITEk55ZclvArtmxifHFOOZKuj6dwDkpP4R2Ty4j1Inu jMYxioBUzsYHtA8Mtqa2ozHZUFKP4uIgOzTROrylrGpnNpqSxX2EElfL90Myy+4VMTBO HGMU+/6qxp4IT1u3wSjdIz1povDzmsKKN0ldAwDFOh0j0fOu1FrdszAC+k/USzRQtz5j gE96Tclu21GhP2KjdDDT9O+iozVgcPj7r/auZmolqX123yrYxxqz7fmS4sj7fV1G6T/4 D8iW1wt/bt866W3xNEeGY58elfqHx89uWRMzTgAAMMqnr4qA1J+R0YULKtCryu0PIFWd yvjQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1754899489; x=1755504289; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=n161/sPnFiwcbLYbE50unUbqsgVzUjhparEDLVM1oPc=; b=bSIsuVpfJFyODrE6HYHBD/+9afcYieDnBE9fAocKvRfoRPy0YjVVu2xYwiXaaFivG0 YgAN7Ixzgn6xzSOtp5iLa8mSaEQVYTdWc9r6Vq6mmpRpYa4v6ryUEa63u+ypETkNcVpS o7lTTOzyTHuUfaNU+zmpaxnkcD+JXIVB3vYOT4ecUanB8gaIUGq1uNW/rFlngMArT8UT HJOUIDwzpaK+NcQy2vWyx9klewBrPxLZFIWGzFWvDLYDo3XcSSv4+OBx83nxgg/Omo+I jplQN1rm4GdKi/RAUbOb6E5wRJ9rvevV1o2ITxmP+WVff37300e0+eDCP2QRGvg9u0JM /MTQ== X-Forwarded-Encrypted: i=1; AJvYcCU7YG/AUQTXbh8b73uzhHa+sXF6vMjsD7x2cI4i5D2leRQmCOiH3H52JvlASxiq3H1L9x7jDXCNCBcLPqg=@vger.kernel.org, AJvYcCV7+LTjBUiZzyodOAHsFu+zK8irEywNKsL57x+TaE460Dl1f7baSkZU4SM62cn7drBtLtFG9jDs+KVqdvW4@vger.kernel.org, AJvYcCWikfqNcjPOT3HC+/NbAia7GqAZn09W2PLHw1HazPLNBjlt2VqN2eesGfsnw7uFMGVTpfIudM4b/Ztt@vger.kernel.org X-Gm-Message-State: AOJu0Yyw4hSu2q8gRncxHxFJ3OjxLtcKeSxs5DTYi27RN/SSNzEuL7vo 3xxm1zHVquQbO+FaT+4og1GBotpcWVJi+pFMRI2pbWIkWbEd/DFgcPmQNoPjJg== X-Gm-Gg: ASbGnctkvXjLdUY/POfcFVSoFReKAgxcVw6Z2WJcn8RGCnH4IVkSZi+b307exmRmNy3 VT++cLVMoF4kBD3Lz81onfOXEuY/TJB6ZZ5SKNXyz+7dx6uAlIsyx6tSpQk9RhaKindENILiWmm CFeXHzfeWj+5inBLOvV0a4NCxYqj/qf8WQVWlfSqTFvMo9s051ve6/Pg+Bk+rek7bI6sHBn+CO/ D2Vt7TKlb8oNBptc+q5HHHTCw1jjjIlyl8auX0Z3kLol29tyxi6SNdmBlR6CvFLMEADC7dOamQ9 2/dLDcSu5//gM5PlzynPBLCMdSFsqbM6r2b4iwHt2VkcSjsFGkUpt5oFptgfYdhzckGGJIp6SxY IBWzZgZ6zqoWXVQ== X-Google-Smtp-Source: AGHT+IHqwlWXZJtt2RLmupdbFuyk8J4OORK/CaAEltWh3KfiYwEGlgLXMbcbvo7HBmLj2eurPR2/Uw== X-Received: by 2002:a17:907:d18:b0:ae3:24c:6a21 with SMTP id a640c23a62f3a-af9c643f89bmr997475066b.26.1754899488926; Mon, 11 Aug 2025 01:04:48 -0700 (PDT) Received: from xeon.. ([188.163.112.70]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-af91a21c081sm1956446566b.97.2025.08.11.01.04.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Aug 2025 01:04:48 -0700 (PDT) From: Svyatoslav Ryhel To: "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Thierry Reding , Thierry Reding , Mikko Perttunen , Jonathan Hunter , Svyatoslav Ryhel Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/5 RESEND] thermal: tegra: add Tegra114 specific SOCTHERM driver Date: Mon, 11 Aug 2025 11:04:21 +0300 Message-ID: <20250811080422.12300-5-clamor95@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250811080422.12300-1-clamor95@gmail.com> References: <20250811080422.12300-1-clamor95@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add Tegra114 specific SOCTHERM driver. Signed-off-by: Svyatoslav Ryhel --- drivers/thermal/tegra/Makefile | 1 + drivers/thermal/tegra/soctherm.c | 6 + drivers/thermal/tegra/soctherm.h | 4 + drivers/thermal/tegra/tegra114-soctherm.c | 213 ++++++++++++++++++++++ 4 files changed, 224 insertions(+) create mode 100644 drivers/thermal/tegra/tegra114-soctherm.c diff --git a/drivers/thermal/tegra/Makefile b/drivers/thermal/tegra/Makefile index eb27d194c583..9b3e91f7fb97 100644 --- a/drivers/thermal/tegra/Makefile +++ b/drivers/thermal/tegra/Makefile @@ -4,6 +4,7 @@ obj-$(CONFIG_TEGRA_BPMP_THERMAL) +=3D tegra-bpmp-thermal.o obj-$(CONFIG_TEGRA30_TSENSOR) +=3D tegra30-tsensor.o =20 tegra-soctherm-y :=3D soctherm.o soctherm-fuse.o +tegra-soctherm-$(CONFIG_ARCH_TEGRA_114_SOC) +=3D tegra114-soctherm.o tegra-soctherm-$(CONFIG_ARCH_TEGRA_124_SOC) +=3D tegra124-soctherm.o tegra-soctherm-$(CONFIG_ARCH_TEGRA_132_SOC) +=3D tegra132-soctherm.o tegra-soctherm-$(CONFIG_ARCH_TEGRA_210_SOC) +=3D tegra210-soctherm.o diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/socth= erm.c index 2c5ddf0db40c..7bdab2add7af 100644 --- a/drivers/thermal/tegra/soctherm.c +++ b/drivers/thermal/tegra/soctherm.c @@ -2048,6 +2048,12 @@ static void soctherm_init(struct platform_device *pd= ev) } =20 static const struct of_device_id tegra_soctherm_of_match[] =3D { +#ifdef CONFIG_ARCH_TEGRA_114_SOC + { + .compatible =3D "nvidia,tegra114-soctherm", + .data =3D &tegra114_soctherm, + }, +#endif #ifdef CONFIG_ARCH_TEGRA_124_SOC { .compatible =3D "nvidia,tegra124-soctherm", diff --git a/drivers/thermal/tegra/soctherm.h b/drivers/thermal/tegra/socth= erm.h index 6c0e0cc594a5..75ee2a520886 100644 --- a/drivers/thermal/tegra/soctherm.h +++ b/drivers/thermal/tegra/soctherm.h @@ -148,6 +148,10 @@ int tegra_calc_tsensor_calib(const struct tegra_tsenso= r *sensor, const struct tsensor_shared_calib *shared, u32 *calib); =20 +#ifdef CONFIG_ARCH_TEGRA_114_SOC +extern const struct tegra_soctherm_soc tegra114_soctherm; +#endif + #ifdef CONFIG_ARCH_TEGRA_124_SOC extern const struct tegra_soctherm_soc tegra124_soctherm; #endif diff --git a/drivers/thermal/tegra/tegra114-soctherm.c b/drivers/thermal/te= gra/tegra114-soctherm.c new file mode 100644 index 000000000000..eca65ec6f8c1 --- /dev/null +++ b/drivers/thermal/tegra/tegra114-soctherm.c @@ -0,0 +1,213 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2024, Svyatoslav Ryhel + */ + +#include +#include + +#include + +#include "soctherm.h" + +#define TEGRA114_THERMTRIP_ANY_EN_MASK (0x1 << 28) +#define TEGRA114_THERMTRIP_MEM_EN_MASK (0x1 << 27) +#define TEGRA114_THERMTRIP_GPU_EN_MASK (0x1 << 26) +#define TEGRA114_THERMTRIP_CPU_EN_MASK (0x1 << 25) +#define TEGRA114_THERMTRIP_TSENSE_EN_MASK (0x1 << 24) +#define TEGRA114_THERMTRIP_GPUMEM_THRESH_MASK (0xff << 16) +#define TEGRA114_THERMTRIP_CPU_THRESH_MASK (0xff << 8) +#define TEGRA114_THERMTRIP_TSENSE_THRESH_MASK 0xff + +#define TEGRA114_THERMCTL_LVL0_UP_THRESH_MASK (0xff << 17) +#define TEGRA114_THERMCTL_LVL0_DN_THRESH_MASK (0xff << 9) + +#define TEGRA114_THRESH_GRAIN 1000 +#define TEGRA114_BPTT 8 + +static const struct tegra_tsensor_configuration tegra114_tsensor_config = =3D { + .tall =3D 16300, + .tiddq_en =3D 1, + .ten_count =3D 1, + .tsample =3D 163, + .tsample_ate =3D 655, +}; + +static const struct tegra_tsensor_group tegra114_tsensor_group_cpu =3D { + .id =3D TEGRA124_SOCTHERM_SENSOR_CPU, + .name =3D "cpu", + .sensor_temp_offset =3D SENSOR_TEMP1, + .sensor_temp_mask =3D SENSOR_TEMP1_CPU_TEMP_MASK, + .pdiv =3D 10, + .pdiv_ate =3D 10, + .pdiv_mask =3D SENSOR_PDIV_CPU_MASK, + .pllx_hotspot_diff =3D 10, + .pllx_hotspot_mask =3D SENSOR_HOTSPOT_CPU_MASK, + .thermtrip_any_en_mask =3D TEGRA114_THERMTRIP_ANY_EN_MASK, + .thermtrip_enable_mask =3D TEGRA114_THERMTRIP_CPU_EN_MASK, + .thermtrip_threshold_mask =3D TEGRA114_THERMTRIP_CPU_THRESH_MASK, + .thermctl_isr_mask =3D THERM_IRQ_CPU_MASK, + .thermctl_lvl0_offset =3D THERMCTL_LEVEL0_GROUP_CPU, + .thermctl_lvl0_up_thresh_mask =3D TEGRA114_THERMCTL_LVL0_UP_THRESH_MASK, + .thermctl_lvl0_dn_thresh_mask =3D TEGRA114_THERMCTL_LVL0_DN_THRESH_MASK, +}; + +static const struct tegra_tsensor_group tegra114_tsensor_group_gpu =3D { + .id =3D TEGRA124_SOCTHERM_SENSOR_GPU, + .name =3D "gpu", + .sensor_temp_offset =3D SENSOR_TEMP1, + .sensor_temp_mask =3D SENSOR_TEMP1_GPU_TEMP_MASK, + .pdiv =3D 10, + .pdiv_ate =3D 10, + .pdiv_mask =3D SENSOR_PDIV_GPU_MASK, + .pllx_hotspot_diff =3D 5, + .pllx_hotspot_mask =3D SENSOR_HOTSPOT_GPU_MASK, + .thermtrip_any_en_mask =3D TEGRA114_THERMTRIP_ANY_EN_MASK, + .thermtrip_enable_mask =3D TEGRA114_THERMTRIP_GPU_EN_MASK, + .thermtrip_threshold_mask =3D TEGRA114_THERMTRIP_GPUMEM_THRESH_MASK, + .thermctl_isr_mask =3D THERM_IRQ_GPU_MASK, + .thermctl_lvl0_offset =3D THERMCTL_LEVEL0_GROUP_GPU, + .thermctl_lvl0_up_thresh_mask =3D TEGRA114_THERMCTL_LVL0_UP_THRESH_MASK, + .thermctl_lvl0_dn_thresh_mask =3D TEGRA114_THERMCTL_LVL0_DN_THRESH_MASK, +}; + +static const struct tegra_tsensor_group tegra114_tsensor_group_pll =3D { + .id =3D TEGRA124_SOCTHERM_SENSOR_PLLX, + .name =3D "pll", + .sensor_temp_offset =3D SENSOR_TEMP2, + .sensor_temp_mask =3D SENSOR_TEMP2_PLLX_TEMP_MASK, + .pdiv =3D 10, + .pdiv_ate =3D 10, + .pdiv_mask =3D SENSOR_PDIV_PLLX_MASK, + .thermtrip_any_en_mask =3D TEGRA114_THERMTRIP_ANY_EN_MASK, + .thermtrip_enable_mask =3D TEGRA114_THERMTRIP_TSENSE_EN_MASK, + .thermtrip_threshold_mask =3D TEGRA114_THERMTRIP_TSENSE_THRESH_MASK, + .thermctl_isr_mask =3D THERM_IRQ_TSENSE_MASK, + .thermctl_lvl0_offset =3D THERMCTL_LEVEL0_GROUP_TSENSE, + .thermctl_lvl0_up_thresh_mask =3D TEGRA114_THERMCTL_LVL0_UP_THRESH_MASK, + .thermctl_lvl0_dn_thresh_mask =3D TEGRA114_THERMCTL_LVL0_DN_THRESH_MASK, +}; + +static const struct tegra_tsensor_group tegra114_tsensor_group_mem =3D { + .id =3D TEGRA124_SOCTHERM_SENSOR_MEM, + .name =3D "mem", + .sensor_temp_offset =3D SENSOR_TEMP2, + .sensor_temp_mask =3D SENSOR_TEMP2_MEM_TEMP_MASK, + .pdiv =3D 10, + .pdiv_ate =3D 10, + .pdiv_mask =3D SENSOR_PDIV_MEM_MASK, + .pllx_hotspot_diff =3D 0, + .pllx_hotspot_mask =3D SENSOR_HOTSPOT_MEM_MASK, + .thermtrip_any_en_mask =3D TEGRA114_THERMTRIP_ANY_EN_MASK, + .thermtrip_enable_mask =3D TEGRA114_THERMTRIP_MEM_EN_MASK, + .thermtrip_threshold_mask =3D TEGRA114_THERMTRIP_GPUMEM_THRESH_MASK, + .thermctl_isr_mask =3D THERM_IRQ_MEM_MASK, + .thermctl_lvl0_offset =3D THERMCTL_LEVEL0_GROUP_MEM, + .thermctl_lvl0_up_thresh_mask =3D TEGRA114_THERMCTL_LVL0_UP_THRESH_MASK, + .thermctl_lvl0_dn_thresh_mask =3D TEGRA114_THERMCTL_LVL0_DN_THRESH_MASK, +}; + +static const struct tegra_tsensor_group *tegra114_tsensor_groups[] =3D { + &tegra114_tsensor_group_cpu, + &tegra114_tsensor_group_gpu, + &tegra114_tsensor_group_pll, + &tegra114_tsensor_group_mem, +}; + +static const struct tegra_tsensor tegra114_tsensors[] =3D { + { + .name =3D "cpu0", + .base =3D 0xc0, + .config =3D &tegra114_tsensor_config, + .calib_fuse_offset =3D 0x098, + .fuse_corr_alpha =3D 1196400, + .fuse_corr_beta =3D -13600000, + .group =3D &tegra114_tsensor_group_cpu, + }, { + .name =3D "cpu1", + .base =3D 0xe0, + .config =3D &tegra114_tsensor_config, + .calib_fuse_offset =3D 0x084, + .fuse_corr_alpha =3D 1196400, + .fuse_corr_beta =3D -13600000, + .group =3D &tegra114_tsensor_group_cpu, + }, { + .name =3D "cpu2", + .base =3D 0x100, + .config =3D &tegra114_tsensor_config, + .calib_fuse_offset =3D 0x088, + .fuse_corr_alpha =3D 1196400, + .fuse_corr_beta =3D -13600000, + .group =3D &tegra114_tsensor_group_cpu, + }, { + .name =3D "cpu3", + .base =3D 0x120, + .config =3D &tegra114_tsensor_config, + .calib_fuse_offset =3D 0x12c, + .fuse_corr_alpha =3D 1196400, + .fuse_corr_beta =3D -13600000, + .group =3D &tegra114_tsensor_group_cpu, + }, { + .name =3D "mem0", + .base =3D 0x140, + .config =3D &tegra114_tsensor_config, + .calib_fuse_offset =3D 0x158, + .fuse_corr_alpha =3D 1000000, + .fuse_corr_beta =3D 0, + .group =3D &tegra114_tsensor_group_mem, + }, { + .name =3D "mem1", + .base =3D 0x160, + .config =3D &tegra114_tsensor_config, + .calib_fuse_offset =3D 0x15c, + .fuse_corr_alpha =3D 1000000, + .fuse_corr_beta =3D 0, + .group =3D &tegra114_tsensor_group_mem, + }, { + .name =3D "gpu", + .base =3D 0x180, + .config =3D &tegra114_tsensor_config, + .calib_fuse_offset =3D 0x154, + .fuse_corr_alpha =3D 1124500, + .fuse_corr_beta =3D -9793100, + .group =3D &tegra114_tsensor_group_gpu, + }, { + .name =3D "pllx", + .base =3D 0x1a0, + .config =3D &tegra114_tsensor_config, + .calib_fuse_offset =3D 0x160, + .fuse_corr_alpha =3D 1224200, + .fuse_corr_beta =3D -14665000, + .group =3D &tegra114_tsensor_group_pll, + }, +}; + +static const struct tegra_soctherm_fuse tegra114_soctherm_fuse =3D { + .fuse_base_cp_mask =3D 0x3ff, + .fuse_base_cp_shift =3D 0, + .fuse_shift_cp_mask =3D 0x3f << 10, + .fuse_shift_cp_shift =3D 10, + .fuse_base_ft_mask =3D 0x7ff << 16, + .fuse_base_ft_shift =3D 16, + .fuse_shift_ft_mask =3D 0x1f << 27, + .fuse_shift_ft_shift =3D 27, + .fuse_shift_cp_bits =3D 6, + .fuse_shift_ft_bits =3D 5, + .fuse_common_reg =3D FUSE_VSENSOR_CALIB, + .fuse_spare_realignment =3D 0, + .nominal_calib_cp =3D NOMINAL_CALIB_CP, + .nominal_calib_ft =3D T114X_CALIB_FT, + .lower_precision =3D true, +}; + +const struct tegra_soctherm_soc tegra114_soctherm =3D { + .tsensors =3D tegra114_tsensors, + .num_tsensors =3D ARRAY_SIZE(tegra114_tsensors), + .ttgs =3D tegra114_tsensor_groups, + .num_ttgs =3D ARRAY_SIZE(tegra114_tsensor_groups), + .tfuse =3D &tegra114_soctherm_fuse, + .thresh_grain =3D TEGRA114_THRESH_GRAIN, + .bptt =3D TEGRA114_BPTT, + .use_ccroc =3D false, +}; --=20 2.48.1 From nobody Sun Oct 5 01:47:27 2025 Received: from mail-ej1-f46.google.com (mail-ej1-f46.google.com [209.85.218.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 08D392DC341; Mon, 11 Aug 2025 08:04:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754899493; cv=none; b=hT4fhpYkQOd7F583GDOs+j/Jga7V9qcGQF/ljkqPV9gSe64aF4L1UfQV4PLxWj4bd7x3dHXeEbKZurCbRmmlS5WObdw0OASEPRcn+BjgREO5e+++QLA7TouJn4Zk5bJpqAbU378XILEMj4Vl34q60aRw3dZjN+cbGS6e5XGP5lE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754899493; c=relaxed/simple; bh=RbHojCbVC/Hq/OqnG628eJg4f5VkM1uFiH8D9O341j4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=trTWe/OKCNK9NtKmWGmWIIIoL3efOuZUbHSQsR1dpsxEM5yXntRYkMzXHKTy57ARJcaEub8kIPHMHwXqmqFK8NsDFkZgn2cmbALR9auOH8w2zosPLFjtvC9edkSfEKh8SYtGnHfoFOlN5seJve+ntB13bVD+Hj8H4gsiEb9f9Lg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=R+2obA3X; arc=none smtp.client-ip=209.85.218.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="R+2obA3X" Received: by mail-ej1-f46.google.com with SMTP id a640c23a62f3a-af949bdf36cso644662566b.0; Mon, 11 Aug 2025 01:04:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1754899490; x=1755504290; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xMm7DyHGHXbdPdoaT3XLOxvCXV+6TZVhfFm+ZVxjYW0=; b=R+2obA3XcQLW/smPe4vCqc97FwGdxnjR21w8f4zwxRKWmfAQibHvTzlxcaodcCQ3H7 NSg2UF4dGvGx9/k52xSHRFg6is41gN9P17GuDfNTiC1IQ/X7L05pljqhbQTgVDDvoG7P X1TatK+f6w6LTpJMCT5RkautHJQYpccM9uCBdeV+NKOWapLFe6TmWvSARpiRGqjsfey1 y+eteOsHDrK1yX2qmpcmc+e/+PubMbiS2P0LKNgZFzTQprFypwykF44ktuoO8sSg0JzN NT6jgrHDnpeTDjSUgqgJQYDQtalB4TszEeKFf0s3RIomqIQNtwJrtI6gKFyJV3qYJgpo uK6A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1754899490; x=1755504290; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xMm7DyHGHXbdPdoaT3XLOxvCXV+6TZVhfFm+ZVxjYW0=; b=KOwJ8VKqJUHJATwd+39EtxFcOC0CFAYD6Muab1xrbweUaE5kAYUKCeIIf4rimkBZ/4 1eIgl9W7FFvr2KmeLuvbdv6DevkqpLysw0BHRtLbU2DieksA0sTHbGbH+kGhDXUIYWX9 11Dp3JKTls9dghA4pynRQaWr4/Lh8u92GwykjSqOhoId3LRcg4SgZfVDF0MwQNs6MAIL oWhCl74IKG0w/m0X5PEP4fdQddws99uXQod4vhMQJqqmkODN2yqY74704nV+kD8PzCVh Fn9TBEhMMGmnzFZbK/WQcQGklQBdltl9aCkbYLaWz10Bil8+/MDK43V5A2OvYShU8UP0 T/fA== X-Forwarded-Encrypted: i=1; AJvYcCVCkciEm/cqD7eAeRPh01tjuGWwzcB5pi8F2Bg8ORq2MiG2Z9y9NeF7z/nwXMDS0aYZrTyK5ooIxp1Ffsbu@vger.kernel.org, AJvYcCVIqGIyOOFCtiKdppyq+gWWhv47ygfCeGsCW4or/JgILESgk+vW13iCPwxRM1UGabFuQEhtye7ugQbtSsg=@vger.kernel.org, AJvYcCVyrGFe97vq1i1sBagBOGGaaLMmR7t2xfwJBnL7gSH2+kgdvcgxc4XTqpDLDVeH1+IzAKWpTH/L8abd@vger.kernel.org X-Gm-Message-State: AOJu0YzN55dE+D/Ypx3+wFMsJk4MOXwerpSDy05EuZEvro5myfldUsea cBo8YyU3Yq0oDduybbxoFmr0e+a0ngrDoth66m+3b6WVJTYWsrHmTo1WRl491g== X-Gm-Gg: ASbGncskVvFwVMLJqNpAvkhug+HVHJ5kyJFdGlaW061bu1VaCgDh7mRda1NLugyf6gF rWoACE1ISlFjtrZeQ66EMTyII89LaijmZNeO1x5IAAsN6qx6zsep1PfM1+WhTAUBVf1zE5hH7q0 6bvrsrou3SYz2KS21qdLpY1pPagyj8QZIYa1yDMJpDo3SmYtgSR/PvSOdqFNOsiw13KaUE2NMcR 4N9Ipw9ARogteTVJaiduRKxtDN/+NzkWO1bAEbXKB4wWGZTod9P+0lWQz7lV4ID2/XOEcMk8o7k AlReqPN0QeKgd6fiYnZnLEkqJVOit2kbspAUUESoN1yBPp9pLXDHFRrbNEkwfoYUSya1LyFNYro 85fqLhqAB3t5TeA== X-Google-Smtp-Source: AGHT+IEKBOwgF0Ougql9krLNeAJjJZxwKSUYe0nyazt7AroKIiMiI6rgNtqZdtvsF7sZSNmkZ+X14Q== X-Received: by 2002:a17:907:7f90:b0:af2:9a9d:2857 with SMTP id a640c23a62f3a-af9c6375b94mr1083286366b.3.1754899490106; Mon, 11 Aug 2025 01:04:50 -0700 (PDT) Received: from xeon.. ([188.163.112.70]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-af91a21c081sm1956446566b.97.2025.08.11.01.04.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Aug 2025 01:04:49 -0700 (PDT) From: Svyatoslav Ryhel To: "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Thierry Reding , Thierry Reding , Mikko Perttunen , Jonathan Hunter , Svyatoslav Ryhel Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 5/5 RESEND] ARM: tegra: Add SOCTHERM support on Tegra114 Date: Mon, 11 Aug 2025 11:04:22 +0300 Message-ID: <20250811080422.12300-6-clamor95@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250811080422.12300-1-clamor95@gmail.com> References: <20250811080422.12300-1-clamor95@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add SOCTHERM and thermal zones nodes into common Tegra 4 device tree. Signed-off-by: Svyatoslav Ryhel --- arch/arm/boot/dts/nvidia/tegra114.dtsi | 197 +++++++++++++++++++++++++ 1 file changed, 197 insertions(+) diff --git a/arch/arm/boot/dts/nvidia/tegra114.dtsi b/arch/arm/boot/dts/nvi= dia/tegra114.dtsi index 3ee51d7f3935..cb30a7948e19 100644 --- a/arch/arm/boot/dts/nvidia/tegra114.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra114.dtsi @@ -5,6 +5,7 @@ #include #include #include +#include #include =20 / { @@ -694,6 +695,46 @@ mipi: mipi@700e3000 { #nvidia,mipi-calibrate-cells =3D <1>; }; =20 + soctherm: thermal-sensor@700e2000 { + compatible =3D "nvidia,tegra114-soctherm"; + reg =3D <0x700e2000 0x600>, /* SOC_THERM reg_base */ + <0x60006000 0x400>; /* CAR reg_base */ + reg-names =3D "soctherm-reg", "car-reg"; + interrupts =3D , + ; + interrupt-names =3D "thermal", "edp"; + clocks =3D <&tegra_car TEGRA114_CLK_TSENSOR>, + <&tegra_car TEGRA114_CLK_SOC_THERM>; + clock-names =3D "tsensor", "soctherm"; + resets =3D <&tegra_car 78>; + reset-names =3D "soctherm"; + + assigned-clocks =3D <&tegra_car TEGRA114_CLK_TSENSOR>, + <&tegra_car TEGRA114_CLK_SOC_THERM>; + assigned-clock-rates =3D <500000>, <51000000>; + + assigned-clock-parents =3D <&tegra_car TEGRA114_CLK_CLK_M>, + <&tegra_car TEGRA114_CLK_PLL_P>; + + #thermal-sensor-cells =3D <1>; + + throttle-cfgs { + throttle_heavy: heavy { + nvidia,priority =3D <100>; + nvidia,cpu-throt-percent =3D <80>; + nvidia,gpu-throt-level =3D ; + #cooling-cells =3D <2>; + }; + + throttle_light: light { + nvidia,priority =3D <80>; + nvidia,cpu-throt-percent =3D <50>; + nvidia,gpu-throt-level =3D ; + #cooling-cells =3D <2>; + }; + }; + }; + dfll: clock@70110000 { compatible =3D "nvidia,tegra114-dfll"; reg =3D <0x70110000 0x100>, /* DFLL control */ @@ -858,24 +899,28 @@ cpu0: cpu@0 { clock-names =3D "cpu_g", "cpu_lp", "pll_x", "pll_p", "dfll"; /* FIXME: what's the actual transition time? */ clock-latency =3D <300000>; + #cooling-cells =3D <2>; }; =20 cpu1: cpu@1 { device_type =3D "cpu"; compatible =3D "arm,cortex-a15"; reg =3D <1>; + #cooling-cells =3D <2>; }; =20 cpu2: cpu@2 { device_type =3D "cpu"; compatible =3D "arm,cortex-a15"; reg =3D <2>; + #cooling-cells =3D <2>; }; =20 cpu3: cpu@3 { device_type =3D "cpu"; compatible =3D "arm,cortex-a15"; reg =3D <3>; + #cooling-cells =3D <2>; }; }; =20 @@ -888,6 +933,158 @@ pmu { interrupt-affinity =3D <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; }; =20 + thermal-zones { + cpu-thermal { + polling-delay-passive =3D <1000>; + polling-delay =3D <1000>; + + thermal-sensors =3D + <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>; + + trips { + cpu-shutdown-trip { + temperature =3D <102000>; + hysteresis =3D <0>; + type =3D "critical"; + }; + + cpu_throttle_trip: cpu-throttle-trip { + temperature =3D <100000>; + hysteresis =3D <1000>; + type =3D "hot"; + }; + + cpu_balanced_trip: cpu-balanced-trip { + temperature =3D <90000>; + hysteresis =3D <1000>; + type =3D "passive"; + }; + }; + + cooling-maps { + map0 { + trip =3D <&cpu_throttle_trip>; + cooling-device =3D <&throttle_heavy 1 1>; + }; + + map1 { + trip =3D <&cpu_balanced_trip>; + cooling-device =3D <&throttle_light 1 1>; + }; + }; + }; + + mem-thermal { + polling-delay-passive =3D <1000>; + polling-delay =3D <1000>; + + thermal-sensors =3D + <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>; + + trips { + mem-shutdown-trip { + temperature =3D <102000>; + hysteresis =3D <0>; + type =3D "critical"; + }; + + mem_throttle_trip: mem-throttle-trip { + temperature =3D <100000>; + hysteresis =3D <1000>; + type =3D "hot"; + }; + + mem_balanced_trip: mem-balanced-trip { + temperature =3D <90000>; + hysteresis =3D <1000>; + type =3D "passive"; + }; + }; + + cooling-maps { + /* + * There are currently no cooling maps, + * because there are no cooling devices. + */ + }; + }; + + gpu-thermal { + polling-delay-passive =3D <1000>; + polling-delay =3D <1000>; + + thermal-sensors =3D + <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>; + + trips { + gpu-shutdown-trip { + temperature =3D <102000>; + hysteresis =3D <0>; + type =3D "critical"; + }; + + gpu_throttle_trip: gpu-throttle-trip { + temperature =3D <100000>; + hysteresis =3D <1000>; + type =3D "hot"; + }; + + gpu_balanced_trip: gpu-balanced-trip { + temperature =3D <90000>; + hysteresis =3D <1000>; + type =3D "passive"; + }; + }; + + cooling-maps { + map0 { + trip =3D <&gpu_throttle_trip>; + cooling-device =3D <&throttle_heavy 1 1>; + }; + + map1 { + trip =3D <&gpu_balanced_trip>; + cooling-device =3D <&throttle_light 1 1>; + }; + }; + }; + + pllx-thermal { + polling-delay-passive =3D <1000>; + polling-delay =3D <1000>; + + thermal-sensors =3D + <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>; + + trips { + pllx-shutdown-trip { + temperature =3D <102000>; + hysteresis =3D <0>; + type =3D "critical"; + }; + + pllx_throttle_trip: pllx-throttle-trip { + temperature =3D <100000>; + hysteresis =3D <1000>; + type =3D "hot"; + }; + + pllx_balanced_trip: pllx-balanced-trip { + temperature =3D <90000>; + hysteresis =3D <1000>; + type =3D "passive"; + }; + }; + + cooling-maps { + /* + * There are currently no cooling maps, + * because there are no cooling devices. + */ + }; + }; + }; + timer { compatible =3D "arm,armv7-timer"; interrupts =3D --=20 2.48.1