From nobody Sun Oct 5 01:51:56 2025 Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2053.outbound.protection.outlook.com [40.107.94.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AEBE61DDC1B; Mon, 11 Aug 2025 07:47:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.94.53 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754898460; cv=fail; b=LTxC2mVo4LawkVm+BwrLIlut7nkO4q/UzclK/wzBoYryqCzjNxQRPdyrQOv85Tb6cYfkcijv6rKQHC9NgDTyWSMTIfhO+/jb5HAlHo24v5qa8/ADFG1eHhvr2YZ0V5t6oYkVGpHAKuj2YFDPHhPCHW0TVwyQx351+9A5zP42ogY= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754898460; c=relaxed/simple; bh=vg5GQviEqXZFf8wgCeP2gKeBn3IbBZG5Jkwd6t84bqU=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=SVdML9i6O2q6AhRgJ6lUf4pBfwqceoPYbclTIoXXRXKGAPaOJYZBlDp8yVi+CKc1KWlxm9rH9x32UYcVypN+Lu6j8U8+ziSIgP5TVtPrAcIOX3u4r/mTZ7Z0EC3GLQLMZjGNBIo3PEGnL2vsD3hyc39cLjyd6y0CALFwxQxbjLQ= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=apeeCH/k; arc=fail smtp.client-ip=40.107.94.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="apeeCH/k" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=NeHodwss2BzXN2yTaxf9ZSCo6QSZlwFZJQ8PjdLyiV0XL0oCxxMTiqbNKYzW02msPM+v08p4zD3tobOdC1wEaR7bvZBd4og0k4MWiZ6OrpO4mijNaCjb9xkM0IsThLNM8qvfvcxx4NvKJyubY/bkXTacNQ4LQDFkZhdjU7tnzwtzHhTCrjlpiR8nr4gvjV/RxfkHhX1S8ZWzQ85BE41isjU3JawbUX/uciQqt4ia8VkHPtSYy55/rLdOzmfNpyiJgIO9wVNAWRsJljHXEv45/wOdin/FwJID7LjIi94NI2uO4sLUsu/7sfeoji6iQQMd2AvnAkM7ydPjPizuQt45Yw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=3n82f1DlB3+5uGaVylaHYC2rDHV1xPTJIM/2H/YVioI=; b=dx6lPEeJjdH8fPIgdGidpGJK+VlTtQ402k3lCFkSLHvDf1wgOlY4MQvmfI9hNBsvRj1XgupZ/+xls4sNXZCvLiYslztltDAuW41Y8Wcxy41ZtoO7edh9qiL6UppIVlynbGlf85u2evNkWDigXTF1Ri72YBn1BfBz6o/UmGkZBAZDZpBqtDOfOrAt2avDMPKXmlzuhvO4hGlb0AYIq8KL6pTvmpGsJqK4NxGJxrrIxb+bjJPlDXVvKovoRECOF+3icFyDO+X/dQWjjP92JrOxkeHLnvfplBFBpVp1lOwjka+P4eSfPG+CCyX4qzEgXRk8LwXgSwgIsx0HqScnvAtQ8A== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=linuxfoundation.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=3n82f1DlB3+5uGaVylaHYC2rDHV1xPTJIM/2H/YVioI=; b=apeeCH/k3hgBQ7Zg2w5z3Pqkj/TzQfkJvoCBblyBhRf+57b7afNx1MhIpDkuhJLKGfMJx5hXUSdJnrQ/AX2mYa3xJ3wEC28F/wvRc4POd+rOLvparX4Sh/lADOM46Qb0frT7A/A2qRGevnjNNmAwyfzLkAqaMF9Bj4jBFCI3N4Auwv9X0OTYl+u3zEpCiLAEfpqbXP+5g03pEo8IpFHLHEkHFbJJEfhOlTg9R9HAkJ0Uzzt4YtypUnk8xnojQpek2x3pWM/WKQXK9V07V6GF3pvXgef1lRKWAst50P20Zw7rS9DJ4Jzk+nwcNvHGJVquScywvLbb2XF1Ia+7w86C/Q== Received: from SN1PR12CA0050.namprd12.prod.outlook.com (2603:10b6:802:20::21) by PH7PR12MB6611.namprd12.prod.outlook.com (2603:10b6:510:211::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9009.15; Mon, 11 Aug 2025 07:47:33 +0000 Received: from SA2PEPF000015CC.namprd03.prod.outlook.com (2603:10b6:802:20:cafe::cf) by SN1PR12CA0050.outlook.office365.com (2603:10b6:802:20::21) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9009.22 via Frontend Transport; Mon, 11 Aug 2025 07:47:33 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by SA2PEPF000015CC.mail.protection.outlook.com (10.167.241.202) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9031.11 via Frontend Transport; Mon, 11 Aug 2025 07:47:32 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Mon, 11 Aug 2025 00:47:13 -0700 Received: from 553356c-lcelt.nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Mon, 11 Aug 2025 00:47:09 -0700 From: Haotien Hsu To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , "Jonathan Hunter" , Mathias Nyman , "Brad Griffis" , Sumit Gupta , "Vedant Deshpande" , Akhil R , Jinjie Ruan , , , , CC: Haotien Hsu , Henry Lin , "Jui Chang Kuo" , Wayne Chang , WK Tsai Subject: [PATCH v3 1/4] dt-bindings: usb: Add wake-up support for Tegra234 XUSB host controller Date: Mon, 11 Aug 2025 15:45:55 +0800 Message-ID: <20250811074558.1062048-2-haotienh@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250811074558.1062048-1-haotienh@nvidia.com> References: <20250811074558.1062048-1-haotienh@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015CC:EE_|PH7PR12MB6611:EE_ X-MS-Office365-Filtering-Correlation-Id: 64ab5238-fb77-46bf-76be-08ddd8ab54c9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|7416014|376014|82310400026|921020; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?TclHZg9GcLYMFfVOLH5tWoQinmDQzXd5X0MMDs7FFbsCtTb9dRVZGwBxpPt+?= =?us-ascii?Q?70shzzhv4sJC0n4w2v8L++pQ3NMJSQ3AKHhqqdOthLnV1HGc09FSu1LReX25?= =?us-ascii?Q?8ACJ1Et0v+gTrJNjBAP0EYX6CY12GDZfZO9zTGZ7pWAVxxglxjbC5+HM21vf?= =?us-ascii?Q?VV48J6qUuFcuBYCXzCRJoPB8bCg/7zP50G+F0aZC7Oe2unoV3TEWeWE6a2Hs?= =?us-ascii?Q?qkxQr0AONJNSAbsWQNSEkNr4ipyxz8+KO+ex45OSBRo3GfY14hyLshOjLGYP?= =?us-ascii?Q?fVchcxKR/c/wKmZJSh2qCx9DyGh1+YU6C/xkLkmm6cIVJJHC0iCxsWK1FNH6?= =?us-ascii?Q?Wc+w5mQ603lY//xakWmsFNK5l0njlCFVsxyh6ApD8cKJNKAcXVCQEDGCFCr8?= =?us-ascii?Q?flBcq3/VNVAwwQHdQfuUJWk2KxtTNYTZxmRnxydUbmpHhZFuVu27KZfGaDTr?= =?us-ascii?Q?p/mvARmoiuFmsdZRUIYVoylRqlQ9qhw8ZDXYK15V66nMLr5ltGyMcDQPG1YI?= =?us-ascii?Q?Es12vCJCqhMANNzqXuDyzNYFm9Z9ncJOjn/upWIAhw5Z50TYj5IB43ugke4H?= =?us-ascii?Q?lZwzX6hThqkomlw/Ycr9mWROwP71xvFPH/b/S3tswqRsPWKky1AXh4CGtbCC?= =?us-ascii?Q?mANfT0XkjB3z6BaOGMF1mPFDJ6/XfUkgt0oJoL+SzRiX+zp/3bDM55rQdxGN?= =?us-ascii?Q?82MB6oPxOQW8noQ7Z8AvGHtc7ntADJ5t2m80WCS/WoRvc1DuqIma2IsxMtEd?= =?us-ascii?Q?WBcJNHanpAvTQ58TaILFiiT3IBWSkQLK55PxVsxFgREoq8E/WCc4Uh/c7sXD?= =?us-ascii?Q?QyDmCR0vPrjEmmgyiMfABBC5W2N+qqQpVAfiy9qJl/uKe7xEce4emDz/k1W6?= =?us-ascii?Q?zVXZh74SDP9afGCkN8bYu3LOHd7vtve7n/Dp/F8KPjsfcjgYfGIvMEieb3I+?= =?us-ascii?Q?y8FRdaTadwsN8oisH64jSjn/+aXOehaGVwU1Fv32iTVhqIKZ8gKWc8F0V1g8?= =?us-ascii?Q?HYwYes9BGEsQuHT9D41hUgm3RRVhn7b4owz0satyxWh5EVrS5zqOnZyySeyr?= =?us-ascii?Q?tK9m11khqaygNZz1B+n01T1LezBVivTi0F6NvXhfA8seLgrTJWpLM8z92zYV?= =?us-ascii?Q?XJa4YR023l9AOwO/zmdmeHp5QammxUfMorKDnsF2KkUKbadk762asHF2WEvt?= =?us-ascii?Q?iekysxNfkzEjbuzuNBiAQHIAoyxlAF2/qngA9SuwGVNtS1D6MsZj314mt/vl?= =?us-ascii?Q?0vfomjjlCk4JDuTUOoZI7GfqOWjyXLbd7QbyPhRz4Dw9Kf7ZY1n6ugUSVLYM?= =?us-ascii?Q?TJzk6+4leluqNJBm0zzZvwoXeUwDmgWG7pyhcKlqPHaUpY0NZ13GvoJjwbTi?= =?us-ascii?Q?13WO56m/yMDQncFXwbqAweKDlbaUZx3JkCBc4O8A4mjgWxAr6RYxEceKqYYZ?= =?us-ascii?Q?/7Xsg2p27yQYuZ3noITfFHgbzvacsduaD8/xLZ+hvQGk4FuU/YpmYBjbuxoV?= =?us-ascii?Q?6cT9ytviNuf3BTS5WmRHNC969iHa4LCT0FFYRMUdaPSktzYrL5mfVpU3fw?= =?us-ascii?Q?=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(7416014)(376014)(82310400026)(921020);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Aug 2025 07:47:32.8932 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 64ab5238-fb77-46bf-76be-08ddd8ab54c9 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015CC.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6611 Content-Type: text/plain; charset="utf-8" Populate USB wake events for Tegra234 XUSB host controller. These wake-up events are optional to maintain backward compatibility and because the USB controller does not require them for normal operation. Signed-off-by: Haotien Hsu Acked-by: Conor Dooley --- V1->V2 - Add the Acked-by tag to the commit message. V2->V3 - Update coding style --- .../bindings/usb/nvidia,tegra234-xusb.yaml | 31 +++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yam= l b/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml index db761dcbf72a..ec0993497fbb 100644 --- a/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml @@ -32,9 +32,35 @@ properties: - const: bar2 =20 interrupts: + minItems: 2 items: - description: xHCI host interrupt - description: mailbox interrupt + - description: USB wake event 0 + - description: USB wake event 1 + - description: USB wake event 2 + - description: USB wake event 3 + - description: USB wake event 4 + - description: USB wake event 5 + - description: USB wake event 6 + description: | + The first two interrupts are required for the USB host controller. T= he + remaining USB wake event interrupts are optional. Each USB wake even= t is + independent; it is not necessary to use all of these events on a + platform. The USB host controller can function even if no wake-up ev= ents + are defined. The USB wake event interrupts are handled by the Tegra = PMC; + hence, the interrupt controller for these is the PMC and the interru= pt + IDs correspond to the PMC wake event IDs. A complete list of wake ev= ent + IDs is provided below, and this information is also present in the T= egra + TRM document. + + PMC wake-up 76 for USB3 port 0 wakeup + PMC wake-up 77 for USB3 port 1 wakeup + PMC wake-up 78 for USB3 port 2 and port 3 wakeup + PMC wake-up 79 for USB2 port 0 wakeup + PMC wake-up 80 for USB2 port 1 wakeup + PMC wake-up 81 for USB2 port 2 wakeup + PMC wake-up 82 for USB2 port 3 wakeup =20 clocks: items: @@ -127,8 +153,9 @@ examples: <0x03650000 0x10000>; reg-names =3D "hcd", "fpci", "bar2"; =20 - interrupts =3D , - ; + interrupts-extended =3D <&gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, + <&pmc 76 IRQ_TYPE_LEVEL_HIGH>; =20 clocks =3D <&bpmp TEGRA234_CLK_XUSB_CORE_HOST>, <&bpmp TEGRA234_CLK_XUSB_FALCON>, --=20 2.34.1 From nobody Sun Oct 5 01:51:56 2025 Received: from NAM11-CO1-obe.outbound.protection.outlook.com (mail-co1nam11on2082.outbound.protection.outlook.com [40.107.220.82]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 709F22DA755; Mon, 11 Aug 2025 07:47:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.220.82 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754898461; cv=fail; b=e7JgERyJtVvs8/QaAFliZPPjHN/iM1rRaVlOIihIS6DcArWI370g7TF04kCnYLhOOeEwa1VqqORCCBVlYcVN6ijwiljgc1a0cAS112NkTVyl+UGbVQyxvHorkQBFlgtIXEk4QLLnkJnPuPhv5vg7I9W5fmSyzx5c9pCCTYSdZ7A= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754898461; c=relaxed/simple; bh=Dq3mjWYyRtbpr9QwgJ2dWBqIXTb+morBDUDnhhQ5kcY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=L15ppGuBWzJpEckuR5+s/5TtOBKFxHQjXLhyHUb/miL+pluVAlIcrk7OWN/YD810Fmr4V1EMb8WCSjIclw/lA+U613fy6lf+70C7cqPsMinfPjkbJtUVF/QHULshBA0vhFzp5qwU0OSl3Yo6YVqofLfj1/djGfmFUgRgFwIpEDk= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=NbN5z62G; arc=fail smtp.client-ip=40.107.220.82 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="NbN5z62G" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=k9I5MqHzxNvnvNbnztCBim7mF1BU39E1fqSGbK7hxylGpXQv3BthAiAqpozFoxRTdBVxZUDZIug1+eh9JAxBVVVdj7eP41xwF1l3jGvxLQrcM7V85wIvMXAWrPIvEseDnB0YIvqV9LgLMKFVK4khd6jzfdH+GJClFkB5M14XRnMeNhuQfTcLHzSf11AMk5uBUgkv5vhB5lRppx6YnZr1+0njy3gj7Z6pNqks2NSrj7acvEL8Fz9/1bVSCxw68OetOfOJG1baAmKCTEJjyoEhrf1V0Dz2BuEAP2qEbqZrmVfC9+TIwCuLF90zcE2z1lvhUJKCDW1SuSA62r8Cg4sl+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=/T4OdjKxwd6xwPR5lRgElodoU4Iw6f85yNJBbWLzE0Q=; b=BrNCxgWZyqTBlyYGUBcALOyBV88Tk7DQbbOZywsDXklS1Ryiiga4VkUHoqvkqOO1W/lLIibOF9WwbeeMpizHXmbRF7JfC+ub7GqUhS7ObhrEFzz2lbvv6+GDx6woYmmmLmOXqcJjNsbJXNtANRF+d0aOrJbHG9ueZwYNa80eZ8Biq9zCvaNMfmmeJhI3gCvJxDMyw2rB1NwHuZ9dgwW3L0VyAHYH1T8AJtB6oPeESrU1OqKoZ94vrxLV/zpmEcGEQH4HKPN0ezo05J5E4JK3vdsGDvNKhrSpfMEK9lrTN08X48Biyf7adXBJVICzb68bkhihJzmIP62MknIKJlUM7w== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=linuxfoundation.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=/T4OdjKxwd6xwPR5lRgElodoU4Iw6f85yNJBbWLzE0Q=; b=NbN5z62G1tfQS05swvqcWH6jskaNTVMztHT2KQQ9QneUE2OznxJGMmVivukQyjXyzBFIb0Xq7gmzKyIXOV0ZCF2LCeOsSci9pZ49tdghzwn1kFQc5lIBvLrlpSSnb3VH6tR7eC2HJfqSV2neVgC1sYzx7OKXlyx7TRXJrJPF2QpHnEbKrgLf2aSMoHQ5lzRIkRRvHQpEZGL3i7bAIn2hz0+g7hpNOQwnOQ9Ffe1MgMYEP8Ygq9UP0m8yje0NsMYFF8C+/tURGnhTspCqrLgW7sKFRfgK037Gc7yL+mWojbV5C0Gd3YjvOu0b2Wuq7a29qEwj3aFwqN6TylLDA2yoPA== Received: from SJ0PR03CA0261.namprd03.prod.outlook.com (2603:10b6:a03:3a0::26) by SJ5PPF6785369A4.namprd12.prod.outlook.com (2603:10b6:a0f:fc02::997) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9009.20; Mon, 11 Aug 2025 07:47:37 +0000 Received: from CY4PEPF0000FCC1.namprd03.prod.outlook.com (2603:10b6:a03:3a0:cafe::8c) by SJ0PR03CA0261.outlook.office365.com (2603:10b6:a03:3a0::26) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9009.21 via Frontend Transport; Mon, 11 Aug 2025 07:47:36 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by CY4PEPF0000FCC1.mail.protection.outlook.com (10.167.242.103) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9031.11 via Frontend Transport; Mon, 11 Aug 2025 07:47:36 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Mon, 11 Aug 2025 00:47:17 -0700 Received: from 553356c-lcelt.nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Mon, 11 Aug 2025 00:47:13 -0700 From: Haotien Hsu To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , "Jonathan Hunter" , Mathias Nyman , "Brad Griffis" , Sumit Gupta , "Vedant Deshpande" , Akhil R , Jinjie Ruan , , , , CC: Haotien Hsu , Henry Lin , "Jui Chang Kuo" , Wayne Chang , WK Tsai Subject: [PATCH v3 2/4] arm64: tegra: Add interrupts for Tegra234 USB wake events Date: Mon, 11 Aug 2025 15:45:56 +0800 Message-ID: <20250811074558.1062048-3-haotienh@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250811074558.1062048-1-haotienh@nvidia.com> References: <20250811074558.1062048-1-haotienh@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000FCC1:EE_|SJ5PPF6785369A4:EE_ X-MS-Office365-Filtering-Correlation-Id: a3f5f41a-c132-45bf-0c15-08ddd8ab5713 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|7416014|36860700013|921020; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?7p07/2sPrExLp8fJKL9Mf7YpI7oKT+rq0X9/LXUfDjvHKvodjGBDQAJUtMO6?= =?us-ascii?Q?6Fa9mjk/C6824AkcQnP0UNw/HRhHby+VIrFpzXiBa5WIbFnPgLlcENaka6Ig?= =?us-ascii?Q?vthq68ZEq/aSegCMI0Kg0P/gyqZIR6wd7GBRulmF1JCs4h7XSyxSU02UoByb?= =?us-ascii?Q?Ta8ee+Piny7lphyH6j5S5hBFjPjoCBI/zFkoB3VV4C8PUPbtMGJO+VTN5lxM?= =?us-ascii?Q?295sC6kJaxvZYPmRBnpasR4wupy8DD3gVNVRLydmn9uhjvGd6Uo/xPZSPqlG?= =?us-ascii?Q?qUG0IgFet3LIDNspXvTmOeaejZNVy1ZzqTFoY3aFng5x0MWR9URNDjOKclSd?= =?us-ascii?Q?boOBlr7VB1vXincV3BoWwogkq+R6g+2OIF4mj2tUdozdO95iO3+prGR9etpn?= =?us-ascii?Q?WRbND+Y22gBT1qQHJc3hAf46ZeauTaOMBXpbbyj6RydArFDEvY4cvqpQ5rI8?= =?us-ascii?Q?KFp27cvUJLAfHBpVxPFXZXzWjQnxgfjSLMhUOQuMXQzMPktc8qAagBwQTrfo?= =?us-ascii?Q?h78jRZodB1LCge3ZtrMWT1ZtwdDk15lyEj213iFYWGXFX5i4KDXy5JTCOsOZ?= =?us-ascii?Q?rllh0YtlHFE9QgDdUY6i1WyvE0wMZW8ISbnr2m+GHP6FXm02Urq0+UFEDGlZ?= =?us-ascii?Q?nU3udwIv9YBYD/K1Im3rEKIocl9VOuErxtQKwaK59t8PF0CdXkYQDS0u5ZhE?= =?us-ascii?Q?E6LLDo+t7fNK7HWyNWaLjDWmYvi8HxlIg/WWLKbNFslYLKI+vplCKds9S8Pq?= =?us-ascii?Q?1PS/ONuVlrpt6mmXag78YyJUKXiVR0UJRtz33g4VUw3GpA1CdNsV8RAllpXs?= =?us-ascii?Q?+dZkSOi4HICqCMB3aRv6AzgbAh2LL6NYpTFi2IbPPY9ePMKVY8Qb30THX8Yr?= =?us-ascii?Q?ywLlznrXEIZCd3cA9kFKAnAB6D4eeGTUMoE9KAHpwuLg4JbZP18P42D61Fuz?= =?us-ascii?Q?GnNwFZPiEZDyaTh1prNB53xapUcyRRjx0Cm8CK5jc3Rk1ckesZ8UP8cA0Z6+?= =?us-ascii?Q?vmmO6PbzezMsY4eQEhYab9tZZGGJwKkbWavqCwhjMinb76scfgFXuhBVrlbC?= =?us-ascii?Q?fW9P/oEWgPAozsefqSlXN5PwwxRs8tSM5+BNh8g9EW+W6MAtvbLVKGCRQbBt?= =?us-ascii?Q?byHm6PVWX4cbh8416SfrvU5Dfunhrltr4naFsMCid7rQ0gkeeddFFuXkg40N?= =?us-ascii?Q?fElEmjZOloxFZHmEx6GEGO+G1g3RkjGPnv4q38HMApkT5fYbmi2Ee/yhtwpz?= =?us-ascii?Q?u3sgFM8HqzQ/VQOMnr6T2hgY840Ip5IrqO5MpUpuWwy2HEuFdu0NBBQW08ZR?= =?us-ascii?Q?Rn+uoMphJsiliPWijuy5VoU4u89d5K6w2oP901GYf0ILs388bC3Fizwm65Ph?= =?us-ascii?Q?9kfYmxdUvw1UJBz0NTv3UHomujjp5m1XPcsH1FdhhR5bF6bv8o0TfMR4YEu6?= =?us-ascii?Q?V0prBddw0W98UZVOQUUKvWnW11Bt2SuQiYZjDbRQ8TDWyb51DqcmiI6ISfFr?= =?us-ascii?Q?AmqRtpai8cKPP0cCPwjjnJRG6nPeBJSc8IhJl9qAFYwYRobwbcpiP/6NeQ?= =?us-ascii?Q?=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(376014)(7416014)(36860700013)(921020);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Aug 2025 07:47:36.7071 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a3f5f41a-c132-45bf-0c15-08ddd8ab5713 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCC1.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ5PPF6785369A4 Content-Type: text/plain; charset="utf-8" Add interrupts for Tegra234 USB wake events to support the USB wake-up function. Signed-off-by: Haotien Hsu --- arch/arm64/boot/dts/nvidia/tegra234.dtsi | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts= /nvidia/tegra234.dtsi index 2601b43b2d8c..9cf573fed6cb 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi @@ -3254,8 +3254,15 @@ usb@3610000 { <0x0 0x03650000 0x0 0x10000>; reg-names =3D "hcd", "fpci", "bar2"; =20 - interrupts =3D , - ; + interrupts-extended =3D <&gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, + <&pmc 76 IRQ_TYPE_LEVEL_HIGH>, + <&pmc 77 IRQ_TYPE_LEVEL_HIGH>, + <&pmc 78 IRQ_TYPE_LEVEL_HIGH>, + <&pmc 79 IRQ_TYPE_LEVEL_HIGH>, + <&pmc 80 IRQ_TYPE_LEVEL_HIGH>, + <&pmc 81 IRQ_TYPE_LEVEL_HIGH>, + <&pmc 82 IRQ_TYPE_LEVEL_HIGH>; =20 clocks =3D <&bpmp TEGRA234_CLK_XUSB_CORE_HOST>, <&bpmp TEGRA234_CLK_XUSB_FALCON>, --=20 2.34.1 From nobody Sun Oct 5 01:51:56 2025 Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2074.outbound.protection.outlook.com [40.107.94.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 244052DAFC2; Mon, 11 Aug 2025 07:47:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.94.74 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754898465; cv=fail; b=hk2vfKm59dw6f31xzXUjLUg0yMB6VbdH2YhvKLqzwc29cmUL9f3nWa3hIB9+DPmSmLbQWO7XCb8cdSLdoRQk806XARddr0biJDrcDkVCcPPJDKnKgk4pmWM/dyq7ArCPs3hq/qaz5jPaAKyzQPCl7YzLglWMpqkxOMZCVSuJrO8= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754898465; c=relaxed/simple; bh=4CdQuTqsVBtx4745UnkOFZFuBY0XX92rYEzJFa5PCqY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Ar5fq8WJwEmEyxVlH13y1QRpyylfLg7zXb8McsmT+qX1GlCx4yGy5lQ6TVUV6ZzVgUgBZFlNc6oyYQzdPHVGGSGLpNfoiIiHzTUgL8R+xRq7ViF8VN5pPyNzygiBmVoWrgaU9FWH0XjpCI37pKKzft891kOSq9jrOEWbiyaKtxM= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=Zs5xUg1F; arc=fail smtp.client-ip=40.107.94.74 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="Zs5xUg1F" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=SngOQTWd/h33Y15bC68wAlqW2AbsUrFsbAOMe8mfH5AbvP+UbotfPcpA+ZFWV7ni9NP8e1Hjz/ntQ4xHQL5OaHu5AFBEiZ9QfC+ZFaXO7pqf7gO4vF2f6CvTQKq5nZB56nu5WyJ8PoihvJaoDLxKLhjmLQvW09PFEt7b/twZQjyKardGc6KLxk8wo8L/uaQmwgUUmaFmB5IoGb0zvImU/VIbINPnGUGclB7H9cAzwq+PUc2p/JONIwHUuhqVXJRrof0E73DeBKgk3GsRtVX5XRmiz5Jr7VxelOrYqX8q2Bj12aTbtxy42Y7RjxONeRUq4CujbtgM1MVTBgttFpAttA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=77NV8T61jyenSu0hqLaYARZQb33PSS1XgE4nh/1Humw=; b=mdrJD9y6ng+y6rrmZQTqkqDn97cHgXUZsiXpXcPgNe6+6WOgMcIYovDM2YrsNGqmX5t+Cw38BT11RaKT+7F/Kj8rofyiPo4I7Li35IPPcqITwjyXfsr+MekroRh1BOIPCRFZ71Q7QxKvDXcusx5VAlAmXHzaVjw33EFiHomHLNQzjYrltU2hFIjUPbYa5Vv79BMB7z2jkTh3HG9fnCmvBexuZP3MJZoeDSP4YtdbgU93KknGfKy+3tFv4+vsQnwKfD51UlNWn/VEMDU5xAgu//3EJK8nh5bNOHSdQ+zmGZS4BfblhQ6LM1syW2rsYmDD9U1iNguxcLNiv2Ejvik6ag== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=linuxfoundation.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=77NV8T61jyenSu0hqLaYARZQb33PSS1XgE4nh/1Humw=; b=Zs5xUg1F322GL0G1IvJYnobNrx9ifGQnS0FHiLsZv3OZLyaAzi9jGDK2/hasZYImg+jkWKqDqiHIlz8IYIcPW+6bL+G3+WaIaEvstlTPejWpXFI5AYsMEmaeSXARPiYDvOkrF9jZDID3BQpSIcsSMGB/ZE3ocCaxm8zKYT5rbVlC770eQDIAo0cFVMJd3eubxoCwXs4c0+lXtJmvOezT0+ly73B3RdglX0Qmr9X9MvPjsUMJI8pV/A0kasoBfqL7ALb1Z1GIEx11Tz8iGSKgrc68B+EubF6shpy65KJsVZ152se9uyfnVkZq4yN0Dnbxq/IwCM2iVWaYZGoS/lY6JA== Received: from CH0PR03CA0095.namprd03.prod.outlook.com (2603:10b6:610:cd::10) by IA0PPF12042BF6F.namprd12.prod.outlook.com (2603:10b6:20f:fc04::bc8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9009.15; Mon, 11 Aug 2025 07:47:40 +0000 Received: from CH1PEPF0000AD74.namprd04.prod.outlook.com (2603:10b6:610:cd:cafe::7f) by CH0PR03CA0095.outlook.office365.com (2603:10b6:610:cd::10) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9009.21 via Frontend Transport; Mon, 11 Aug 2025 07:47:40 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by CH1PEPF0000AD74.mail.protection.outlook.com (10.167.244.52) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9031.11 via Frontend Transport; Mon, 11 Aug 2025 07:47:39 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Mon, 11 Aug 2025 00:47:21 -0700 Received: from 553356c-lcelt.nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Mon, 11 Aug 2025 00:47:17 -0700 From: Haotien Hsu To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , "Jonathan Hunter" , Mathias Nyman , "Brad Griffis" , Sumit Gupta , "Vedant Deshpande" , Akhil R , Jinjie Ruan , , , , CC: Haotien Hsu , Henry Lin , "Jui Chang Kuo" , Wayne Chang , WK Tsai Subject: [PATCH v3 3/4] soc/tegra: pmc: Add USB wake events for Tegra234 Date: Mon, 11 Aug 2025 15:45:57 +0800 Message-ID: <20250811074558.1062048-4-haotienh@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250811074558.1062048-1-haotienh@nvidia.com> References: <20250811074558.1062048-1-haotienh@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD74:EE_|IA0PPF12042BF6F:EE_ X-MS-Office365-Filtering-Correlation-Id: 6b2b1a77-9095-4b90-ebce-08ddd8ab5902 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700013|7416014|376014|921020; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?XMKmcy/sNmXJljAjyBKDvi08cL3ThCEEK/5wFJjR6vaRucudJQM3/fn0vZVv?= =?us-ascii?Q?o0q9JeDXZsnUcDPaLqhvUIpa6CrByLjV5TCVuYKyliptYR7t+cvvG35stYzW?= =?us-ascii?Q?tCrTy3fdRU2/qumyrKFgaERBS3Kwyzpy/yoAEIckeWVy+OR/t+kPfERq7NpQ?= =?us-ascii?Q?gH2SG93bcmSWUlNME4yoZMS5iv2Rb14BOlb82fQo9UcEDAMon09KiEjyJopX?= =?us-ascii?Q?jLO9uQx0mQ0ZNQ7KuD0f5iWMOYzQWQuz+jU6b0MWNTHiHGIJRG2J32ckrsgp?= =?us-ascii?Q?IL2jvHJkOqPKVWHA+jhW+Os5ZczFqu9DWghaAPz6OaSUAMCZaO3ss2T9I3XO?= =?us-ascii?Q?Az3hZhtsMPZwZ1h5MjdPQ8FxzR8cSe1IOAXt5cFATW+swtl880YRKoCr2ioQ?= =?us-ascii?Q?be9Vz1KOXKthjtg2DyQTIIeH4KbhW7qPWbxbOQfjmhcQOVcU6BnAl0FMaG9c?= =?us-ascii?Q?7E3yQe9ETvtfXwaQYwWI4UNVo4d/J3kMlw+t03tf+b5gR0VrXn4r2IsQyNWC?= =?us-ascii?Q?HjzAPiXsMavy6jSUCp7ZddB5+y6ukdteIm8so8Lja0eQDOOO1uFDU53vEN5j?= =?us-ascii?Q?9Trqrc4k/Jb6eCsoRirQWQz9WSOm4SB8oBOgIk/1TwQNcV9KTxGxFqBh5Vc/?= =?us-ascii?Q?krnV0SN6a9f54gJj64YxU9KX9uw+DREXwU1C/BXZoXhpJnRKi3yawvZ8+QTn?= =?us-ascii?Q?fKlfnH6Ty6FlizIfiRx58jbr/C2DxU+2jMScX7yQNKA6oCPjVSz8BKjuDDm0?= =?us-ascii?Q?IkQVc3UWjM9If/pHaKS7RZKqF2j7TPtxsX5yRcwHExZwcCP9r/WTTNHfz2xe?= =?us-ascii?Q?fO7D0VEVCdWE/oMa05qnbphAbfjiGmdjseyAMJ8LIExHNswWNi071hRJ7i0U?= =?us-ascii?Q?64dHZVi3CMSYbIGYjvn2qGYci4/PYHTW6n96MrJmiX5tzH+oCu4TlvZGVDf3?= =?us-ascii?Q?UJljlqkThfhbFFVslqudPv2t0Ka1dgXkWW4wXVj/UW1Brdl+wvY8jBqDKsWD?= =?us-ascii?Q?GMIu6mTVoPVJJl1MTwoxuSaq9V1b0lpckwZQm0lyIea23LAvzR2rFQFcyO0K?= =?us-ascii?Q?NCpmlb4Z8JEKG8tF89nLJ2jU7yZ4wN4j0HQ5MTPLYRLi6YDBVEWRQjjN0cXD?= =?us-ascii?Q?BlqieaDr0K8l+GwYbXm4GdgiQX9vSBfy/+P6C9ossKCF+/0EGVJGEsiIST7H?= =?us-ascii?Q?+SrHnFVHTbXdste8o//F1HnqbCNnH5I0fh09imwCJEsV2bF4aPjutStBhsoY?= =?us-ascii?Q?+SGwAkfpkaswO3sCqWAZRLfuyH+qSszN/aR5w+Jr8g7fv+2ZBbY4hcw1sc3+?= =?us-ascii?Q?WAnGnDdGecjXYnMIyS+nXZiuLmwpaQF+g6lJEMHpUWDQvRu0iaJtlesOifSr?= =?us-ascii?Q?o48YWk7oZ2tT8eFKi3exxTPvX8XpC6KLw0X/e5Cic1wlnsKnJKXaATELFO0v?= =?us-ascii?Q?rnkXaAQi0k8ayeNuaP31fl+XPE7+133VNxASglRY4zEa2ej9gRI7i4XRKBfH?= =?us-ascii?Q?eI60zICsW1/Cj/0TtI5vpKxcaueI9r3jqVoHlpYFH+OaLj1KpKIn4gi/Zw?= =?us-ascii?Q?=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(36860700013)(7416014)(376014)(921020);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Aug 2025 07:47:39.9256 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6b2b1a77-9095-4b90-ebce-08ddd8ab5902 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD74.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PPF12042BF6F Content-Type: text/plain; charset="utf-8" Add USB wake events for Tegra234 so that system can be woken up from suspend when USB devices hot-plug/unplug event is detected. Signed-off-by: Haotien Hsu --- drivers/soc/tegra/pmc.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index 51b9d852bb6a..bf3a46e24aa3 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -4209,6 +4209,13 @@ static const struct tegra_wake_event tegra234_wake_e= vents[] =3D { TEGRA_WAKE_GPIO("power", 29, 1, TEGRA234_AON_GPIO(EE, 4)), TEGRA_WAKE_GPIO("mgbe", 56, 0, TEGRA234_MAIN_GPIO(Y, 3)), TEGRA_WAKE_IRQ("rtc", 73, 10), + TEGRA_WAKE_IRQ("usb3-port-0", 76, 167), + TEGRA_WAKE_IRQ("usb3-port-1", 77, 167), + TEGRA_WAKE_IRQ("usb3-port-2-3", 78, 167), + TEGRA_WAKE_IRQ("usb2-port-0", 79, 167), + TEGRA_WAKE_IRQ("usb2-port-1", 80, 167), + TEGRA_WAKE_IRQ("usb2-port-2", 81, 167), + TEGRA_WAKE_IRQ("usb2-port-3", 82, 167), TEGRA_WAKE_IRQ("sw-wake", SW_WAKE_ID, 179), }; =20 --=20 2.34.1 From nobody Sun Oct 5 01:51:56 2025 Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2064.outbound.protection.outlook.com [40.107.244.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E58AD2DAFB8; Mon, 11 Aug 2025 07:47:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.244.64 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754898470; cv=fail; b=iIBzIHfgQQc7vWvutC52X9l8InhxMZrzsDK2TXLXKt3eNICrWeGn7IadiPgpatA7Qfxcg2AyHR6E69vo9jiQXzXIaf79T6IFUXg/Xke1Uft4sc1RpoM8KFXLu7BczmlTddPUE3E1fUmT06ekKfFgVryGRVX1Z9mkoVd8wiGMw48= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754898470; c=relaxed/simple; bh=yUjHRaLzb4v9YQiOq4kTCaHKrn2rOTnNcFvV7j7St2c=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=aR/uJPY7RdjGszDI4YqqVznkeR1+g1JRoiSB3t1EuCWExsAcPgfGZQJkQZ6X8cxp9Xrbe5vksRBmAiPFHW2MRsHiITYehQ0r2uShHovdL+QPv/bPlr3sNaRtYrkwSiu8SboQ6H8xO22vO+nGREhwtqhU6SJvBkYx6jKzytBF7EE= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=dZTu0nUJ; arc=fail smtp.client-ip=40.107.244.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="dZTu0nUJ" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=ANeevhVdMNrDTGzvmU/HTjo8lj48ej1uJfdeyP6ZtBekICSsEgf1PMcATPvKStipZUmx9gLttewczG9L0gbK7yBNY+o0OX67yrBdLwIOXLvt0mRiJzriE4jnfKtLELHHltQVokfO8i5zby62vR2cT3PYHX2kAKsXpmGBn3jYaWtF0W5vOh9EH7Z0ZSaCQCuTbFRFoHJsU35QhfKTRUaeANGwXL8XDEEzv17nbbJNFcujBryaB9yxcpEk6ALP4HfVyePEhpMu2hXzbNeinY1eQOgMW02gn8Ox6NMMPkEax6CrQzIkXqj+M0qRmBVLhzx4pnBwMNzwflHTec1c1eheZg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=OpQ5PvmqGfgKtLR2AhW2foSb0ls0tnmvd1umz4XArUc=; b=XPuiOoUgqBQJuZ3cKXy0XfTJINYmgiqRxLwM4W8nibI2dEJYQ4AuBz575Termpw4bYAqxIYnegUZeq979l7/WK/qzNgCX9A6Tyg6bOMYi0/GGV7pDhAO2PNyBX5xUjUZ2QVCAbeBDvdcEETfvb2/4hWtoj0q/03ppfklAFvpBHpLHLZqTsH+qMOq5UL9QzKtDeWf+NalP2k2kU3ZL8JDkt0hwX+DLHii1lsixW31zGOKQZXSHXVTty+a/1rrXYrf/r5xLPYz83/li68cgeHnph0PBnM4Huexd6LnXAevfLbiE6DO8EwSaqtJI5y0JUMsLhrW+dD+p/siUCnE+9ugpg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=linuxfoundation.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=OpQ5PvmqGfgKtLR2AhW2foSb0ls0tnmvd1umz4XArUc=; b=dZTu0nUJUwGawtaYSFOLpgye3fhaDKUdte83tArjv0k5OHwUwlQmw7YBilGZgVjqcnE2R0eup4yc6ym87jcijdPfTuxx7ScGxXT+oPgUolNYBhmxO7lo1Kj1Wds5dqy2SLl49CICmhjoJLe6MfYHyvbq/GCb70j7gtL0BqPXypmFxpjTNcoeg8Nknb5l8WZU36CyAi6Wei7V9sZYWGCLlVoaHKCXNtnPLg+mei/BB6pLFiaU5tyazlibcCqc1koreXk9gqGissjjisfQDtN5+ukVSjI7OO+vRq1bt7xs4dYvMDs1g8bkznx7L45wwIIGEbyWAh1+vb8DensQgFlCxQ== Received: from CH0PR03CA0108.namprd03.prod.outlook.com (2603:10b6:610:cd::23) by CYYPR12MB8729.namprd12.prod.outlook.com (2603:10b6:930:c2::5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9009.18; Mon, 11 Aug 2025 07:47:44 +0000 Received: from CH1PEPF0000AD74.namprd04.prod.outlook.com (2603:10b6:610:cd:cafe::2) by CH0PR03CA0108.outlook.office365.com (2603:10b6:610:cd::23) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9009.22 via Frontend Transport; Mon, 11 Aug 2025 07:47:44 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by CH1PEPF0000AD74.mail.protection.outlook.com (10.167.244.52) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9031.11 via Frontend Transport; Mon, 11 Aug 2025 07:47:44 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Mon, 11 Aug 2025 00:47:25 -0700 Received: from 553356c-lcelt.nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Mon, 11 Aug 2025 00:47:21 -0700 From: Haotien Hsu To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , "Jonathan Hunter" , Mathias Nyman , "Brad Griffis" , Sumit Gupta , "Vedant Deshpande" , Akhil R , Jinjie Ruan , , , , CC: Haotien Hsu , Henry Lin , "Jui Chang Kuo" , Wayne Chang , WK Tsai Subject: [PATCH v3 4/4] usb: xhci: tegra: Support USB wakeup function for Tegra234 Date: Mon, 11 Aug 2025 15:45:58 +0800 Message-ID: <20250811074558.1062048-5-haotienh@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250811074558.1062048-1-haotienh@nvidia.com> References: <20250811074558.1062048-1-haotienh@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD74:EE_|CYYPR12MB8729:EE_ X-MS-Office365-Filtering-Correlation-Id: 224def25-6071-4ae3-938c-08ddd8ab5bb0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|82310400026|36860700013|1800799024|921020; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?0AAxWSPVti/SZ3YBFsjpHOiMk7QPJ0pO6SZKmXIIJ9y/j1SYQS7rf209BtD8?= =?us-ascii?Q?31yoiUHRhomsJ2BvIbQKefMn730XmAF/P547vljoYTZK/eMt6JkIFDvAI8rf?= =?us-ascii?Q?LlmaUhrgvdtkDLLg2NrRr0sJA9M+xYBSbOqu1KNQ+Yecl9MbXWIb5csXzOsw?= =?us-ascii?Q?54pOCwdhplJitbw8uKD7mxWAljxNePodaCSdGVC3T7nWOZvbNtZ0cNz4y89H?= =?us-ascii?Q?AX1wErDB51UyG7Mvrs549dsTtxNYh/GTEXe6QAj7XqlUwtGT6w2HWwoxoL5l?= =?us-ascii?Q?DxFOLICw9nCrGXjaaA89Ow8o/27/EOtEHGGGgMJY5zOBEMt7zJ40fpzAiUJf?= =?us-ascii?Q?NJFJUf5uvr4jKkH1ApFbNeYnaPveHhf9j5lJhtSFTu4Fp5JrKtVn0GXmmxTO?= =?us-ascii?Q?O3KdNatKfD58E+Ir/A/d+SfJhpHSAyCrOkAxRrwMyhkzIPPie6Y4EwRO4WdG?= =?us-ascii?Q?ouOwRvxPbnST0x9eQDgTRpj+/UItqGp/dW09V3hR4UbrJA5uUwVz1CTu1FJS?= =?us-ascii?Q?njVu+qIr1PCK0MEydkR1DsZaHxoUGJBBD7VYFTnHZfhwaEplyNztKt1a7FAh?= =?us-ascii?Q?PYMOeBKJqgjhL8MsjzylkYmImWajORKrK7wMe173RdPeEg+bolAsC4ljqbRy?= =?us-ascii?Q?RX9iARgCUxTaxpMik32J3ol5ZM9nrbg+RD6JuK3U9ce4mmpxWwTdzFt4tj1Z?= =?us-ascii?Q?+nf+TnXXeV2bYDBpmZV/FFekg6EMHHl964hlClaVfSrO7uEFPSCml+iISYzz?= =?us-ascii?Q?4STUJrxnRPjiBcANvqYjPTQojpSYsTaKoQoiSGJ0fRwh1VnAu9cDuGoqcqCR?= =?us-ascii?Q?ybn46XI5vkRVhkqVhY+29BU22UTTzNakwXVkie9jpPt300jo/7F0qdx0HuC7?= =?us-ascii?Q?GWdNdWfZi7XJqFisrplZIYaM4av6qViI+zSu5cWYOgXRiLW0aUj9LrZq2NyZ?= =?us-ascii?Q?FdfvyyoIaU1vYbzjr3Z6aSKBM/uNlTf68fUx/xsxUEcgOlMqfZS4mYpuGykl?= =?us-ascii?Q?q98TGTJu0ARo4Gtwy+Hb4EULs+A2irVIJeNeFr/pFyCEaTvqF08YFUICBfie?= =?us-ascii?Q?NE/Ck9GZzwyiM3uOihHHFLmc06JAWb/F3WXpWFvHFDtFPybrU8CtfSQ7QTZA?= =?us-ascii?Q?PINiCHr9ZI0yJ0Y6arm79V73IIO9lSQ3wZXZJ5pmFBMxr2qcpWhTcII3QGcQ?= =?us-ascii?Q?TN1jP6JWQ8L0zq2daBkCRimDW5Af/4Akq5vgo3kIU9ZfY980Xf2iRJEPAfe/?= =?us-ascii?Q?MfThjyNLR1YVMmBPwFe4l698rrSCiGnzw1foK6YitZAN2xK5LhYW3uBarJB8?= =?us-ascii?Q?v87xRnKgziFI2C+7QHZPVLQxQJVWeyt7T6Ofto5DJ+y3EXn7Xmm0ikq5xOta?= =?us-ascii?Q?GwXHc4T2fy0OqzkCSqc1Q3h8ZQMIlPgqNqOB01dvlXp3mr0zi9P5cc8Vdkj5?= =?us-ascii?Q?iMwP3kkTSlj3K25kw4rQ/W8axXVvHkUjN2Icx9YxX5IBu4ao8RKImlmazUdO?= =?us-ascii?Q?HUtTpW40WPea44TCI0Zdqib7saeBu85ChGZzf1iq5Kwfyaa9S6sLqFUGxQ?= =?us-ascii?Q?=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(7416014)(376014)(82310400026)(36860700013)(1800799024)(921020);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Aug 2025 07:47:44.4123 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 224def25-6071-4ae3-938c-08ddd8ab5bb0 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD74.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYYPR12MB8729 Content-Type: text/plain; charset="utf-8" When the system is suspended, USB hot-plugging/unplugging can trigger wake events of the Tegra USB host controller. Enable support for USB wake-up events by parsing device-tree to see if the interrupts for the wake-up events are present and if so configure those interrupts. Note that if wake-up events are not present, still allow the USB host controller to probe as normal. Signed-off-by: Haotien Hsu --- V1->V2 - Fix the -Wunused-variable warning in xhci-tegra.c. --- drivers/usb/host/xhci-tegra.c | 82 ++++++++++++++++++++++++++++++++++- 1 file changed, 80 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index b5c362c2051d..b419f0917feb 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -155,6 +155,8 @@ #define FW_IOCTL_TYPE_SHIFT 24 #define FW_IOCTL_CFGTBL_READ 17 =20 +#define WAKE_IRQ_START_INDEX 2 + struct tegra_xusb_fw_header { __le32 boot_loadaddr_in_imem; __le32 boot_codedfi_offset; @@ -228,6 +230,7 @@ struct tegra_xusb_soc { unsigned int num_supplies; const struct tegra_xusb_phy_type *phy_types; unsigned int num_types; + unsigned int max_num_wakes; const struct tegra_xusb_context_soc *context; =20 struct { @@ -263,6 +266,7 @@ struct tegra_xusb { int xhci_irq; int mbox_irq; int padctl_irq; + int *wake_irqs; =20 void __iomem *ipfs_base; void __iomem *fpci_base; @@ -313,6 +317,7 @@ struct tegra_xusb { bool suspended; struct tegra_xusb_context context; u8 lp0_utmi_pad_mask; + int num_wakes; }; =20 static struct hc_driver __read_mostly tegra_xhci_hc_driver; @@ -1534,6 +1539,58 @@ static void tegra_xusb_deinit_usb_phy(struct tegra_x= usb *tegra) otg_set_host(tegra->usbphy[i]->otg, NULL); } =20 +static int tegra_xusb_setup_wakeup(struct platform_device *pdev, struct te= gra_xusb *tegra) +{ + unsigned int i; + + if (tegra->soc->max_num_wakes =3D=3D 0) + return 0; + + tegra->wake_irqs =3D devm_kcalloc(tegra->dev, + tegra->soc->max_num_wakes, + sizeof(*tegra->wake_irqs), GFP_KERNEL); + if (!tegra->wake_irqs) + return -ENOMEM; + + /* + * USB wake events are independent of each other, so it is not necessary = for a platform + * to utilize all wake-up events supported for a given device. The USB ho= st can operate + * even if wake-up events are not defined or fail to be configured. There= fore, we only + * return critical errors, such as -ENOMEM. + */ + for (i =3D 0; i < tegra->soc->max_num_wakes; i++) { + struct irq_data *data; + + tegra->wake_irqs[i] =3D platform_get_irq(pdev, i + WAKE_IRQ_START_INDEX); + if (tegra->wake_irqs[i] < 0) + break; + + data =3D irq_get_irq_data(tegra->wake_irqs[i]); + if (!data) { + dev_warn(tegra->dev, "get wake event %d irq data fail\n", i); + irq_dispose_mapping(tegra->wake_irqs[i]); + break; + } + + irq_set_irq_type(tegra->wake_irqs[i], irqd_get_trigger_type(data)); + } + + tegra->num_wakes =3D i; + dev_dbg(tegra->dev, "setup %d wake events\n", tegra->num_wakes); + + return 0; +} + +static void tegra_xusb_dispose_wake(struct tegra_xusb *tegra) +{ + unsigned int i; + + for (i =3D 0; i < tegra->num_wakes; i++) + irq_dispose_mapping(tegra->wake_irqs[i]); + + tegra->num_wakes =3D 0; +} + static int tegra_xusb_probe(struct platform_device *pdev) { struct tegra_xusb *tegra; @@ -1584,9 +1641,15 @@ static int tegra_xusb_probe(struct platform_device *= pdev) if (tegra->mbox_irq < 0) return tegra->mbox_irq; =20 + err =3D tegra_xusb_setup_wakeup(pdev, tegra); + if (err) + return err; + tegra->padctl =3D tegra_xusb_padctl_get(&pdev->dev); - if (IS_ERR(tegra->padctl)) - return PTR_ERR(tegra->padctl); + if (IS_ERR(tegra->padctl)) { + err =3D PTR_ERR(tegra->padctl); + goto dispose_wake; + } =20 np =3D of_parse_phandle(pdev->dev.of_node, "nvidia,xusb-padctl", 0); if (!np) { @@ -1910,6 +1973,8 @@ static int tegra_xusb_probe(struct platform_device *p= dev) put_padctl: of_node_put(np); tegra_xusb_padctl_put(tegra->padctl); +dispose_wake: + tegra_xusb_dispose_wake(tegra); return err; } =20 @@ -1942,6 +2007,8 @@ static void tegra_xusb_remove(struct platform_device = *pdev) if (tegra->padctl_irq) pm_runtime_disable(&pdev->dev); =20 + tegra_xusb_dispose_wake(tegra); + pm_runtime_put(&pdev->dev); =20 tegra_xusb_disable(tegra); @@ -2352,8 +2419,13 @@ static __maybe_unused int tegra_xusb_suspend(struct = device *dev) pm_runtime_disable(dev); =20 if (device_may_wakeup(dev)) { + unsigned int i; + if (enable_irq_wake(tegra->padctl_irq)) dev_err(dev, "failed to enable padctl wakes\n"); + + for (i =3D 0; i < tegra->num_wakes; i++) + enable_irq_wake(tegra->wake_irqs[i]); } } =20 @@ -2381,8 +2453,13 @@ static __maybe_unused int tegra_xusb_resume(struct d= evice *dev) } =20 if (device_may_wakeup(dev)) { + unsigned int i; + if (disable_irq_wake(tegra->padctl_irq)) dev_err(dev, "failed to disable padctl wakes\n"); + + for (i =3D 0; i < tegra->num_wakes; i++) + disable_irq_wake(tegra->wake_irqs[i]); } tegra->suspended =3D false; mutex_unlock(&tegra->lock); @@ -2633,6 +2710,7 @@ static const struct tegra_xusb_soc tegra234_soc =3D { .num_supplies =3D ARRAY_SIZE(tegra194_supply_names), .phy_types =3D tegra194_phy_types, .num_types =3D ARRAY_SIZE(tegra194_phy_types), + .max_num_wakes =3D 7, .context =3D &tegra186_xusb_context, .ports =3D { .usb3 =3D { .offset =3D 0, .count =3D 4, }, --=20 2.34.1