From nobody Tue Feb 10 15:29:00 2026 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 730C62580CF; Mon, 11 Aug 2025 02:13:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754878440; cv=none; b=FnzelPVEJkumuHXng1lPXBuIM7qdFrSBWqv6UDq53AGdml2wANB5XwDomQJvOQiWaIhbePg4ZLwXjhZxV/1b07mTr6ejjIt9ntkOwHf+Q4UA0PjVaSM8I62C9md8ohkxA7MZcwJKQ1Bit/xENg4jqsARbAMtUJVnhC3VCL2i2ic= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754878440; c=relaxed/simple; bh=R3ZYPelq7B2wOcscDEbwM8RdfSfF7asWSOgJ1o3wNwQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=lGXx+D202moRaEkCd2X/9jdOs/Bbmbp8Zf2tilvw/7ve95e3SKwd/9ZimdlbI6k/k9f8M7dJ9G3hadi0bS5l3dJjSKoEkEGzwpEmXlS+WHCXGbSy1dCtmph0/wqyfPVgiA8iQuDMIpW4KOSA0htOdaq0kG4lhSMRaz/pcxZRMdc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8AxlnDcUZlorBg+AQ--.51719S3; Mon, 11 Aug 2025 10:13:48 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowJDxQ+TYUZloMZtBAA--.48509S7; Mon, 11 Aug 2025 10:13:47 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 5/5] LoongArch: KVM: Add address alignment check in pch_pic register access Date: Mon, 11 Aug 2025 10:13:44 +0800 Message-Id: <20250811021344.3678306-6-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250811021344.3678306-1-maobibo@loongson.cn> References: <20250811021344.3678306-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJDxQ+TYUZloMZtBAA--.48509S7 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" With pch_pic device, its register is based on MMIO address space, different access size 1/2/4/8 is supported. And base address should be naturally aligned with its access size, here add alignment check in its register access emulation function. Signed-off-by: Bibo Mao --- arch/loongarch/kvm/intc/pch_pic.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/loongarch/kvm/intc/pch_pic.c b/arch/loongarch/kvm/intc/pc= h_pic.c index 0710b5ab286e..5ee24dbf3c4c 100644 --- a/arch/loongarch/kvm/intc/pch_pic.c +++ b/arch/loongarch/kvm/intc/pch_pic.c @@ -151,6 +151,11 @@ static int kvm_pch_pic_read(struct kvm_vcpu *vcpu, return -EINVAL; } =20 + if (addr & (len - 1)) { + kvm_err("%s: pch pic not aligned addr %llx len %d\n", __func__, addr, le= n); + return -EINVAL; + } + /* statistics of pch pic reading */ vcpu->stat.pch_pic_read_exits++; ret =3D loongarch_pch_pic_read(s, addr, len, val); @@ -246,6 +251,11 @@ static int kvm_pch_pic_write(struct kvm_vcpu *vcpu, return -EINVAL; } =20 + if (addr & (len - 1)) { + kvm_err("%s: pch pic not aligned addr %llx len %d\n", __func__, addr, le= n); + return -EINVAL; + } + /* statistics of pch pic writing */ vcpu->stat.pch_pic_write_exits++; ret =3D loongarch_pch_pic_write(s, addr, len, val); --=20 2.39.3