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Mon, 11 Aug 2025 08:02:13 -0700 (PDT) From: Bartosz Golaszewski Date: Mon, 11 Aug 2025 17:02:04 +0200 Subject: [PATCH 5/5] pinctrl: wpcm450: use new generic GPIO chip API Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250811-gpio-mmio-pinctrl-conv-v1-5-a84c5da2be20@linaro.org> References: <20250811-gpio-mmio-pinctrl-conv-v1-0-a84c5da2be20@linaro.org> In-Reply-To: <20250811-gpio-mmio-pinctrl-conv-v1-0-a84c5da2be20@linaro.org> To: =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= , Linus Walleij , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= Cc: linux-gpio@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, Bartosz Golaszewski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Signed-off-by: Bartosz Golaszewski --- drivers/pinctrl/nuvoton/pinctrl-wpcm450.c | 44 ++++++++++++++++++++-------= ---- 1 file changed, 28 insertions(+), 16 deletions(-) diff --git a/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c b/drivers/pinctrl/nu= voton/pinctrl-wpcm450.c index 8d8314ba0e4cb55db2b1d3adf2de07e6fb93c279..4dd8a3daa83e44b0e2780fedb03= ab11fa46a4b7d 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c +++ b/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c @@ -11,6 +11,7 @@ =20 #include #include +#include #include #include #include @@ -47,7 +48,7 @@ struct wpcm450_pinctrl; struct wpcm450_bank; =20 struct wpcm450_gpio { - struct gpio_chip gc; + struct gpio_generic_chip chip; struct wpcm450_pinctrl *pctrl; const struct wpcm450_bank *bank; }; @@ -184,11 +185,12 @@ static void wpcm450_gpio_irq_unmask(struct irq_data *= d) } =20 /* - * This is an implementation of the gpio_chip->get() function, for use in - * wpcm450_gpio_fix_evpol. Unfortunately, we can't use the bgpio-provided - * implementation there, because it would require taking gpio_chip->bgpio_= lock, - * which is a spin lock, but wpcm450_gpio_fix_evpol must work in contexts = where - * a raw spin lock is held. + * FIXME: This is an implementation of the gpio_chip->get() function, for = use + * in wpcm450_gpio_fix_evpol(). It was implemented back when gpio-mmio use= d a + * regular spinlock internally, while wpcm450_gpio_fix_evpol() needed to w= ork + * in contexts with a raw spinlock held. Since then, the gpio generic chip= has + * been switched to using a raw spinlock so this should be converted to us= ing + * the locking interfaces provided in linux/gpio/gneneric.h. */ static int wpcm450_gpio_get(struct wpcm450_gpio *gpio, int offset) { @@ -329,7 +331,7 @@ static void wpcm450_gpio_irqhandler(struct irq_desc *de= sc) for_each_set_bit(bit, &pending, 32) { int offset =3D wpcm450_irq_bitnum_to_gpio(gpio, bit); =20 - generic_handle_domain_irq(gpio->gc.irq.domain, offset); + generic_handle_domain_irq(gpio->chip.gc.irq.domain, offset); } chained_irq_exit(chip, desc); } @@ -1012,7 +1014,7 @@ static int wpcm450_gpio_add_pin_ranges(struct gpio_ch= ip *chip) struct wpcm450_gpio *gpio =3D gpiochip_get_data(chip); const struct wpcm450_bank *bank =3D gpio->bank; =20 - return gpiochip_add_pin_range(&gpio->gc, dev_name(gpio->pctrl->dev), + return gpiochip_add_pin_range(&gpio->chip.gc, dev_name(gpio->pctrl->dev), 0, bank->base, bank->length); } =20 @@ -1029,6 +1031,7 @@ static int wpcm450_gpio_register(struct platform_devi= ce *pdev, "Resource fail for GPIO controller\n"); =20 for_each_gpiochip_node(dev, child) { + struct gpio_generic_chip_config config; void __iomem *dat =3D NULL; void __iomem *set =3D NULL; void __iomem *dirout =3D NULL; @@ -1060,17 +1063,26 @@ static int wpcm450_gpio_register(struct platform_de= vice *pdev, } else { flags =3D BGPIOF_NO_OUTPUT; } - ret =3D bgpio_init(&gpio->gc, dev, 4, - dat, set, NULL, dirout, NULL, flags); + + config =3D (typeof(config)){ + .dev =3D dev, + .sz =3D 4, + .dat =3D dat, + .set =3D set, + .dirout =3D dirout, + .flags =3D flags, + }; + + ret =3D gpio_generic_chip_init(&gpio->chip, &config); if (ret < 0) return dev_err_probe(dev, ret, "GPIO initialization failed\n"); =20 - gpio->gc.ngpio =3D bank->length; - gpio->gc.set_config =3D wpcm450_gpio_set_config; - gpio->gc.fwnode =3D child; - gpio->gc.add_pin_ranges =3D wpcm450_gpio_add_pin_ranges; + gpio->chip.gc.ngpio =3D bank->length; + gpio->chip.gc.set_config =3D wpcm450_gpio_set_config; + gpio->chip.gc.fwnode =3D child; + gpio->chip.gc.add_pin_ranges =3D wpcm450_gpio_add_pin_ranges; =20 - girq =3D &gpio->gc.irq; + girq =3D &gpio->chip.gc.irq; gpio_irq_chip_set_chip(girq, &wpcm450_gpio_irqchip); girq->parent_handler =3D wpcm450_gpio_irqhandler; girq->parents =3D devm_kcalloc(dev, WPCM450_NUM_GPIO_IRQS, @@ -1094,7 +1106,7 @@ static int wpcm450_gpio_register(struct platform_devi= ce *pdev, girq->num_parents++; } =20 - ret =3D devm_gpiochip_add_data(dev, &gpio->gc, gpio); + ret =3D devm_gpiochip_add_data(dev, &gpio->chip.gc, gpio); if (ret) return dev_err_probe(dev, ret, "Failed to add GPIO chip\n"); } --=20 2.48.1