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Mon, 11 Aug 2025 08:02:09 -0700 (PDT) From: Bartosz Golaszewski Date: Mon, 11 Aug 2025 17:02:01 +0200 Subject: [PATCH 2/5] pinctrl: equilibrium: use new generic GPIO chip API Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250811-gpio-mmio-pinctrl-conv-v1-2-a84c5da2be20@linaro.org> References: <20250811-gpio-mmio-pinctrl-conv-v1-0-a84c5da2be20@linaro.org> In-Reply-To: <20250811-gpio-mmio-pinctrl-conv-v1-0-a84c5da2be20@linaro.org> To: =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= , Linus Walleij , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= Cc: linux-gpio@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, Bartosz Golaszewski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Signed-off-by: Bartosz Golaszewski --- drivers/pinctrl/pinctrl-equilibrium.c | 26 ++++++++++++++++---------- drivers/pinctrl/pinctrl-equilibrium.h | 2 +- 2 files changed, 17 insertions(+), 11 deletions(-) diff --git a/drivers/pinctrl/pinctrl-equilibrium.c b/drivers/pinctrl/pinctr= l-equilibrium.c index fce804d42e7d7f9233b2da0fb26e482170629424..210044185679384d03278e200d8= f7723324487cd 100644 --- a/drivers/pinctrl/pinctrl-equilibrium.c +++ b/drivers/pinctrl/pinctrl-equilibrium.c @@ -2,6 +2,7 @@ /* Copyright (C) 2019 Intel Corporation */ =20 #include +#include #include #include #include @@ -179,7 +180,7 @@ static int gpiochip_setup(struct device *dev, struct eq= br_gpio_ctrl *gctrl) struct gpio_irq_chip *girq; struct gpio_chip *gc; =20 - gc =3D &gctrl->chip; + gc =3D &gctrl->chip.gc; gc->label =3D gctrl->name; gc->fwnode =3D gctrl->fwnode; gc->request =3D gpiochip_generic_request; @@ -191,7 +192,7 @@ static int gpiochip_setup(struct device *dev, struct eq= br_gpio_ctrl *gctrl) return 0; } =20 - girq =3D &gctrl->chip.irq; + girq =3D &gctrl->chip.gc.irq; gpio_irq_chip_set_chip(girq, &eqbr_irq_chip); girq->parent_handler =3D eqbr_irq_handler; girq->num_parents =3D 1; @@ -208,6 +209,7 @@ static int gpiochip_setup(struct device *dev, struct eq= br_gpio_ctrl *gctrl) =20 static int gpiolib_reg(struct eqbr_pinctrl_drv_data *drvdata) { + struct gpio_generic_chip_config config; struct device *dev =3D drvdata->dev; struct eqbr_gpio_ctrl *gctrl; struct device_node *np; @@ -239,12 +241,16 @@ static int gpiolib_reg(struct eqbr_pinctrl_drv_data *= drvdata) } raw_spin_lock_init(&gctrl->lock); =20 - ret =3D bgpio_init(&gctrl->chip, dev, gctrl->bank->nr_pins / 8, - gctrl->membase + GPIO_IN, - gctrl->membase + GPIO_OUTSET, - gctrl->membase + GPIO_OUTCLR, - gctrl->membase + GPIO_DIR, - NULL, 0); + config =3D (typeof(config)){ + .dev =3D dev, + .sz =3D gctrl->bank->nr_pins / 8, + .dat =3D gctrl->membase + GPIO_IN, + .set =3D gctrl->membase + GPIO_OUTSET, + .clr =3D gctrl->membase + GPIO_OUTCLR, + .dirout =3D gctrl->membase + GPIO_DIR, + }; + + ret =3D gpio_generic_chip_init(&gctrl->chip, &config); if (ret) { dev_err(dev, "unable to init generic GPIO\n"); return ret; @@ -254,7 +260,7 @@ static int gpiolib_reg(struct eqbr_pinctrl_drv_data *dr= vdata) if (ret) return ret; =20 - ret =3D devm_gpiochip_add_data(dev, &gctrl->chip, gctrl); + ret =3D devm_gpiochip_add_data(dev, &gctrl->chip.gc, gctrl); if (ret) return ret; } @@ -499,7 +505,7 @@ static int eqbr_pinconf_set(struct pinctrl_dev *pctldev= , unsigned int pin, bank->pin_base, pin); return -ENODEV; } - gc =3D &gctrl->chip; + gc =3D &gctrl->chip.gc; gc->direction_output(gc, offset, 0); continue; default: diff --git a/drivers/pinctrl/pinctrl-equilibrium.h b/drivers/pinctrl/pinctr= l-equilibrium.h index b4d149bde39d8dd08a962bb05ccf026364dd9f68..b56124d7fe9132c875d2768b0af= 8b939f1a4fbf8 100644 --- a/drivers/pinctrl/pinctrl-equilibrium.h +++ b/drivers/pinctrl/pinctrl-equilibrium.h @@ -96,7 +96,7 @@ struct fwnode_handle; * @lock: spin lock to protect gpio register write. */ struct eqbr_gpio_ctrl { - struct gpio_chip chip; + struct gpio_generic_chip chip; struct fwnode_handle *fwnode; struct eqbr_pin_bank *bank; void __iomem *membase; --=20 2.48.1