From nobody Sun Oct 5 01:49:24 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 44B851922D3; Mon, 11 Aug 2025 00:32:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754872377; cv=none; b=lUiIttY8ogPtUPsd78P68SLGmbpP4A5PEmhYLobINOnigHL5RnZh5iwgC20JfdU2YcA1Jp/lxDOSRt9x8mcAoH5ceRk85M7P+WSMZ+sv90JeHyuz+w26GEGmXquhkIj6fDkl0zoiV8UaaIxz/U3cjrrFsAnWAiXWOK2pbxIyeeM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754872377; c=relaxed/simple; bh=IFTM+cCl1PzcsGLiOvasHfcz6hoVV8pnqOMPQjed5gw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Cf+xpT7xrfBGOWKIhy9dCKkbaxIZLrg2PGURZcr5fXK1WEiVrH/2lwt4OC/CiugeGcahnE4Fe+t/K7nZKlXPpGN2G7wsocUYOWped3LeRg4h8m9QtJjirsa/Lls/KhK4wkr/JYMKpXvTBY5+OKTR5xfO+l21aFEbdR3hIFRLyJ4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=PI7JuRAm; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="PI7JuRAm" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1754872368; bh=IFTM+cCl1PzcsGLiOvasHfcz6hoVV8pnqOMPQjed5gw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=PI7JuRAmLjU/TuG6t+mxMhqNSrSmhXepgsHDCdvqlzePZKdDO87FaoDH1HwrYsN6K 4iPktER7Kj8Srt89WuQxE9tpsnp1dMWxPFcHXJ1DznvfRuzYH4ahe9E2NlZwyOeq2P 3xWAJ+79lEhRnj2HWtjzr49lfclsrJTvT6USouWpXiK10zHGjwnkADhESzRW8gVjvN OU+/TppvN4CG+HEUgSelBrPXXZw8CnWsz/ZArRoKV35aPTx3WnrXjcf8kjbWANbUGL Vvq6LeicnhYVld9h6oX8Gce7Q5VFZSZvmZhtxG0rBGI0TwdMDHvbM8SeGf2uuWYjMG j9PrsOHVlizvA== Received: from [192.168.0.23] (unknown [IPv6:2804:14d:72b4:82f6:67c:16ff:fe57:b5a3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: dwlsalmeida) by bali.collaboradmins.com (Postfix) with ESMTPSA id E846F17E090E; Mon, 11 Aug 2025 02:32:43 +0200 (CEST) From: Daniel Almeida Date: Sun, 10 Aug 2025 21:32:14 -0300 Subject: [PATCH v8 1/6] rust: irq: add irq module Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250810-topics-tyr-request_irq2-v8-1-8163f4c4c3a6@collabora.com> References: <20250810-topics-tyr-request_irq2-v8-0-8163f4c4c3a6@collabora.com> In-Reply-To: <20250810-topics-tyr-request_irq2-v8-0-8163f4c4c3a6@collabora.com> To: Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , Greg Kroah-Hartman , "Rafael J. Wysocki" , Thomas Gleixner , Bjorn Helgaas , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Benno Lossin Cc: linux-kernel@vger.kernel.org, rust-for-linux@vger.kernel.org, linux-pci@vger.kernel.org, Joel Fernandes , Dirk Behme , Daniel Almeida X-Mailer: b4 0.14.2 Add the IRQ module. Future patches will then introduce support for IRQ registrations and handlers. Reviewed-by: Alice Ryhl Tested-by: Joel Fernandes Tested-by: Dirk Behme Signed-off-by: Daniel Almeida --- rust/kernel/irq.rs | 11 +++++++++++ rust/kernel/lib.rs | 1 + 2 files changed, 12 insertions(+) diff --git a/rust/kernel/irq.rs b/rust/kernel/irq.rs new file mode 100644 index 0000000000000000000000000000000000000000..fae7b15effc80c936d6bffbd5b4= 150000d6c2898 --- /dev/null +++ b/rust/kernel/irq.rs @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0 + +//! IRQ abstractions. +//! +//! An IRQ is an interrupt request from a device. It is used to get the CP= U's +//! attention so it can service a hardware event in a timely manner. +//! +//! The current abstractions handle IRQ requests and handlers, i.e.: it al= lows +//! drivers to register a handler for a given IRQ line. +//! +//! C header: [`include/linux/device.h`](srctree/include/linux/interrupt.h) diff --git a/rust/kernel/lib.rs b/rust/kernel/lib.rs index ed53169e795c0badf548025a57f946fa18bc73e3..f8db761c5c95fc66e4c55f539b1= 7fca613161ada 100644 --- a/rust/kernel/lib.rs +++ b/rust/kernel/lib.rs @@ -92,6 +92,7 @@ pub mod init; pub mod io; pub mod ioctl; +pub mod irq; pub mod jump_label; #[cfg(CONFIG_KUNIT)] pub mod kunit; --=20 2.50.1 From nobody Sun Oct 5 01:49:24 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 44BE01925BC; Mon, 11 Aug 2025 00:32:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754872377; cv=none; b=e/2/7NPBpGTTeq4YNvBXqCpV3wLcZeOUc3o+lFP0FSUsUy5+u3SzWiK4FX9DzU87CrH8LDXXGZDIRqC5lX+BENvdxfKfemY0GgGaf6siscohsoZ+sFQxnE+zVLL+mF/qrftvvnMiqs8QQkddCopFCuXf8bh5VlkoXXkeEKVIG9Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754872377; c=relaxed/simple; bh=ckoYEKjaaGomzDV+K9P2gebpsjCQQj7rVpnFR9cKnt4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=pGFG0nZ0LifD0rCNzVM36B3NFk66x0aggsS/Q/xMeidttPioDbO8J7GY0wOPpakE0GfuHQsqStt0Xo9elzPMAoWWdYz3SqeYF6T4yXy/0iOi8DlWCP4+TSNDcKnDGnOy3oEYyvsc5ssz7kLFkFKrH0JuXCPR3e4NmW/nAXarHWk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=kptm4sJ9; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="kptm4sJ9" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1754872373; bh=ckoYEKjaaGomzDV+K9P2gebpsjCQQj7rVpnFR9cKnt4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=kptm4sJ9JfwDm+wlVhSL3e0ENTusyh8PIgjhmZ64u0GExssSxTnxMTgJMPmt7U1Nw 6TgzosxTYjwZ133m+pim9iD7Mxf5s6JwOtW1Q7D0FXGXTvlq7jciyQL/Qp8TDvX5nW CmhPJozU1Qy0USWVjgo8U50KSLEonxEjfdC2UEsJ+Qe/x/+wqU2DfpWAly3MOO11uI mORty3AmXuprE85GaLiJZGrS+BKoxflVP8Wzqv0RxwG/SRb0Thu81871E7b5XSlLEL OegAFcSIMnMg3piNenxIUaPeTEZ2h6ekZyF9fwVEQy/jTLleGu3j49ehfbpOoNcqEe AyHA0BIJ2UdXA== Received: from [192.168.0.23] (unknown [IPv6:2804:14d:72b4:82f6:67c:16ff:fe57:b5a3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: dwlsalmeida) by bali.collaboradmins.com (Postfix) with ESMTPSA id 27B3F17E0B8C; Mon, 11 Aug 2025 02:32:48 +0200 (CEST) From: Daniel Almeida Date: Sun, 10 Aug 2025 21:32:15 -0300 Subject: [PATCH v8 2/6] rust: irq: add flags module Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250810-topics-tyr-request_irq2-v8-2-8163f4c4c3a6@collabora.com> References: <20250810-topics-tyr-request_irq2-v8-0-8163f4c4c3a6@collabora.com> In-Reply-To: <20250810-topics-tyr-request_irq2-v8-0-8163f4c4c3a6@collabora.com> To: Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , Greg Kroah-Hartman , "Rafael J. Wysocki" , Thomas Gleixner , Bjorn Helgaas , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Benno Lossin Cc: linux-kernel@vger.kernel.org, rust-for-linux@vger.kernel.org, linux-pci@vger.kernel.org, Joel Fernandes , Dirk Behme , Daniel Almeida X-Mailer: b4 0.14.2 Manipulating IRQ flags (i.e.: IRQF_*) will soon be necessary, specially to register IRQ handlers through bindings::request_irq(). Add a kernel::irq::Flags for that purpose. Reviewed-by: Alice Ryhl Tested-by: Joel Fernandes Tested-by: Dirk Behme Signed-off-by: Daniel Almeida --- rust/kernel/irq.rs | 6 +++ rust/kernel/irq/flags.rs | 124 +++++++++++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 130 insertions(+) diff --git a/rust/kernel/irq.rs b/rust/kernel/irq.rs index fae7b15effc80c936d6bffbd5b4150000d6c2898..d6306415f561f94a05b1c059eaa= 937b0b585471d 100644 --- a/rust/kernel/irq.rs +++ b/rust/kernel/irq.rs @@ -9,3 +9,9 @@ //! drivers to register a handler for a given IRQ line. //! //! C header: [`include/linux/device.h`](srctree/include/linux/interrupt.h) + +/// Flags to be used when registering IRQ handlers. +pub mod flags; + +#[doc(inline)] +pub use flags::Flags; diff --git a/rust/kernel/irq/flags.rs b/rust/kernel/irq/flags.rs new file mode 100644 index 0000000000000000000000000000000000000000..e62820ea67755123b4f96e43312= 44bbb4fbcfd9d --- /dev/null +++ b/rust/kernel/irq/flags.rs @@ -0,0 +1,124 @@ +// SPDX-License-Identifier: GPL-2.0 +// SPDX-FileCopyrightText: Copyright 2025 Collabora ltd. + +use crate::bindings; +use crate::prelude::*; + +/// Flags to be used when registering IRQ handlers. +/// +/// Flags can be used to request specific behaviors when registering an IRQ +/// handler, and can be combined using the `|`, `&`, and `!` operators to +/// further control the system's behavior. +/// +/// A common use case is to register a shared interrupt, as sharing the li= ne +/// between devices is increasingly common in modern systems and is even +/// required for some buses. This requires setting [`Flags::SHARED`] when +/// requesting the interrupt. Other use cases include setting the trigger = type +/// through `Flags::TRIGGER_*`, which determines when the interrupt fires,= or +/// controlling whether the interrupt is masked after the handler runs by = using +/// [`Flags::ONESHOT`]. +/// +/// If an invalid combination of flags is provided, the system will refuse= to +/// register the handler, and lower layers will enforce certain flags when +/// necessary. This means, for example, that all the +/// [`crate::irq::Registration`] for a shared interrupt have to agree on +/// [`Flags::SHARED`] and on the same trigger type, if set. +#[derive(Clone, Copy, PartialEq, Eq)] +pub struct Flags(c_ulong); + +impl Flags { + /// Use the interrupt line as already configured. + pub const TRIGGER_NONE: Flags =3D Flags::new(bindings::IRQF_TRIGGER_NO= NE); + + /// The interrupt is triggered when the signal goes from low to high. + pub const TRIGGER_RISING: Flags =3D Flags::new(bindings::IRQF_TRIGGER_= RISING); + + /// The interrupt is triggered when the signal goes from high to low. + pub const TRIGGER_FALLING: Flags =3D Flags::new(bindings::IRQF_TRIGGER= _FALLING); + + /// The interrupt is triggered while the signal is held high. + pub const TRIGGER_HIGH: Flags =3D Flags::new(bindings::IRQF_TRIGGER_HI= GH); + + /// The interrupt is triggered while the signal is held low. + pub const TRIGGER_LOW: Flags =3D Flags::new(bindings::IRQF_TRIGGER_LOW= ); + + /// Allow sharing the IRQ among several devices. + pub const SHARED: Flags =3D Flags::new(bindings::IRQF_SHARED); + + /// Set by callers when they expect sharing mismatches to occur. + pub const PROBE_SHARED: Flags =3D Flags::new(bindings::IRQF_PROBE_SHAR= ED); + + /// Flag to mark this interrupt as timer interrupt. + pub const TIMER: Flags =3D Flags::new(bindings::IRQF_TIMER); + + /// Interrupt is per CPU. + pub const PERCPU: Flags =3D Flags::new(bindings::IRQF_PERCPU); + + /// Flag to exclude this interrupt from irq balancing. + pub const NOBALANCING: Flags =3D Flags::new(bindings::IRQF_NOBALANCING= ); + + /// Interrupt is used for polling (only the interrupt that is register= ed + /// first in a shared interrupt is considered for performance reasons). + pub const IRQPOLL: Flags =3D Flags::new(bindings::IRQF_IRQPOLL); + + /// Interrupt is not reenabled after the hardirq handler finished. Use= d by + /// threaded interrupts which need to keep the irq line disabled until= the + /// threaded handler has been run. + pub const ONESHOT: Flags =3D Flags::new(bindings::IRQF_ONESHOT); + + /// Do not disable this IRQ during suspend. Does not guarantee that th= is + /// interrupt will wake the system from a suspended state. + pub const NO_SUSPEND: Flags =3D Flags::new(bindings::IRQF_NO_SUSPEND); + + /// Force enable it on resume even if [`Flags::NO_SUSPEND`] is set. + pub const FORCE_RESUME: Flags =3D Flags::new(bindings::IRQF_FORCE_RESU= ME); + + /// Interrupt cannot be threaded. + pub const NO_THREAD: Flags =3D Flags::new(bindings::IRQF_NO_THREAD); + + /// Resume IRQ early during syscore instead of at device resume time. + pub const EARLY_RESUME: Flags =3D Flags::new(bindings::IRQF_EARLY_RESU= ME); + + /// If the IRQ is shared with a [`Flags::NO_SUSPEND`] user, execute th= is + /// interrupt handler after suspending interrupts. For system wakeup d= evices + /// users need to implement wakeup detection in their interrupt handle= rs. + pub const COND_SUSPEND: Flags =3D Flags::new(bindings::IRQF_COND_SUSPE= ND); + + /// Don't enable IRQ or NMI automatically when users request it. Users= will + /// enable it explicitly by `enable_irq` or `enable_nmi` later. + pub const NO_AUTOEN: Flags =3D Flags::new(bindings::IRQF_NO_AUTOEN); + + /// Exclude from runnaway detection for IPI and similar handlers, depe= nds on + /// `PERCPU`. + pub const NO_DEBUG: Flags =3D Flags::new(bindings::IRQF_NO_DEBUG); + + pub(crate) fn into_inner(self) -> c_ulong { + self.0 + } + + const fn new(value: u32) -> Self { + build_assert!(value as u64 <=3D c_ulong::MAX as u64); + Self(value as c_ulong) + } +} + +impl core::ops::BitOr for Flags { + type Output =3D Self; + fn bitor(self, rhs: Self) -> Self::Output { + Self(self.0 | rhs.0) + } +} + +impl core::ops::BitAnd for Flags { + type Output =3D Self; + fn bitand(self, rhs: Self) -> Self::Output { + Self(self.0 & rhs.0) + } +} + +impl core::ops::Not for Flags { + type Output =3D Self; + fn not(self) -> Self::Output { + Self(!self.0) + } +} --=20 2.50.1 From nobody Sun Oct 5 01:49:24 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 027711C3C14; Mon, 11 Aug 2025 00:33:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754872383; cv=none; b=rngkP0nF4bVVq0N+/kzawIVxBpHbAhvkPPzhtrlAdMN1kFWwazkSkX4XWV9WBCXQwcfonzJGNzYv4Qn0Nt+EfUJbT2rcui8hSR1i4n05iQyLkib3b+ul0siSBuBYcw3nEjwJJOCqLRHs6n0VkwcbCs9nW1Y+MpWDGxIPtp4cxx4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754872383; c=relaxed/simple; bh=iNK70IM5ihtL5+GBpv8+D+cQ8cvUtT38BXt6l4m90/E=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=YoYUw07xz+qvTfs3HxVYZy/bWv4joqPDIXQvWVRjIkI9zkhJdg8xWfs5qv3XUagLXr892lTT79+49/UK9eZQEVeGNJbNMFTwWqkc/N9gf7I3qAECg2PG+nmq5DEkiLtJm3HYh7otY1C9XJB/CbMosknZnH8YdrEW4iV/Rf2cWYE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=hQwH7qlA; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="hQwH7qlA" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1754872379; bh=iNK70IM5ihtL5+GBpv8+D+cQ8cvUtT38BXt6l4m90/E=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=hQwH7qlAFzKterwpBvPHjn9Eyy+yCOC7Q57JivAYARjYxlmmP1bSfO28OObXz9FVh LYh9IDZHmmYOfwAUzJhWznx453lUgvSWhkfJgJer7BS53Uw7qHVC1gNklDP14HJ+W8 eyu39M0fV7xvipggVIEF8lDEnvQ7Xq8mT77xeT6d5e4XLb9ktos+lycwpo3ab7pziK jbG5HPzO4UO8IrIEU5DWfp7TJ6ipt8lrXPOhxonJcvoKVXPyHDJYg8m+FPacGoXnaT 3GSy8QM4WHV8dLPQEwKi9cPiK0+L0oqxT331NA72uWLUNC9YjxYFGfWqkyk6oZ4v5m Exo8xlcdjttyQ== Received: from [192.168.0.23] (unknown [IPv6:2804:14d:72b4:82f6:67c:16ff:fe57:b5a3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: dwlsalmeida) by bali.collaboradmins.com (Postfix) with ESMTPSA id 57DBF17E1277; Mon, 11 Aug 2025 02:32:54 +0200 (CEST) From: Daniel Almeida Date: Sun, 10 Aug 2025 21:32:16 -0300 Subject: [PATCH v8 3/6] rust: irq: add support for non-threaded IRQs and handlers Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250810-topics-tyr-request_irq2-v8-3-8163f4c4c3a6@collabora.com> References: <20250810-topics-tyr-request_irq2-v8-0-8163f4c4c3a6@collabora.com> In-Reply-To: <20250810-topics-tyr-request_irq2-v8-0-8163f4c4c3a6@collabora.com> To: Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , Greg Kroah-Hartman , "Rafael J. Wysocki" , Thomas Gleixner , Bjorn Helgaas , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Benno Lossin Cc: linux-kernel@vger.kernel.org, rust-for-linux@vger.kernel.org, linux-pci@vger.kernel.org, Joel Fernandes , Dirk Behme , Daniel Almeida X-Mailer: b4 0.14.2 This patch adds support for non-threaded IRQs and handlers through irq::Registration and the irq::Handler trait. Registering an irq is dependent upon having a IrqRequest that was previously allocated by a given device. This will be introduced in subsequent patches. Tested-by: Joel Fernandes Tested-by: Dirk Behme Signed-off-by: Daniel Almeida Reviewed-by: Alice Ryhl --- rust/bindings/bindings_helper.h | 1 + rust/helpers/helpers.c | 1 + rust/helpers/irq.c | 9 ++ rust/kernel/irq.rs | 6 + rust/kernel/irq/request.rs | 263 ++++++++++++++++++++++++++++++++++++= ++++ 5 files changed, 280 insertions(+) diff --git a/rust/bindings/bindings_helper.h b/rust/bindings/bindings_helpe= r.h index 84d60635e8a9baef1f1a1b2752dc0fa044f8542f..69a975da829f0c35760f71a1b32= b8fcb12c8a8dc 100644 --- a/rust/bindings/bindings_helper.h +++ b/rust/bindings/bindings_helper.h @@ -52,6 +52,7 @@ #include #include #include +#include #include #include #include diff --git a/rust/helpers/helpers.c b/rust/helpers/helpers.c index 7cf7fe95e41dd51717050648d6160bebebdf4b26..44b2005d50140d34a44ae37d01c= 2ddbae6aeaa32 100644 --- a/rust/helpers/helpers.c +++ b/rust/helpers/helpers.c @@ -22,6 +22,7 @@ #include "dma.c" #include "drm.c" #include "err.c" +#include "irq.c" #include "fs.c" #include "io.c" #include "jump_label.c" diff --git a/rust/helpers/irq.c b/rust/helpers/irq.c new file mode 100644 index 0000000000000000000000000000000000000000..1faca428e2c047a656dec317185= 5c1508d67e60b --- /dev/null +++ b/rust/helpers/irq.c @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +int rust_helper_request_irq(unsigned int irq, irq_handler_t handler, + unsigned long flags, const char *name, void *dev) +{ + return request_irq(irq, handler, flags, name, dev); +} diff --git a/rust/kernel/irq.rs b/rust/kernel/irq.rs index d6306415f561f94a05b1c059eaa937b0b585471d..f7d89a46ad1894dda5a0a0f5368= 3ff97f2359a4e 100644 --- a/rust/kernel/irq.rs +++ b/rust/kernel/irq.rs @@ -13,5 +13,11 @@ /// Flags to be used when registering IRQ handlers. pub mod flags; =20 +/// IRQ allocation and handling. +pub mod request; + #[doc(inline)] pub use flags::Flags; + +#[doc(inline)] +pub use request::{Handler, IrqRequest, IrqReturn, Registration}; diff --git a/rust/kernel/irq/request.rs b/rust/kernel/irq/request.rs new file mode 100644 index 0000000000000000000000000000000000000000..9ec9cc42e4c7380c081e129f90a= 040ed62157cb8 --- /dev/null +++ b/rust/kernel/irq/request.rs @@ -0,0 +1,263 @@ +// SPDX-License-Identifier: GPL-2.0 +// SPDX-FileCopyrightText: Copyright 2025 Collabora ltd. + +//! This module provides types like [`Registration`] which allow users to +//! register handlers for a given IRQ line. + +use core::marker::PhantomPinned; + +use crate::alloc::Allocator; +use crate::device::{Bound, Device}; +use crate::devres::Devres; +use crate::error::to_result; +use crate::irq::flags::Flags; +use crate::prelude::*; +use crate::str::CStr; +use crate::sync::Arc; + +/// The value that can be returned from a [`Handler`] or a [`ThreadedHandl= er`]. +#[repr(u32)] +pub enum IrqReturn { + /// The interrupt was not from this device or was not handled. + None =3D bindings::irqreturn_IRQ_NONE, + + /// The interrupt was handled by this device. + Handled =3D bindings::irqreturn_IRQ_HANDLED, +} + +/// Callbacks for an IRQ handler. +pub trait Handler: Sync { + /// The hard IRQ handler. + /// + /// This is executed in interrupt context, hence all corresponding + /// limitations do apply. + /// + /// All work that does not necessarily need to be executed from + /// interrupt context, should be deferred to a threaded handler. + /// See also [`ThreadedRegistration`]. + fn handle(&self) -> IrqReturn; +} + +impl Handler for Arc { + fn handle(&self) -> IrqReturn { + T::handle(self) + } +} + +impl Handler for Box { + fn handle(&self) -> IrqReturn { + T::handle(self) + } +} + +/// # Invariants +/// +/// - `self.irq` is the same as the one passed to `request_{threaded}_irq`. +/// - `cookie` was passed to `request_{threaded}_irq` as the cookie. It is= guaranteed to be unique +/// by the type system, since each call to `new` will return a different= instance of +/// `Registration`. +#[pin_data(PinnedDrop)] +struct RegistrationInner { + irq: u32, + cookie: *mut c_void, +} + +impl RegistrationInner { + fn synchronize(&self) { + // SAFETY: safe as per the invariants of `RegistrationInner` + unsafe { bindings::synchronize_irq(self.irq) }; + } +} + +#[pinned_drop] +impl PinnedDrop for RegistrationInner { + fn drop(self: Pin<&mut Self>) { + // SAFETY: + // + // Safe as per the invariants of `RegistrationInner` and: + // + // - The containing struct is `!Unpin` and was initialized using + // pin-init, so it occupied the same memory location for the entir= ety of + // its lifetime. + // + // Notice that this will block until all handlers finish executing, + // i.e.: at no point will &self be invalid while the handler is ru= nning. + unsafe { bindings::free_irq(self.irq, self.cookie) }; + } +} + +// SAFETY: We only use `inner` on drop, which called at most once with no +// concurrent access. +unsafe impl Sync for RegistrationInner {} + +// SAFETY: It is safe to send `RegistrationInner` across threads. +unsafe impl Send for RegistrationInner {} + +/// A request for an IRQ line for a given device. +/// +/// # Invariants +/// +/// - `=C3=ACrq` is the number of an interrupt source of `dev`. +/// - `irq` has not been registered yet. +pub struct IrqRequest<'a> { + dev: &'a Device, + irq: u32, +} + +impl<'a> IrqRequest<'a> { + /// Creates a new IRQ request for the given device and IRQ number. + /// + /// # Safety + /// + /// - `irq` should be a valid IRQ number for `dev`. + pub(crate) unsafe fn new(dev: &'a Device, irq: u32) -> Self { + // INVARIANT: `irq` is a valid IRQ number for `dev`. + IrqRequest { dev, irq } + } + + /// Returns the IRQ number of an [`IrqRequest`]. + pub fn irq(&self) -> u32 { + self.irq + } +} + +/// A registration of an IRQ handler for a given IRQ line. +/// +/// # Examples +/// +/// The following is an example of using `Registration`. It uses a +/// [`Completion`] to coordinate between the IRQ +/// handler and process context. [`Completion`] uses interior mutability, = so the +/// handler can signal with [`Completion::complete_all()`] and the process +/// context can wait with [`Completion::wait_for_completion()`] even though +/// there is no way to get a mutable reference to the any of the fields in +/// `Data`. +/// +/// [`Completion`]: kernel::sync::Completion +/// [`Completion::complete_all()`]: kernel::sync::Completion::complete_all +/// [`Completion::wait_for_completion()`]: kernel::sync::Completion::wait_= for_completion +/// +/// ``` +/// # use kernel::c_str; +/// # use kernel::device::Bound; +/// # use kernel::irq::{self, Flags, IrqRequest, IrqReturn, Registration}; +/// # use kernel::prelude::*; +/// # use kernel::sync::{Arc, Completion}; +/// // Data shared between process and IRQ context. +/// struct Data { +/// completion: Completion, +/// } +/// +/// type Handler =3D Data; +/// +/// impl irq::Handler for Handler { +/// // Executed in IRQ context. +/// fn handle(&self) -> IrqReturn { +/// self.completion.complete_all(); +/// IrqReturn::Handled +/// } +/// } +/// +/// // Registers an IRQ handler for the given IrqRequest. +/// // +/// // This runs in process context and assumes `request` was previously a= cquired from a device. +/// fn register_irq( +/// handler: impl PinInit, +/// request: IrqRequest<'_>, +/// ) -> Result>> { +/// let registration =3D Registration::new(request, Flags::SHARED, c_s= tr!("my_device"), handler); +/// +/// let registration =3D Arc::pin_init(registration, GFP_KERNEL)?; +/// +/// registration.handler().completion.wait_for_completion(); +/// +/// Ok(registration) +/// } +/// # Ok::<(), Error>(()) +/// ``` +/// +/// # Invariants +/// +/// * We own an irq handler using `&self.handler` as its private data. +#[pin_data] +pub struct Registration { + #[pin] + inner: Devres, + + #[pin] + handler: T, + + /// Pinned because we need address stability so that we can pass a poi= nter + /// to the callback. + #[pin] + _pin: PhantomPinned, +} + +impl Registration { + /// Registers the IRQ handler with the system for the given IRQ number. + pub fn new<'a>( + request: IrqRequest<'a>, + flags: Flags, + name: &'static CStr, + handler: impl PinInit + 'a, + ) -> impl PinInit + 'a { + try_pin_init!(&this in Self { + handler <- handler, + inner <- Devres::new( + request.dev, + try_pin_init!(RegistrationInner { + // SAFETY: `this` is a valid pointer to the `Registrat= ion` instance + cookie: unsafe { &raw mut (*this.as_ptr()).handler }.c= ast(), + irq: { + // SAFETY: + // - The callbacks are valid for use with request_= irq. + // - If this succeeds, the slot is guaranteed to b= e valid until the + // destructor of Self runs, which will deregiste= r the callbacks + // before the memory location becomes invalid. + to_result(unsafe { + bindings::request_irq( + request.irq, + Some(handle_irq_callback::), + flags.into_inner(), + name.as_char_ptr(), + (&raw mut (*this.as_ptr()).handler).cast(), + ) + })?; + request.irq + } + }) + ), + _pin: PhantomPinned, + }) + } + + /// Returns a reference to the handler that was registered with the sy= stem. + pub fn handler(&self) -> &T { + &self.handler + } + + /// Wait for pending IRQ handlers on other CPUs. + /// + /// This will attempt to access the inner [`Devres`] container. + pub fn try_synchronize(&self) -> Result { + let inner =3D self.inner.try_access().ok_or(ENODEV)?; + inner.synchronize(); + Ok(()) + } + + /// Wait for pending IRQ handlers on other CPUs. + pub fn synchronize(&self, dev: &Device) -> Result { + let inner =3D self.inner.access(dev)?; + inner.synchronize(); + Ok(()) + } +} + +/// # Safety +/// +/// This function should be only used as the callback in `request_irq`. +unsafe extern "C" fn handle_irq_callback(_irq: i32, ptr: *mut = c_void) -> c_uint { + // SAFETY: `ptr` is a pointer to T set in `Registration::new` + let handler =3D unsafe { &*(ptr as *const T) }; + T::handle(handler) as c_uint +} --=20 2.50.1 From nobody Sun Oct 5 01:49:24 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3FEF31D63C6; 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Mon, 11 Aug 2025 02:32:59 +0200 (CEST) From: Daniel Almeida Date: Sun, 10 Aug 2025 21:32:17 -0300 Subject: [PATCH v8 4/6] rust: irq: add support for threaded IRQs and handlers Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250810-topics-tyr-request_irq2-v8-4-8163f4c4c3a6@collabora.com> References: <20250810-topics-tyr-request_irq2-v8-0-8163f4c4c3a6@collabora.com> In-Reply-To: <20250810-topics-tyr-request_irq2-v8-0-8163f4c4c3a6@collabora.com> To: Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , Greg Kroah-Hartman , "Rafael J. Wysocki" , Thomas Gleixner , Bjorn Helgaas , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Benno Lossin Cc: linux-kernel@vger.kernel.org, rust-for-linux@vger.kernel.org, linux-pci@vger.kernel.org, Joel Fernandes , Dirk Behme , Daniel Almeida X-Mailer: b4 0.14.2 This patch adds support for threaded IRQs and handlers through irq::ThreadedRegistration and the irq::ThreadedHandler trait. Threaded interrupts are more permissive in the sense that further processing is possible in a kthread. This means that said execution takes place outside of interrupt context, which is rather restrictive in many ways. Registering a threaded irq is dependent upon having an IrqRequest that was previously allocated by a given device. This will be introduced in subsequent patches. Tested-by: Joel Fernandes Tested-by: Dirk Behme Signed-off-by: Daniel Almeida Reviewed-by: Alice Ryhl --- rust/kernel/irq.rs | 5 +- rust/kernel/irq/request.rs | 227 +++++++++++++++++++++++++++++++++++++++++= +++- 2 files changed, 229 insertions(+), 3 deletions(-) diff --git a/rust/kernel/irq.rs b/rust/kernel/irq.rs index f7d89a46ad1894dda5a0a0f53683ff97f2359a4e..20216fe1765d07bc3651ade9b93= ff60ca94d8d86 100644 --- a/rust/kernel/irq.rs +++ b/rust/kernel/irq.rs @@ -20,4 +20,7 @@ pub use flags::Flags; =20 #[doc(inline)] -pub use request::{Handler, IrqRequest, IrqReturn, Registration}; +pub use request::{ + Handler, IrqRequest, IrqReturn, Registration, ThreadedHandler, Threade= dIrqReturn, + ThreadedRegistration, +}; diff --git a/rust/kernel/irq/request.rs b/rust/kernel/irq/request.rs index 9ec9cc42e4c7380c081e129f90a040ed62157cb8..29597573e91106d0990ec096a8e= 7f93ef2f89f2b 100644 --- a/rust/kernel/irq/request.rs +++ b/rust/kernel/irq/request.rs @@ -1,8 +1,9 @@ // SPDX-License-Identifier: GPL-2.0 // SPDX-FileCopyrightText: Copyright 2025 Collabora ltd. =20 -//! This module provides types like [`Registration`] which allow users to -//! register handlers for a given IRQ line. +//! This module provides types like [`Registration`] and +//! [`ThreadedRegistration`], which allow users to register handlers for a= given +//! IRQ line. =20 use core::marker::PhantomPinned; =20 @@ -261,3 +262,225 @@ pub fn synchronize(&self, dev: &Device) -> Res= ult { let handler =3D unsafe { &*(ptr as *const T) }; T::handle(handler) as c_uint } + +/// The value that can be returned from [`ThreadedHandler::handle`]. +#[repr(u32)] +pub enum ThreadedIrqReturn { + /// The interrupt was not from this device or was not handled. + None =3D bindings::irqreturn_IRQ_NONE, + + /// The interrupt was handled by this device. + Handled =3D bindings::irqreturn_IRQ_HANDLED, + + /// The handler wants the handler thread to wake up. + WakeThread =3D bindings::irqreturn_IRQ_WAKE_THREAD, +} + +/// Callbacks for a threaded IRQ handler. +pub trait ThreadedHandler: Sync { + /// The hard IRQ handler. + /// + /// This is executed in interrupt context, hence all corresponding + /// limitations do apply. All work that does not necessarily need to be + /// executed from interrupt context, should be deferred to the threaded + /// handler, i.e. [`ThreadedHandler::handle_threaded`]. + /// + /// The default implementation returns [`ThreadedIrqReturn::WakeThread= `]. + fn handle(&self) -> ThreadedIrqReturn { + ThreadedIrqReturn::WakeThread + } + + /// The threaded IRQ handler. + /// + /// This is executed in process context. The kernel creates a dedicated + /// `kthread` for this purpose. + fn handle_threaded(&self) -> IrqReturn; +} + +impl ThreadedHandler for Arc { + fn handle(&self) -> ThreadedIrqReturn { + T::handle(self) + } + + fn handle_threaded(&self) -> IrqReturn { + T::handle_threaded(self) + } +} + +impl ThreadedHandler for Box { + fn handle(&self) -> ThreadedIrqReturn { + T::handle(self) + } + + fn handle_threaded(&self) -> IrqReturn { + T::handle_threaded(self) + } +} + +/// A registration of a threaded IRQ handler for a given IRQ line. +/// +/// Two callbacks are required: one to handle the IRQ, and one to handle a= ny +/// other work in a separate thread. +/// +/// The thread handler is only called if the IRQ handler returns +/// [`ThreadedIrqReturn::WakeThread`]. +/// +/// # Examples +/// +/// The following is an example of using [`ThreadedRegistration`]. It uses= a +/// [`Mutex`](kernel::sync::Mutex) to provide interior mutability. +/// +/// ``` +/// # use kernel::c_str; +/// # use kernel::device::Bound; +/// # use kernel::irq::{ +/// # self, Flags, IrqRequest, IrqReturn, ThreadedHandler, ThreadedIrqRe= turn, +/// # ThreadedRegistration, +/// # }; +/// # use kernel::prelude::*; +/// # use kernel::sync::{Arc, Mutex}; +/// // Declare a struct that will be passed in when the interrupt fires. T= he u32 +/// // merely serves as an example of some internal data. +/// // +/// // [`irq::ThreadedHandler::handle`] takes `&self`. This example +/// // illustrates how interior mutability can be used when sharing the da= ta +/// // between process context and IRQ context. +/// struct Data { +/// value: Mutex, +/// } +/// +/// type Handler =3D Data; +/// +/// impl ThreadedHandler for Handler { +/// // This will run (in a separate kthread) if and only if +/// // [`ThreadedHandler::handle`] returns [`WakeThread`], which it do= es by +/// // default. +/// fn handle_threaded(&self) -> IrqReturn { +/// let mut data =3D self.value.lock(); +/// *data +=3D 1; +/// IrqReturn::Handled +/// } +/// } +/// +/// // Registers a threaded IRQ handler for the given [`IrqRequest`]. +/// // +/// // This is executing in process context and assumes that `request` was +/// // previously acquired from a device. +/// fn register_threaded_irq( +/// handler: impl PinInit, +/// request: IrqRequest<'_>, +/// ) -> Result>> { +/// let registration =3D +/// ThreadedRegistration::new(request, Flags::SHARED, c_str!("my_d= evice"), handler); +/// +/// let registration =3D Arc::pin_init(registration, GFP_KERNEL)?; +/// +/// { +/// // The data can be accessed from process context too. +/// let mut data =3D registration.handler().value.lock(); +/// *data +=3D 1; +/// } +/// +/// Ok(registration) +/// } +/// # Ok::<(), Error>(()) +/// ``` +/// +/// # Invariants +/// +/// * We own an irq handler using `&T` as its private data. +#[pin_data] +pub struct ThreadedRegistration { + #[pin] + inner: Devres, + + #[pin] + handler: T, + + /// Pinned because we need address stability so that we can pass a poi= nter + /// to the callback. + #[pin] + _pin: PhantomPinned, +} + +impl ThreadedRegistration { + /// Registers the IRQ handler with the system for the given IRQ number. + pub fn new<'a>( + request: IrqRequest<'a>, + flags: Flags, + name: &'static CStr, + handler: impl PinInit + 'a, + ) -> impl PinInit + 'a { + try_pin_init!(&this in Self { + handler <- handler, + inner <- Devres::new( + request.dev, + try_pin_init!(RegistrationInner { + // SAFETY: `this` is a valid pointer to the `ThreadedR= egistration` instance. + cookie: unsafe { &raw mut (*this.as_ptr()).handler }.c= ast(), + irq: { + // SAFETY: + // - The callbacks are valid for use with request_= threaded_irq. + // - If this succeeds, the slot is guaranteed to b= e valid until the + // destructor of Self runs, which will deregister = the callbacks + // before the memory location becomes invalid. + to_result(unsafe { + bindings::request_threaded_irq( + request.irq, + Some(handle_threaded_irq_callback::), + Some(thread_fn_callback::), + flags.into_inner(), + name.as_char_ptr(), + (&raw mut (*this.as_ptr()).handler).cast(), + ) + })?; + request.irq + } + }) + ), + _pin: PhantomPinned, + }) + } + + /// Returns a reference to the handler that was registered with the sy= stem. + pub fn handler(&self) -> &T { + &self.handler + } + + /// Wait for pending IRQ handlers on other CPUs. + /// + /// This will attempt to access the inner [`Devres`] container. + pub fn try_synchronize(&self) -> Result { + let inner =3D self.inner.try_access().ok_or(ENODEV)?; + inner.synchronize(); + Ok(()) + } + + /// Wait for pending IRQ handlers on other CPUs. + pub fn synchronize(&self, dev: &Device) -> Result { + let inner =3D self.inner.access(dev)?; + inner.synchronize(); + Ok(()) + } +} + +/// # Safety +/// +/// This function should be only used as the callback in `request_threaded= _irq`. +unsafe extern "C" fn handle_threaded_irq_callback( + _irq: i32, + ptr: *mut c_void, +) -> c_uint { + // SAFETY: `ptr` is a pointer to T set in `ThreadedRegistration::new` + let handler =3D unsafe { &*(ptr as *const T) }; + T::handle(handler) as c_uint +} + +/// # Safety +/// +/// This function should be only used as the callback in `request_threaded= _irq`. +unsafe extern "C" fn thread_fn_callback(_irq: i32, ptr= : *mut c_void) -> c_uint { + // SAFETY: `ptr` is a pointer to T set in `ThreadedRegistration::new` + let handler =3D unsafe { &*(ptr as *const T) }; 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Mon, 11 Aug 2025 02:33:04 +0200 (CEST) From: Daniel Almeida Date: Sun, 10 Aug 2025 21:32:18 -0300 Subject: [PATCH v8 5/6] rust: platform: add irq accessors Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250810-topics-tyr-request_irq2-v8-5-8163f4c4c3a6@collabora.com> References: <20250810-topics-tyr-request_irq2-v8-0-8163f4c4c3a6@collabora.com> In-Reply-To: <20250810-topics-tyr-request_irq2-v8-0-8163f4c4c3a6@collabora.com> To: Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , Greg Kroah-Hartman , "Rafael J. Wysocki" , Thomas Gleixner , Bjorn Helgaas , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Benno Lossin Cc: linux-kernel@vger.kernel.org, rust-for-linux@vger.kernel.org, linux-pci@vger.kernel.org, Joel Fernandes , Dirk Behme , Daniel Almeida X-Mailer: b4 0.14.2 These accessors can be used to retrieve a irq::Registration and irq::ThreadedRegistration from a platform device by index or name. Alternatively, drivers can retrieve an IrqRequest from a bound platform device for later use. These accessors ensure that only valid IRQ lines can ever be registered. Reviewed-by: Alice Ryhl Tested-by: Joel Fernandes Tested-by: Dirk Behme Signed-off-by: Daniel Almeida --- rust/kernel/platform.rs | 142 ++++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 142 insertions(+) diff --git a/rust/kernel/platform.rs b/rust/kernel/platform.rs index 8f028c76f9fa6154f440b48921ba16573a9d3c54..8351588911991efaad8c749faf4= b3e6a35995e2c 100644 --- a/rust/kernel/platform.rs +++ b/rust/kernel/platform.rs @@ -10,6 +10,7 @@ driver, error::{from_result, to_result, Result}, io::{mem::IoRequest, Resource}, + irq::{self, IrqRequest}, of, prelude::*, types::Opaque, @@ -284,6 +285,147 @@ pub fn io_request_by_name(&self, name: &CStr) -> Opti= on> { } } =20 +macro_rules! define_irq_accessor_by_index { + ($(#[$meta:meta])* $fn_name:ident, $request_fn:ident, $reg_type:ident,= $handler_trait:ident) =3D> { + $(#[$meta])* + pub fn $fn_name<'a, T: irq::$handler_trait + 'static>( + &'a self, + flags: irq::flags::Flags, + index: u32, + name: &'static CStr, + handler: impl PinInit + 'a, + ) -> Result, Error> + 'a> { + let request =3D self.$request_fn(index)?; + + Ok(irq::$reg_type::::new( + request, + flags, + name, + handler, + )) + } + }; +} + +macro_rules! define_irq_accessor_by_name { + ($(#[$meta:meta])* $fn_name:ident, $request_fn:ident, $reg_type:ident,= $handler_trait:ident) =3D> { + $(#[$meta])* + pub fn $fn_name<'a, T: irq::$handler_trait + 'static>( + &'a self, + flags: irq::flags::Flags, + irq_name: &CStr, + name: &'static CStr, + handler: impl PinInit + 'a, + ) -> Result, Error> + 'a> { + let request =3D self.$request_fn(irq_name)?; + + Ok(irq::$reg_type::::new( + request, + flags, + name, + handler, + )) + } + }; +} + +impl Device { + /// Returns an [`IrqRequest`] for the IRQ at the given index, if any. + pub fn irq_by_index(&self, index: u32) -> Result> { + // SAFETY: `self.as_raw` returns a valid pointer to a `struct plat= form_device`. + let irq =3D unsafe { bindings::platform_get_irq(self.as_raw(), ind= ex) }; + + if irq < 0 { + return Err(Error::from_errno(irq)); + } + + // SAFETY: `irq` is guaranteed to be a valid IRQ number for `&self= `. + Ok(unsafe { IrqRequest::new(self.as_ref(), irq as u32) }) + } + + /// Returns an [`IrqRequest`] for the IRQ at the given index, but does= not + /// print an error if the IRQ cannot be obtained. + pub fn optional_irq_by_index(&self, index: u32) -> Result> { + // SAFETY: `self.as_raw` returns a valid pointer to a `struct plat= form_device`. + let irq =3D unsafe { bindings::platform_get_irq_optional(self.as_r= aw(), index) }; + + if irq < 0 { + return Err(Error::from_errno(irq)); + } + + // SAFETY: `irq` is guaranteed to be a valid IRQ number for `&self= `. + Ok(unsafe { IrqRequest::new(self.as_ref(), irq as u32) }) + } + + /// Returns an [`IrqRequest`] for the IRQ with the given name, if any. + pub fn irq_by_name(&self, name: &CStr) -> Result> { + // SAFETY: `self.as_raw` returns a valid pointer to a `struct plat= form_device`. + let irq =3D unsafe { bindings::platform_get_irq_byname(self.as_raw= (), name.as_char_ptr()) }; + + if irq < 0 { + return Err(Error::from_errno(irq)); + } + + // SAFETY: `irq` is guaranteed to be a valid IRQ number for `&self= `. + Ok(unsafe { IrqRequest::new(self.as_ref(), irq as u32) }) + } + + /// Returns an [`IrqRequest`] for the IRQ with the given name, but doe= s not + /// print an error if the IRQ cannot be obtained. + pub fn optional_irq_by_name(&self, name: &CStr) -> Result> { + // SAFETY: `self.as_raw` returns a valid pointer to a `struct plat= form_device`. + let irq =3D unsafe { + bindings::platform_get_irq_byname_optional(self.as_raw(), name= .as_char_ptr()) + }; + + if irq < 0 { + return Err(Error::from_errno(irq)); + } + + // SAFETY: `irq` is guaranteed to be a valid IRQ number for `&self= `. + Ok(unsafe { IrqRequest::new(self.as_ref(), irq as u32) }) + } + + define_irq_accessor_by_index!( + /// Returns a [`irq::Registration`] for the IRQ at the given index. + request_irq_by_index, irq_by_index, Registration, Handler + ); + define_irq_accessor_by_name!( + /// Returns a [`irq::Registration`] for the IRQ with the given nam= e. + request_irq_by_name, irq_by_name, Registration, Handler + ); + define_irq_accessor_by_index!( + /// Does the same as [`Self::request_irq_by_index`], except that i= t does + /// not print an error message if the IRQ cannot be obtained. + request_optional_irq_by_index, optional_irq_by_index, Registration= , Handler + ); + define_irq_accessor_by_name!( + /// Does the same as [`Self::request_irq_by_name`], except that it= does + /// not print an error message if the IRQ cannot be obtained. + request_optional_irq_by_name, optional_irq_by_name, Registration, = Handler + ); + + define_irq_accessor_by_index!( + /// Returns a [`irq::ThreadedRegistration`] for the IRQ at the giv= en index. + request_threaded_irq_by_index, irq_by_index, ThreadedRegistration,= ThreadedHandler + ); + define_irq_accessor_by_name!( + /// Returns a [`irq::ThreadedRegistration`] for the IRQ with the g= iven name. + request_threaded_irq_by_name, irq_by_name, ThreadedRegistration, T= hreadedHandler + ); + define_irq_accessor_by_index!( + /// Does the same as [`Self::request_threaded_irq_by_index`], exce= pt + /// that it does not print an error message if the IRQ cannot be + /// obtained. + request_optional_threaded_irq_by_index, optional_irq_by_index, Thr= eadedRegistration, ThreadedHandler + ); + define_irq_accessor_by_name!( + /// Does the same as [`Self::request_threaded_irq_by_name`], excep= t that + /// it does not print an error message if the IRQ cannot be obtain= ed. + request_optional_threaded_irq_by_name, optional_irq_by_name, Threa= dedRegistration, ThreadedHandler + ); +} + // SAFETY: `Device` is a transparent wrapper of a type that doesn't depend= on `Device`'s generic // argument. kernel::impl_device_context_deref!(unsafe { Device }); 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Mon, 11 Aug 2025 02:33:10 +0200 (CEST) From: Daniel Almeida Date: Sun, 10 Aug 2025 21:32:19 -0300 Subject: [PATCH v8 6/6] rust: pci: add irq accessors Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250810-topics-tyr-request_irq2-v8-6-8163f4c4c3a6@collabora.com> References: <20250810-topics-tyr-request_irq2-v8-0-8163f4c4c3a6@collabora.com> In-Reply-To: <20250810-topics-tyr-request_irq2-v8-0-8163f4c4c3a6@collabora.com> To: Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , Greg Kroah-Hartman , "Rafael J. Wysocki" , Thomas Gleixner , Bjorn Helgaas , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Benno Lossin Cc: linux-kernel@vger.kernel.org, rust-for-linux@vger.kernel.org, linux-pci@vger.kernel.org, Joel Fernandes , Dirk Behme , Daniel Almeida X-Mailer: b4 0.14.2 These accessors can be used to retrieve a irq::Registration or a irq::ThreadedRegistration from a pci device. Alternatively, drivers can retrieve an IrqRequest from a bound PCI device for later use. These accessors ensure that only valid IRQ lines can ever be registered. Reviewed-by: Alice Ryhl Tested-by: Joel Fernandes Tested-by: Dirk Behme Signed-off-by: Daniel Almeida --- rust/helpers/pci.c | 8 ++++++++ rust/kernel/pci.rs | 45 +++++++++++++++++++++++++++++++++++++++++++-- 2 files changed, 51 insertions(+), 2 deletions(-) diff --git a/rust/helpers/pci.c b/rust/helpers/pci.c index ef9cb38c81a6a5375f72c3676cd9730aad17757b..5bf56004478c6945dc3e1a394fc= d787c656d8b2a 100644 --- a/rust/helpers/pci.c +++ b/rust/helpers/pci.c @@ -11,3 +11,11 @@ bool rust_helper_dev_is_pci(const struct device *dev) { return dev_is_pci(dev); } + +#ifndef CONFIG_PCI_MSI +int rust_helper_pci_irq_vector(struct pci_dev *pdev, unsigned int nvec) +{ + return pci_irq_vector(pdev, nvec); +} + +#endif diff --git a/rust/kernel/pci.rs b/rust/kernel/pci.rs index 887ee611b55310e7edbd512f9017b708ff9d7bd8..d84ebabb8d04a932e68e48d40fe= f667dcda25ded 100644 --- a/rust/kernel/pci.rs +++ b/rust/kernel/pci.rs @@ -10,8 +10,8 @@ devres::Devres, driver, error::{from_result, to_result, Result}, - io::Io, - io::IoRaw, + io::{Io, IoRaw}, + irq::{self, IrqRequest}, str::CStr, types::{ARef, Opaque}, ThisModule, @@ -431,6 +431,47 @@ pub fn iomap_region<'a>( ) -> impl PinInit, Error> + 'a { self.iomap_region_sized::<0>(bar, name) } + + /// Returns an [`IrqRequest`] for the IRQ vector at the given index, i= f any. + pub fn irq_vector(&self, index: u32) -> Result> { + // SAFETY: `self.as_raw` returns a valid pointer to a `struct pci_= dev`. + let irq =3D unsafe { crate::bindings::pci_irq_vector(self.as_raw()= , index) }; + if irq < 0 { + return Err(crate::error::Error::from_errno(irq)); + } + // SAFETY: `irq` is guaranteed to be a valid IRQ number for `&self= `. + Ok(unsafe { IrqRequest::new(self.as_ref(), irq as u32) }) + } + + /// Returns a [`kernel::irq::Registration`] for the IRQ vector at the = given + /// index. + pub fn request_irq<'a, T: crate::irq::Handler + 'static>( + &'a self, + index: u32, + flags: irq::flags::Flags, + name: &'static CStr, + handler: impl PinInit + 'a, + ) -> Result, Error> + 'a> { + let request =3D self.irq_vector(index)?; + + Ok(irq::Registration::::new(request, flags, name, handler)) + } + + /// Returns a [`kernel::irq::ThreadedRegistration`] for the IRQ vector= at + /// the given index. + pub fn request_threaded_irq<'a, T: crate::irq::ThreadedHandler + 'stat= ic>( + &'a self, + index: u32, + flags: irq::flags::Flags, + name: &'static CStr, + handler: impl PinInit + 'a, + ) -> Result, Error> + 'a> { + let request =3D self.irq_vector(index)?; + + Ok(irq::ThreadedRegistration::::new( + request, flags, name, handler, + )) + } } =20 impl Device { --=20 2.50.1