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Thu, 7 Aug 2025 23:58:45 -0700 From: Haotien Hsu To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , "Jonathan Hunter" , Mathias Nyman , "Brad Griffis" , Sumit Gupta , "Vedant Deshpande" , Akhil R , Jinjie Ruan , , , , CC: Haotien Hsu , Henry Lin , "Jui Chang Kuo" , Wayne Chang , WK Tsai Subject: [PATCH v2 1/4] dt-bindings: usb: Add wake-up support for Tegra234 XUSB host controller Date: Fri, 8 Aug 2025 14:57:30 +0800 Message-ID: <20250808065733.347264-2-haotienh@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250808065733.347264-1-haotienh@nvidia.com> References: <20250808065733.347264-1-haotienh@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF0000000A:EE_|IA1PR12MB6483:EE_ X-MS-Office365-Filtering-Correlation-Id: ca1896d6-c714-4bae-fabe-08ddd6490f29 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|7416014|36860700013|1800799024|921020; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Aug 2025 06:59:03.0476 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ca1896d6-c714-4bae-fabe-08ddd6490f29 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF0000000A.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6483 Content-Type: text/plain; charset="utf-8" Populate USB wake events for Tegra234 XUSB host controller. These wake-up events are optional to maintain backward compatibility and because the USB controller does not require them for normal operation. Signed-off-by: Haotien Hsu Acked-by: Conor Dooley --- V1->V2 - Add the Acked-by tag to the commit message. --- .../bindings/usb/nvidia,tegra234-xusb.yaml | 28 +++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yam= l b/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml index db761dcbf72a..6365c6647cd7 100644 --- a/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml @@ -32,9 +32,32 @@ properties: - const: bar2 =20 interrupts: + minItems: 2 items: - description: xHCI host interrupt - description: mailbox interrupt + - description: USB wake event 0 + - description: USB wake event 1 + - description: USB wake event 2 + - description: USB wake event 3 + - description: USB wake event 4 + - description: USB wake event 5 + - description: USB wake event 6 + description: | + The first two interrupts are required for the USB host controller. T= he remaining USB wake + event interrupts are optional. Each USB wake event is independent; i= t is not necessary to use + all of these events on a platform. The USB host controller can funct= ion even if no wake-up + events are defined. The USB wake event interrupts are handled by the= Tegra PMC; hence, the + interrupt controller for these is the PMC and the interrupt IDs corr= espond to the PMC wake + event IDs. A complete list of wake event IDs is provided below, and = this information is also + present in the Tegra TRM document. + PMC wake-up 76 for USB3 port 0 wakeup + PMC wake-up 77 for USB3 port 1 wakeup + PMC wake-up 78 for USB3 port 2 and port 3 wakeup + PMC wake-up 79 for USB2 port 0 wakeup + PMC wake-up 80 for USB2 port 1 wakeup + PMC wake-up 81 for USB2 port 2 wakeup + PMC wake-up 82 for USB2 port 3 wakeup =20 clocks: items: @@ -127,8 +150,9 @@ examples: <0x03650000 0x10000>; reg-names =3D "hcd", "fpci", "bar2"; =20 - interrupts =3D , - ; + interrupts-extended =3D <&gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, + <&pmc 76 IRQ_TYPE_LEVEL_HIGH>; =20 clocks =3D <&bpmp TEGRA234_CLK_XUSB_CORE_HOST>, <&bpmp TEGRA234_CLK_XUSB_FALCON>, --=20 2.34.1 From nobody Sun Oct 5 05:33:01 2025 Received: from NAM12-BN8-obe.outbound.protection.outlook.com (mail-bn8nam12on2055.outbound.protection.outlook.com [40.107.237.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8483914885D; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Aug 2025 06:59:09.5697 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3d5fb787-5576-4477-5746-08ddd6491307 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000066ED.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB9114 Content-Type: text/plain; charset="utf-8" Add interrupts for Tegra234 USB wake events to support the USB wake-up function. Signed-off-by: Haotien Hsu --- arch/arm64/boot/dts/nvidia/tegra234.dtsi | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts= /nvidia/tegra234.dtsi index 2601b43b2d8c..9cf573fed6cb 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi @@ -3254,8 +3254,15 @@ usb@3610000 { <0x0 0x03650000 0x0 0x10000>; reg-names =3D "hcd", "fpci", "bar2"; =20 - interrupts =3D , - ; + interrupts-extended =3D <&gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, + <&pmc 76 IRQ_TYPE_LEVEL_HIGH>, + <&pmc 77 IRQ_TYPE_LEVEL_HIGH>, + <&pmc 78 IRQ_TYPE_LEVEL_HIGH>, + <&pmc 79 IRQ_TYPE_LEVEL_HIGH>, + <&pmc 80 IRQ_TYPE_LEVEL_HIGH>, + <&pmc 81 IRQ_TYPE_LEVEL_HIGH>, + <&pmc 82 IRQ_TYPE_LEVEL_HIGH>; =20 clocks =3D <&bpmp TEGRA234_CLK_XUSB_CORE_HOST>, <&bpmp TEGRA234_CLK_XUSB_FALCON>, --=20 2.34.1 From nobody Sun Oct 5 05:33:01 2025 Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on2068.outbound.protection.outlook.com [40.107.93.68]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E76E223DE7; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Aug 2025 06:59:09.6248 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a2804e3e-6e5f-4c88-d5df-08ddd6491317 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF0000000F.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7771 Content-Type: text/plain; charset="utf-8" Add USB wake events for Tegra234 so that system can be woken up from suspend when USB devices hot-plug/unplug event is detected. Signed-off-by: Haotien Hsu --- drivers/soc/tegra/pmc.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index 51b9d852bb6a..bf3a46e24aa3 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -4209,6 +4209,13 @@ static const struct tegra_wake_event tegra234_wake_e= vents[] =3D { TEGRA_WAKE_GPIO("power", 29, 1, TEGRA234_AON_GPIO(EE, 4)), TEGRA_WAKE_GPIO("mgbe", 56, 0, TEGRA234_MAIN_GPIO(Y, 3)), TEGRA_WAKE_IRQ("rtc", 73, 10), + TEGRA_WAKE_IRQ("usb3-port-0", 76, 167), + TEGRA_WAKE_IRQ("usb3-port-1", 77, 167), + TEGRA_WAKE_IRQ("usb3-port-2-3", 78, 167), + TEGRA_WAKE_IRQ("usb2-port-0", 79, 167), + TEGRA_WAKE_IRQ("usb2-port-1", 80, 167), + TEGRA_WAKE_IRQ("usb2-port-2", 81, 167), + TEGRA_WAKE_IRQ("usb2-port-3", 82, 167), TEGRA_WAKE_IRQ("sw-wake", SW_WAKE_ID, 179), }; =20 --=20 2.34.1 From nobody Sun Oct 5 05:33:01 2025 Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2085.outbound.protection.outlook.com [40.107.94.85]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E75923770D; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Aug 2025 06:59:15.7618 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0290d2a4-136c-4c30-0c4d-08ddd64916b8 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000066EC.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYXPR12MB9427 Content-Type: text/plain; charset="utf-8" When the system is suspended, USB hot-plugging/unplugging can trigger wake events of the Tegra USB host controller. Enable support for USB wake-up events by parsing device-tree to see if the interrupts for the wake-up events are present and if so configure those interrupts. Note that if wake-up events are not present, still allow the USB host controller to probe as normal. Signed-off-by: Haotien Hsu --- V1->V2 - Fix the -Wunused-variable warning in xhci-tegra.c. --- drivers/usb/host/xhci-tegra.c | 82 ++++++++++++++++++++++++++++++++++- 1 file changed, 80 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index b5c362c2051d..b419f0917feb 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -155,6 +155,8 @@ #define FW_IOCTL_TYPE_SHIFT 24 #define FW_IOCTL_CFGTBL_READ 17 =20 +#define WAKE_IRQ_START_INDEX 2 + struct tegra_xusb_fw_header { __le32 boot_loadaddr_in_imem; __le32 boot_codedfi_offset; @@ -228,6 +230,7 @@ struct tegra_xusb_soc { unsigned int num_supplies; const struct tegra_xusb_phy_type *phy_types; unsigned int num_types; + unsigned int max_num_wakes; const struct tegra_xusb_context_soc *context; =20 struct { @@ -263,6 +266,7 @@ struct tegra_xusb { int xhci_irq; int mbox_irq; int padctl_irq; + int *wake_irqs; =20 void __iomem *ipfs_base; void __iomem *fpci_base; @@ -313,6 +317,7 @@ struct tegra_xusb { bool suspended; struct tegra_xusb_context context; u8 lp0_utmi_pad_mask; + int num_wakes; }; =20 static struct hc_driver __read_mostly tegra_xhci_hc_driver; @@ -1534,6 +1539,58 @@ static void tegra_xusb_deinit_usb_phy(struct tegra_x= usb *tegra) otg_set_host(tegra->usbphy[i]->otg, NULL); } =20 +static int tegra_xusb_setup_wakeup(struct platform_device *pdev, struct te= gra_xusb *tegra) +{ + unsigned int i; + + if (tegra->soc->max_num_wakes =3D=3D 0) + return 0; + + tegra->wake_irqs =3D devm_kcalloc(tegra->dev, + tegra->soc->max_num_wakes, + sizeof(*tegra->wake_irqs), GFP_KERNEL); + if (!tegra->wake_irqs) + return -ENOMEM; + + /* + * USB wake events are independent of each other, so it is not necessary = for a platform + * to utilize all wake-up events supported for a given device. The USB ho= st can operate + * even if wake-up events are not defined or fail to be configured. There= fore, we only + * return critical errors, such as -ENOMEM. + */ + for (i =3D 0; i < tegra->soc->max_num_wakes; i++) { + struct irq_data *data; + + tegra->wake_irqs[i] =3D platform_get_irq(pdev, i + WAKE_IRQ_START_INDEX); + if (tegra->wake_irqs[i] < 0) + break; + + data =3D irq_get_irq_data(tegra->wake_irqs[i]); + if (!data) { + dev_warn(tegra->dev, "get wake event %d irq data fail\n", i); + irq_dispose_mapping(tegra->wake_irqs[i]); + break; + } + + irq_set_irq_type(tegra->wake_irqs[i], irqd_get_trigger_type(data)); + } + + tegra->num_wakes =3D i; + dev_dbg(tegra->dev, "setup %d wake events\n", tegra->num_wakes); + + return 0; +} + +static void tegra_xusb_dispose_wake(struct tegra_xusb *tegra) +{ + unsigned int i; + + for (i =3D 0; i < tegra->num_wakes; i++) + irq_dispose_mapping(tegra->wake_irqs[i]); + + tegra->num_wakes =3D 0; +} + static int tegra_xusb_probe(struct platform_device *pdev) { struct tegra_xusb *tegra; @@ -1584,9 +1641,15 @@ static int tegra_xusb_probe(struct platform_device *= pdev) if (tegra->mbox_irq < 0) return tegra->mbox_irq; =20 + err =3D tegra_xusb_setup_wakeup(pdev, tegra); + if (err) + return err; + tegra->padctl =3D tegra_xusb_padctl_get(&pdev->dev); - if (IS_ERR(tegra->padctl)) - return PTR_ERR(tegra->padctl); + if (IS_ERR(tegra->padctl)) { + err =3D PTR_ERR(tegra->padctl); + goto dispose_wake; + } =20 np =3D of_parse_phandle(pdev->dev.of_node, "nvidia,xusb-padctl", 0); if (!np) { @@ -1910,6 +1973,8 @@ static int tegra_xusb_probe(struct platform_device *p= dev) put_padctl: of_node_put(np); tegra_xusb_padctl_put(tegra->padctl); +dispose_wake: + tegra_xusb_dispose_wake(tegra); return err; } =20 @@ -1942,6 +2007,8 @@ static void tegra_xusb_remove(struct platform_device = *pdev) if (tegra->padctl_irq) pm_runtime_disable(&pdev->dev); =20 + tegra_xusb_dispose_wake(tegra); + pm_runtime_put(&pdev->dev); =20 tegra_xusb_disable(tegra); @@ -2352,8 +2419,13 @@ static __maybe_unused int tegra_xusb_suspend(struct = device *dev) pm_runtime_disable(dev); =20 if (device_may_wakeup(dev)) { + unsigned int i; + if (enable_irq_wake(tegra->padctl_irq)) dev_err(dev, "failed to enable padctl wakes\n"); + + for (i =3D 0; i < tegra->num_wakes; i++) + enable_irq_wake(tegra->wake_irqs[i]); } } =20 @@ -2381,8 +2453,13 @@ static __maybe_unused int tegra_xusb_resume(struct d= evice *dev) } =20 if (device_may_wakeup(dev)) { + unsigned int i; + if (disable_irq_wake(tegra->padctl_irq)) dev_err(dev, "failed to disable padctl wakes\n"); + + for (i =3D 0; i < tegra->num_wakes; i++) + disable_irq_wake(tegra->wake_irqs[i]); } tegra->suspended =3D false; mutex_unlock(&tegra->lock); @@ -2633,6 +2710,7 @@ static const struct tegra_xusb_soc tegra234_soc =3D { .num_supplies =3D ARRAY_SIZE(tegra194_supply_names), .phy_types =3D tegra194_phy_types, .num_types =3D ARRAY_SIZE(tegra194_phy_types), + .max_num_wakes =3D 7, .context =3D &tegra186_xusb_context, .ports =3D { .usb3 =3D { .offset =3D 0, .count =3D 4, }, --=20 2.34.1