From nobody Fri Dec 19 08:07:57 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2D5C42737E7 for ; Fri, 8 Aug 2025 10:13:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754648009; cv=none; b=K7vISF+WuS1sA7xRS2MhAdjqjn2mmHN6t6HneBTTmjOjg/XcKdyN8pF6B6ydkDpdNXW4Mpju9B1fzT6BlrcqeR8e21GXENlfZYWB0muGrCJJb+mDIKgjgVYlDM6ZNEaBQndQyNyHLdBJpxWX6wzFcbV//ScHmUOeBwzYXLQnFT0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754648009; c=relaxed/simple; bh=6BxldXnQ4/dZPdvpOlWI/uAeZdy42Of2YFE8ojwyPcg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=LTZasXRA5ZUjw2+w9M27DIocvu4JGshJ7RPT2dw5berXW3vhH/dJZnSlDLyR9+3e3Br+nFoWVJSWHGJCqFo0PJOddSFFMxQBCfX+dTOM9Uc5pvUFncmBRvVkqGyaaZ3aOOFzrAZM7QaQsUToi0QwfELh7csNjiOD/gQMFUtMo1U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=WQdpEwAq; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="WQdpEwAq" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1754648005; bh=6BxldXnQ4/dZPdvpOlWI/uAeZdy42Of2YFE8ojwyPcg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=WQdpEwAqC98ZAQN6lOtdOjG3JjmLfJd//khs52jKS62Fi6zzsITJ1ip3bqknf6vnu vG2AAdp8jAD0WcyJyRZuV75msdloO5CiSMPvQHG9WyZY+/8oZRRQcwspwMHVfBm1a7 75DZg3KyxNlv/zbMd8WyxS+mYowJxw9LFMHkEQRUncwOpbgd8H824qSO9YrCgCcxdX 8bJozjSb+N2XrAtCBbJwkBgX+uNwqyDhapu9EWdM2eU1ZYT24nixpZKc7mwgPuz84h Q2Lzoo7xPkWRDgsF8G7zZTZ9rU8HN7MByPdv1d93RuitXVKUS4ce8syb1BHqkLBLjH Aidt8wVzqEz2A== Received: from yukiji.home (amontpellier-657-1-116-247.w83-113.abo.wanadoo.fr [83.113.51.247]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: laeyraud) by bali.collaboradmins.com (Postfix) with ESMTPSA id DB82F17E1277; Fri, 8 Aug 2025 12:13:24 +0200 (CEST) From: Louis-Alexis Eyraud Date: Fri, 08 Aug 2025 12:12:13 +0200 Subject: [PATCH v10 03/10] drm/mediatek: mtk_hdmi: Add HDMI IP version configuration to pdata Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250808-mediatek-drm-hdmi-v2-v10-3-21ea82eec1f6@collabora.com> References: <20250808-mediatek-drm-hdmi-v2-v10-0-21ea82eec1f6@collabora.com> In-Reply-To: <20250808-mediatek-drm-hdmi-v2-v10-0-21ea82eec1f6@collabora.com> To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Simona Vetter , Matthias Brugger , AngeloGioacchino Del Regno , CK Hu Cc: kernel@collabora.com, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Louis-Alexis Eyraud X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1754648002; l=4617; i=louisalexis.eyraud@collabora.com; s=20250113; h=from:subject:message-id; bh=ZtM41epaTDPJUP1XU4R6Byolcll2dwLNLe8c/CHQCYc=; b=4wX5iFSp5QpsXBR/pL/B9gdWUTPDd7j54Dw3B+aRbEhd5/xgjTv6FINqgo1AXNRGJtAAC2uOK ztZ5vuyajbuDESlmWwOen1JqKL/dJTjLBgAa5E3VAsKWB5jV6XE3/Qi X-Developer-Key: i=louisalexis.eyraud@collabora.com; a=ed25519; pk=CHFBDB2Kqh4EHc6JIqFn69GhxJJAzc0Zr4e8QxtumuM= From: AngeloGioacchino Del Regno In preparation for adding a driver for the HDMIv2 IP and before moving the common bits out of this driver, add a new structure `mtk_hdmi_ver_conf`, holding pointers to HDMI IP version specific drm_bridge_funcs, hdmi_codec_ops and clock array used for probe, and nest it into the mtk_hdmi_conf platform data structure. While at it, also convert all of the direct users of mtk_hdmi_bridge_funcs, mtk_hdmi_audio_codec_ops, mtk_hdmi_clk_names to use pointers from the ver_conf platform data. In order to do so, it was also necessary to fill a new version 1 specific const `mtk_hdmi_v1_ver_conf` and assign it to all of the currently supported compatibles for this driver. This commit brings no functional change. Reviewed-by: CK Hu Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Louis-Alexis Eyraud --- drivers/gpu/drm/mediatek/mtk_hdmi.c | 45 ++++++++++++++++++++++++++++++---= ---- 1 file changed, 37 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c b/drivers/gpu/drm/mediatek= /mtk_hdmi.c index f38269616679544810edafd70fdd156aca14ad46..63534f5a1b4d5543cd8ba10b802= c9c5b50c542d9 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi.c +++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c @@ -144,7 +144,15 @@ struct hdmi_audio_param { struct hdmi_codec_params codec_params; }; =20 +struct mtk_hdmi_ver_conf { + const struct drm_bridge_funcs *bridge_funcs; + const struct hdmi_codec_ops *codec_ops; + const char * const *mtk_hdmi_clock_names; + int num_clocks; +}; + struct mtk_hdmi_conf { + const struct mtk_hdmi_ver_conf *ver_conf; bool tz_disabled; bool cea_modes_only; unsigned long max_mode_clock; @@ -1602,7 +1610,7 @@ static int mtk_hdmi_register_audio_driver(struct devi= ce *dev) struct mtk_hdmi *hdmi =3D dev_get_drvdata(dev); struct hdmi_audio_param *aud_param =3D &hdmi->aud_param; struct hdmi_codec_pdata codec_data =3D { - .ops =3D &mtk_hdmi_audio_codec_ops, + .ops =3D hdmi->conf->ver_conf->codec_ops, .max_i2s_channels =3D 2, .i2s =3D 1, .data =3D hdmi, @@ -1635,24 +1643,32 @@ static int mtk_hdmi_register_audio_driver(struct de= vice *dev) =20 static int mtk_hdmi_probe(struct platform_device *pdev) { + const struct mtk_hdmi_ver_conf *ver_conf; + const struct mtk_hdmi_conf *hdmi_conf; struct mtk_hdmi *hdmi; struct device *dev =3D &pdev->dev; - const int num_clocks =3D MTK_HDMI_CLK_COUNT; int ret; =20 + hdmi_conf =3D of_device_get_match_data(dev); + if (!hdmi_conf) + return -ENODEV; + + ver_conf =3D hdmi_conf->ver_conf; + hdmi =3D devm_drm_bridge_alloc(dev, struct mtk_hdmi, bridge, - &mtk_hdmi_bridge_funcs); + ver_conf->bridge_funcs); if (IS_ERR(hdmi)) return PTR_ERR(hdmi); =20 hdmi->dev =3D dev; - hdmi->conf =3D of_device_get_match_data(dev); + hdmi->conf =3D hdmi_conf; =20 - hdmi->clk =3D devm_kcalloc(dev, num_clocks, sizeof(*hdmi->clk), GFP_KERNE= L); + hdmi->clk =3D devm_kcalloc(dev, ver_conf->num_clocks, sizeof(*hdmi->clk),= GFP_KERNEL); if (!hdmi->clk) return -ENOMEM; =20 - ret =3D mtk_hdmi_dt_parse_pdata(hdmi, pdev, mtk_hdmi_clk_names, num_clock= s); + ret =3D mtk_hdmi_dt_parse_pdata(hdmi, pdev, ver_conf->mtk_hdmi_clock_name= s, + ver_conf->num_clocks); if (ret) return ret; =20 @@ -1713,19 +1729,32 @@ static __maybe_unused int mtk_hdmi_resume(struct de= vice *dev) =20 static SIMPLE_DEV_PM_OPS(mtk_hdmi_pm_ops, mtk_hdmi_suspend, mtk_hdmi_resum= e); =20 +static const struct mtk_hdmi_ver_conf mtk_hdmi_v1_ver_conf =3D { + .bridge_funcs =3D &mtk_hdmi_bridge_funcs, + .codec_ops =3D &mtk_hdmi_audio_codec_ops, + .mtk_hdmi_clock_names =3D mtk_hdmi_clk_names, + .num_clocks =3D ARRAY_SIZE(mtk_hdmi_clk_names) +}; + static const struct mtk_hdmi_conf mtk_hdmi_conf_mt2701 =3D { .tz_disabled =3D true, + .ver_conf =3D &mtk_hdmi_v1_ver_conf }; =20 static const struct mtk_hdmi_conf mtk_hdmi_conf_mt8167 =3D { - .max_mode_clock =3D 148500, .cea_modes_only =3D true, + .max_mode_clock =3D 148500, + .ver_conf =3D &mtk_hdmi_v1_ver_conf +}; + +static const struct mtk_hdmi_conf mtk_hdmi_conf_mt8173 =3D { + .ver_conf =3D &mtk_hdmi_v1_ver_conf }; =20 static const struct of_device_id mtk_hdmi_of_ids[] =3D { { .compatible =3D "mediatek,mt2701-hdmi", .data =3D &mtk_hdmi_conf_mt2701= }, { .compatible =3D "mediatek,mt8167-hdmi", .data =3D &mtk_hdmi_conf_mt8167= }, - { .compatible =3D "mediatek,mt8173-hdmi" }, + { .compatible =3D "mediatek,mt8173-hdmi", .data =3D &mtk_hdmi_conf_mt8173= }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, mtk_hdmi_of_ids); --=20 2.50.1