From nobody Sun Oct 5 09:07:16 2025 Received: from mail-wm1-f43.google.com (mail-wm1-f43.google.com [209.85.128.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4914228C2AF; Wed, 6 Aug 2025 13:53:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754488436; cv=none; b=pYUOhOpMNWjM27szJiH0A6D1NjrGzb2+Rlfq1YcnjCp4jaRw0qClT00ebZL13tpIspLv5L3E477bfNWhx9EU0EyDnnU7Cr0ag1/11njVobH6kt18x8Qp9MG5KOXMlhb2ziqfbvlXB3HFa9GW/34f1tzn265bhdBHW4k5enAGezI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754488436; c=relaxed/simple; bh=/MXUHVu4SjGsnCzUU6TgwBqYmyeo1SwjIbmUQZU/rGU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=nuqVCnTIhOiTCDaJvc3AJGmFzArr9eXAO5VWo5kBgHAFc+yuJCjAUqNBEoV2oD7blgT1bRVmrjvwCerB7ZcsqZx9Zlb1xi44t61U3zwZnIzEML4KroQY6FFGLEOxxixnEco500yzEE+u+rsQoo64JWjXYWQX/o+GlNQVow+xc7E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=JW+qeBp3; arc=none smtp.client-ip=209.85.128.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="JW+qeBp3" Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-4589b3e3820so65862815e9.3; Wed, 06 Aug 2025 06:53:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1754488432; x=1755093232; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tndjvhti5T2Zl4Ol7qDiEmHOBsRTv/ll2I8LWQdmTvM=; b=JW+qeBp3UfdxaBSCek7Q77bFnOGs/z932zDO17l6Rdevl5dFmspW1T9NC17B36jLfy 38x83wjXYsH8tPcN3IyT801oKcqET0nF97CqH5QpW3+8kpfkE7M+qizvVAKiKz6IndHe o7ji8O0QOLvkzSmQZiOfXyWwbDIpagkxOWHER9RIW75Ch6xresz2DLv5iUG0CpVG0z6U Q5y3Gj5mg3oyHxYCNjAJ+/zjItaNAwjdPHnLWh4FosKstLntHNkBM3/JV/3jebm5IH6D 8z4bQbx92nZEwuzMhMVvs53osLHUlbJYW1DPX2tMSgs3ozOFohr6Jc1ZSRzPamn2QK6S iSXw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1754488432; x=1755093232; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tndjvhti5T2Zl4Ol7qDiEmHOBsRTv/ll2I8LWQdmTvM=; b=F9YS4fMG8eP+x0g22w+MdsXkZiL5KXfcbvu3PUzjwpPUnJVvef+6fS1kXJEuY4eR4Q dLVTbbJP5bwGQE71u6l6ckXdnU/oaEMwwQqE0LPhNnDZQjAFlFoxKPtJZ47qr3g/TQRx QwB+nDYR9o/vG4oMktNbq0cPGXj+A1AG6yXn6cZx5vEWKdY8N+etxT/kVvd9qVfkh9pG KBlS+XQ+Mc4++Yvy7EcHYLiPxbKWlThXxiPONN7bFgEuP8Iiv9k/mf3m/3gkhr/bNZ1K BkK/NkuuwQFltIKQ3o/1yEe+ubKH7q3aYf6Azj3QJ/ED7v8qQNvj5SLKNyTgZ1OICdmz 3qFw== X-Forwarded-Encrypted: i=1; AJvYcCXZVcR9zkGKhHpjuaaZbTVB3VZOM5zqXQIBZ1IQu+Yx7NAe9m72uWaV6zqnpTyowzzRcz2rixh3asEe1xq9MB1l/1eD@vger.kernel.org X-Gm-Message-State: AOJu0YwnDVjNgz9rxsbaXuDqDWAcqU6eMFJRdnxq30azCRQvcY6Xu3TX 1V4BiMjwRpruHjsUWDUHZl7OP2IkcTV82xv0/FiYqndX/0XPFzp/NhyGhPOpqA== X-Gm-Gg: ASbGncukpSPuBg8xIjKEsVXEV0OiPI1Eu+oqiOFQqX9NHPiFpMAVWJC/SXlUvSBaQO9 qnezXvL3L0W2UBCfVW+kQU53MW4YUSb2pW7VmpGwLjljUnjMyqcecEpx+nPSl9g7xmwxbqZBlYG feYYYmlibP/UW/uuZl2BY4NNZwoqOlk6Ip4cp4wRxY0dMpucUMMfXDwm8beds+bClIUfjd4IXlz 0jbsFYgDDIq5pfjIYk+62v2rDcBRWeo/FrBaNaE2msv2lDMjIq0HEknrmB6jP8qah5ulV1mWHhu pOc/igczpKFxlifEw5ZKEC0Ef/+yeliwrnJ/a3zBGs9HUkRrfE2LkH5JZ0jVx68+g6wCItBlEWj FqUTPkbodZxTEBPsjesYxp+c5 X-Google-Smtp-Source: AGHT+IECcfE/931pKMPlTRE6iP9MtGOn+1MoMn/GD56zWy4bt2r2s/pS5Yxce4OoQuB5tSgAsRrXvQ== X-Received: by 2002:a05:600c:a06:b0:456:1dd2:4e47 with SMTP id 5b1f17b1804b1-459eb738ba4mr14403255e9.15.1754488432077; Wed, 06 Aug 2025 06:53:52 -0700 (PDT) Received: from denis-pc ([151.49.205.110]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b79c3bc12csm23646087f8f.28.2025.08.06.06.53.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Aug 2025 06:53:51 -0700 (PDT) From: Denis Benato To: linux-kernel@vger.kernel.org Cc: hdegoede@redhat.com, ilpo.jarvinen@linux.intel.com, platform-driver-x86@vger.kernel.org, mario.limonciello@amd.com, "Luke D . Jones" , Denis Benato Subject: [PATCH v10 1/8] platform/x86: asus-wmi: export symbols used for read/write WMI Date: Wed, 6 Aug 2025 15:53:12 +0200 Message-ID: <20250806135319.1205762-2-benato.denis96@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250806135319.1205762-1-benato.denis96@gmail.com> References: <20250806135319.1205762-1-benato.denis96@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Luke D. Jones" Export symbols for reading/writing WMI symbols using a namespace. Existing functions: - asus_wmi_evaluate_method - asus_wmi_set_devstate New function: - asus_wmi_get_devstate_dsts The new function is intended for use with DSTS WMI method only and avoids requiring the asus_wmi driver data to select the WMI method. Signed-off-by: Denis Benato Signed-off-by: Luke D. Jones Reviewed-by: Mario Limonciello --- drivers/platform/x86/asus-wmi.c | 40 ++++++++++++++++++++-- include/linux/platform_data/x86/asus-wmi.h | 5 +++ 2 files changed, 42 insertions(+), 3 deletions(-) diff --git a/drivers/platform/x86/asus-wmi.c b/drivers/platform/x86/asus-wm= i.c index f7191fdded14..e31e0264a160 100644 --- a/drivers/platform/x86/asus-wmi.c +++ b/drivers/platform/x86/asus-wmi.c @@ -390,7 +390,7 @@ int asus_wmi_evaluate_method(u32 method_id, u32 arg0, u= 32 arg1, u32 *retval) { return asus_wmi_evaluate_method3(method_id, arg0, arg1, 0, retval); } -EXPORT_SYMBOL_GPL(asus_wmi_evaluate_method); +EXPORT_SYMBOL_NS_GPL(asus_wmi_evaluate_method, "ASUS_WMI"); =20 static int asus_wmi_evaluate_method5(u32 method_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3, u32 arg4, u32 *retval) @@ -554,12 +554,46 @@ static int asus_wmi_get_devstate(struct asus_wmi *asu= s, u32 dev_id, u32 *retval) return 0; } =20 -int asus_wmi_set_devstate(u32 dev_id, u32 ctrl_param, - u32 *retval) +/** + * asus_wmi_get_devstate_dsts() - Get the WMI function state. + * @dev_id: The WMI method ID to call. + * @retval: A pointer to where to store the value returned from WMI. + * @return: 0 on success and retval is filled. + * @return: -ENODEV if the method ID is unsupported. + * @return: everything else is an error from WMI call. + */ +int asus_wmi_get_devstate_dsts(u32 dev_id, u32 *retval) +{ + int err; + + err =3D asus_wmi_evaluate_method(ASUS_WMI_METHODID_DSTS, dev_id, 0, retva= l); + if (err) + return err; + + if (*retval =3D=3D ASUS_WMI_UNSUPPORTED_METHOD) + return -ENODEV; + + return 0; +} +EXPORT_SYMBOL_NS_GPL(asus_wmi_get_devstate_dsts, "ASUS_WMI"); + +/** + * asus_wmi_set_devstate() - Set the WMI function state. + * @dev_id: The WMI function to call. + * @ctrl_param: The argument to be used for this WMI function. + * @retval: A pointer to where to store the value returned from WMI. + * @return: 0 on success and retval is filled. + * @return: everything else is an error from WMI call. + * + * A asus_wmi_set_devstate() call must be paired with a + * asus_wmi_get_devstate_dsts() to check if the WMI function is supported. + */ +int asus_wmi_set_devstate(u32 dev_id, u32 ctrl_param, u32 *retval) { return asus_wmi_evaluate_method(ASUS_WMI_METHODID_DEVS, dev_id, ctrl_param, retval); } +EXPORT_SYMBOL_NS_GPL(asus_wmi_set_devstate, "ASUS_WMI"); =20 /* Helper for special devices with magic return codes */ static int asus_wmi_get_devstate_bits(struct asus_wmi *asus, diff --git a/include/linux/platform_data/x86/asus-wmi.h b/include/linux/pla= tform_data/x86/asus-wmi.h index 8a515179113d..dbd44d9fbb6f 100644 --- a/include/linux/platform_data/x86/asus-wmi.h +++ b/include/linux/platform_data/x86/asus-wmi.h @@ -166,6 +166,7 @@ enum asus_ally_mcu_hack { #if IS_REACHABLE(CONFIG_ASUS_WMI) void set_ally_mcu_hack(enum asus_ally_mcu_hack status); void set_ally_mcu_powersave(bool enabled); +int asus_wmi_get_devstate_dsts(u32 dev_id, u32 *retval); int asus_wmi_set_devstate(u32 dev_id, u32 ctrl_param, u32 *retval); int asus_wmi_evaluate_method(u32 method_id, u32 arg0, u32 arg1, u32 *retva= l); #else @@ -179,6 +180,10 @@ static inline int asus_wmi_set_devstate(u32 dev_id, u3= 2 ctrl_param, u32 *retval) { return -ENODEV; } +static inline int asus_wmi_get_devstate_dsts(u32 dev_id, u32 *retval) +{ + return -ENODEV; +} static inline int asus_wmi_evaluate_method(u32 method_id, u32 arg0, u32 ar= g1, u32 *retval) { --=20 2.50.1 From nobody Sun Oct 5 09:07:16 2025 Received: from mail-wr1-f52.google.com (mail-wr1-f52.google.com [209.85.221.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1391E28C5D1; Wed, 6 Aug 2025 13:53:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754488437; cv=none; b=J7laG1PkQYYkYA3xvbYG42TI4JCP75fyXmWLluTPsCmYE6pHD6Gx98XkRKU31/N9Z2ryJCa+LxFT0DrLpOqgAHgI/xCiG4wCdJB2vwX/bwt8dk+r/sl6ankHEQ+1pGOAgIdlfh+p5vTUZ/lJJeOknkUm4mIkujShcR9tmQmYEpQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754488437; c=relaxed/simple; bh=HtoVLCN+NHHPtI2jdS3sWMkCTl9Zv1UNH6SJdOduu1g=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=KkuTY+LbqRMdXJLe7cduD1iW4noXCIceMaQb+Dt8wYEwFBbqTdNCs3JzAM8ET2YQ6G+RzpOtiI+XyIHGNZcIoFb1dOGTbZ1H6y+wWW9mEUUMEMuyhga4ZUi5EZ4XmXGcP5M9aPVRCPDGT6QrCFTeD2zQBnyw5wzedfVIOZ37o9c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=PJZXortS; arc=none smtp.client-ip=209.85.221.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="PJZXortS" Received: by mail-wr1-f52.google.com with SMTP id ffacd0b85a97d-3b78d729bb8so4510849f8f.0; Wed, 06 Aug 2025 06:53:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1754488433; x=1755093233; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mlnUw1KjI1jXjlVGT1rPDfMQ6/L6WDB/s13TMd/3G1A=; b=PJZXortSP+H5TfL9arHHojQEJiZoaqkrbpl6i5UUQ54qERGWSzezmpjOBb4DXN44KV ObqS0ajoEXm4W1lD8q+ccEnokOFhd07d3yhBdeQYFdj0zzwMr/iJvHrp/bBfpLp85A4b 8WQdIOtuda+TmJpCPUSKs38cgaB1mtilBQyoKyYDb2niDS+yfxYUTlI5UBsOvo0x9Udp ZhF4ABSIETtx9QPN7zey/KN5SUsSZGRptvcEDctpheNyVWTsvp4OzlgTkaqNEkI2SguT Jnuh9cq5L2b7p43s3DRaGX9cx5MG56m0OII4KhfWmFkajwx0E0DR/Am0sW7cuSIYHfUW CZCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1754488433; x=1755093233; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mlnUw1KjI1jXjlVGT1rPDfMQ6/L6WDB/s13TMd/3G1A=; b=w0JVuibGFAS2c9qmdxR1M/J36t8uPiZSidOa5yjLV2LTwLaIKDNXV5hD43jZtJ1LUz siSB4O/BR9mtZTi8LXaJkkbFhiVmc2Qijg93t+VZdF3BgJJgarfXINoPm5yLtKSOThp/ /ypx21n2kIWaAdfSfWurQzjBXtzag7EBm3jQ/TZ2tBL7OAvEIuqlXFdAxLvFDXktHUXQ 8UApSwwXUTmUNBt/Oo74KadQ890J/hMMqDqUbFywJiTWaveOOUs6AjV/CzHOBAAXi6x9 pq+OzIqStSfK40l93wOWhyFWpUdZfAYlPI27wGf3ye0h5tx6wbMeChEc9nS1NJ1N6V6P j9Dg== X-Forwarded-Encrypted: i=1; AJvYcCU9Hb2YK6cCzaGfIJaK4inyt9Q4QWqKC/F3KAjgW3AjZeggfOE+5uVVPBDOQmJAifJ+tM7nXb3/RAhVI0YmBActg2JR@vger.kernel.org X-Gm-Message-State: AOJu0YwhmvrelTYVqPvkflAkKxfv9CgEQaeNOfVsI3licdRSgD7xLKAi XnHLqT18SegegRX1e3zP/JI+BsUHGoWM8ymHpcDVJFLg+Au9O75HzbM+CBCo8g== X-Gm-Gg: ASbGncu5sh7WFxxw0zKwnIs9DOIgQTQfKixlUemQ1MvdVLN/4wLLGmQcQ5VZsgy61KY Z2tU5k8jZMBnHmKMyreq3DVDrBaITwWkMO6LM/R4cRsablPbVmMg6jNB9siiHGuQnoyQ+nfpk28 eIrltWzrThfzQoliHWUYnWVH5kWTZUKaN1fsOw/Kzb8VkS46LqG6QGVHCzrEC+aowVf9C14u8K6 QLJjwjFp+5G6oSi7EiFzWNj4NVrChFoSY7fOdHyrqKOCcW7hslxmXSzzRxhrYFDRk24M8yxtW/4 2Uhkkn8LaQ2pSSuR22aGDD44LAh5K+T4bClBFpFndhJIul8zF3QNgSzAl6GfzI5pYVyyAHPvO6o 9SQ/06AABPYdkan7rYpLxhhtkFmEsU7XAy7C38qjaIXsTfA== X-Google-Smtp-Source: AGHT+IHiYvNDW9ICagOAXXYNeovDNJevlL8GuRzvEcrsQJmbT59iaJZRqz+quoNYV2gKz8T6IUxESg== X-Received: by 2002:a05:6000:2b01:b0:3b8:d12f:67f5 with SMTP id ffacd0b85a97d-3b8f4920060mr1399195f8f.34.1754488432919; Wed, 06 Aug 2025 06:53:52 -0700 (PDT) Received: from denis-pc ([151.49.205.110]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b79c3bc12csm23646087f8f.28.2025.08.06.06.53.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Aug 2025 06:53:52 -0700 (PDT) From: Denis Benato To: linux-kernel@vger.kernel.org Cc: hdegoede@redhat.com, ilpo.jarvinen@linux.intel.com, platform-driver-x86@vger.kernel.org, mario.limonciello@amd.com, "Luke D . Jones" , Denis Benato Subject: [PATCH v10 2/8] platform/x86: asus-armoury: move existing tunings to asus-armoury module Date: Wed, 6 Aug 2025 15:53:13 +0200 Message-ID: <20250806135319.1205762-3-benato.denis96@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250806135319.1205762-1-benato.denis96@gmail.com> References: <20250806135319.1205762-1-benato.denis96@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable From: "Luke D. Jones" The fw_attributes_class provides a much cleaner interface to all of the attributes introduced to asus-wmi. This patch moves all of these extra attributes over to fw_attributes_class, and shifts the bulk of these definitions to a new kernel module to reduce the clutter of asus-wmi with the intention of deprecating the asus-wmi attributes in future. The work applies only to WMI methods which don't have a clearly defined place within the sysfs and as a result ended up lumped together in /sys/devices/platform/asus-nb-wmi/ with no standard API. Where possible the fw attrs now implement defaults, min, max, scalar, choices, etc. As en example dgpu_disable becomes: /sys/class/firmware-attributes/asus-armoury/attributes/dgpu_disable/ =E2=94=9C=E2=94=80=E2=94=80 current_value =E2=94=9C=E2=94=80=E2=94=80 display_name =E2=94=9C=E2=94=80=E2=94=80 possible_values =E2=94=94=E2=94=80=E2=94=80 type as do other attributes. Signed-off-by: Denis Benato Signed-off-by: Luke D. Jones Reviewed-by: Mario Limonciello --- drivers/platform/x86/Kconfig | 12 + drivers/platform/x86/Makefile | 1 + drivers/platform/x86/asus-armoury.c | 545 +++++++++++++++++++++ drivers/platform/x86/asus-armoury.h | 164 +++++++ drivers/platform/x86/asus-wmi.c | 4 - include/linux/platform_data/x86/asus-wmi.h | 5 + 6 files changed, 727 insertions(+), 4 deletions(-) create mode 100644 drivers/platform/x86/asus-armoury.c create mode 100644 drivers/platform/x86/asus-armoury.h diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig index 49ca98df47fd..f3464e30bd23 100644 --- a/drivers/platform/x86/Kconfig +++ b/drivers/platform/x86/Kconfig @@ -250,6 +250,18 @@ config ASUS_WIRELESS If you choose to compile this driver as a module the module will be called asus-wireless. =20 +config ASUS_ARMOURY + tristate "ASUS Armoury driver" + depends on ASUS_WMI + select FW_ATTR_CLASS + help + Say Y here if you have a WMI aware Asus machine and would like to use t= he + firmware_attributes API to control various settings typically exposed in + the ASUS Armoury Crate application available on Windows. + + To compile this driver as a module, choose M here: the module will + be called asus-armoury. + config ASUS_WMI tristate "ASUS WMI Driver" depends on ACPI_WMI diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile index 0530a224bebd..efbd0787c851 100644 --- a/drivers/platform/x86/Makefile +++ b/drivers/platform/x86/Makefile @@ -32,6 +32,7 @@ obj-$(CONFIG_APPLE_GMUX) +=3D apple-gmux.o # ASUS obj-$(CONFIG_ASUS_LAPTOP) +=3D asus-laptop.o obj-$(CONFIG_ASUS_WIRELESS) +=3D asus-wireless.o +obj-$(CONFIG_ASUS_ARMOURY) +=3D asus-armoury.o obj-$(CONFIG_ASUS_WMI) +=3D asus-wmi.o obj-$(CONFIG_ASUS_NB_WMI) +=3D asus-nb-wmi.o obj-$(CONFIG_ASUS_TF103C_DOCK) +=3D asus-tf103c-dock.o diff --git a/drivers/platform/x86/asus-armoury.c b/drivers/platform/x86/asu= s-armoury.c new file mode 100644 index 000000000000..57ed9449ec5f --- /dev/null +++ b/drivers/platform/x86/asus-armoury.c @@ -0,0 +1,545 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Asus Armoury (WMI) attributes driver. + * + * This driver uses the fw_attributes class to expose various WMI functions + * that are present in many gaming and some non-gaming ASUS laptops. + * + * These typically don't fit anywhere else in the sysfs such as under LED = class, + * hwmon or others, and are set in Windows using the ASUS Armoury Crate to= ol. + * + * Copyright(C) 2024 Luke Jones + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "asus-armoury.h" +#include "firmware_attributes_class.h" + +#define ASUS_NB_WMI_EVENT_GUID "0B3CBB35-E3C2-45ED-91C2-4C5A6D195D1C" + +#define ASUS_MINI_LED_MODE_MASK 0x03 +/* Standard modes for devices with only on/off */ +#define ASUS_MINI_LED_OFF 0x00 +#define ASUS_MINI_LED_ON 0x01 +/* Like "on" but the effect is more vibrant or brighter */ +#define ASUS_MINI_LED_STRONG_MODE 0x02 +/* New modes for devices with 3 mini-led mode types */ +#define ASUS_MINI_LED_2024_WEAK 0x00 +#define ASUS_MINI_LED_2024_STRONG 0x01 +#define ASUS_MINI_LED_2024_OFF 0x02 + +static struct asus_armoury_priv { + struct device *fw_attr_dev; + struct kset *fw_attr_kset; + + u32 mini_led_dev_id; + u32 gpu_mux_dev_id; +} asus_armoury; + +struct fw_attrs_group { + bool pending_reboot; +}; + +static struct fw_attrs_group fw_attrs =3D { + .pending_reboot =3D false, +}; + +struct asus_attr_group { + const struct attribute_group *attr_group; + u32 wmi_devid; +}; + +static bool asus_wmi_is_present(u32 dev_id) +{ + u32 retval; + int status; + + status =3D asus_wmi_evaluate_method(ASUS_WMI_METHODID_DSTS, dev_id, 0, &r= etval); + pr_debug("%s called (0x%08x), retval: 0x%08x\n", __func__, dev_id, retval= ); + + return status =3D=3D 0 && (retval & ASUS_WMI_DSTS_PRESENCE_BIT); +} + +static void asus_set_reboot_and_signal_event(void) +{ + fw_attrs.pending_reboot =3D true; + kobject_uevent(&asus_armoury.fw_attr_dev->kobj, KOBJ_CHANGE); +} + +static ssize_t pending_reboot_show(struct kobject *kobj, struct kobj_attri= bute *attr, char *buf) +{ + return sysfs_emit(buf, "%d\n", fw_attrs.pending_reboot); +} + +static struct kobj_attribute pending_reboot =3D __ATTR_RO(pending_reboot); + +static bool asus_bios_requires_reboot(struct kobj_attribute *attr) +{ + return !strcmp(attr->attr.name, "gpu_mux_mode"); +} + +static int armoury_wmi_set_devstate(struct kobj_attribute *attr, u32 value= , u32 wmi_dev) +{ + u32 result; + int err; + + err =3D asus_wmi_set_devstate(wmi_dev, value, &result); + if (err) { + pr_err("Failed to set %s: %d\n", attr->attr.name, err); + return err; + } + /* + * !1 is usually considered a fail by ASUS, but some WMI methods do use >= 1 + * to return a status code or similar. + */ + if (result < 1) { + pr_err("Failed to set %s: (result): 0x%x\n", attr->attr.name, result); + return -EIO; + } + + return 0; +} + +/** + * attr_uint_store() - Send an uint to wmi method, checks if within min/ma= x exclusive. + * @kobj: Pointer to the driver object. + * @attr: Pointer to the attribute calling this function. + * @buf: The buffer to read from, this is parsed to `uint` type. + * @count: Required by sysfs attribute macros, pass in from the callee att= r. + * @min: Minimum accepted value. Below this returns -EINVAL. + * @max: Maximum accepted value. Above this returns -EINVAL. + * @store_value: Pointer to where the parsed value should be stored. + * @wmi_dev: The WMI function ID to use. + * + * This function is intended to be generic so it can be called from any "_= store" + * attribute which works only with integers. The integer to be sent to the= WMI method + * is range checked and an error returned if out of range. + * + * If the value is valid and WMI is success, then the sysfs attribute is n= otified + * and if asus_bios_requires_reboot() is true then reboot attribute is als= o notified. + * + * Returns: Either count, or an error. + */ +static ssize_t attr_uint_store(struct kobject *kobj, struct kobj_attribute= *attr, const char *buf, + size_t count, u32 min, u32 max, u32 *store_value, u32 wmi_dev) +{ + u32 value; + int err; + + err =3D kstrtouint(buf, 10, &value); + if (err) + return err; + + if (value < min || value > max) + return -EINVAL; + + err =3D armoury_wmi_set_devstate(attr, value, wmi_dev); + if (err) + return err; + + if (store_value !=3D NULL) + *store_value =3D value; + sysfs_notify(kobj, NULL, attr->attr.name); + + if (asus_bios_requires_reboot(attr)) + asus_set_reboot_and_signal_event(); + + return count; +} + +static ssize_t enum_type_show(struct kobject *kobj, struct kobj_attribute = *attr, + char *buf) +{ + return sysfs_emit(buf, "enumeration\n"); +} + +/* Mini-LED mode *********************************************************= *****/ +static ssize_t mini_led_mode_current_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + u32 value; + int err; + + err =3D asus_wmi_get_devstate_dsts(asus_armoury.mini_led_dev_id, &value); + if (err) + return err; + + value &=3D ASUS_MINI_LED_MODE_MASK; + + /* + * Remap the mode values to match previous generation mini-LED. The last = gen + * WMI 0 =3D=3D off, while on this version WMI 2 =3D=3D off (flipped). + */ + if (asus_armoury.mini_led_dev_id =3D=3D ASUS_WMI_DEVID_MINI_LED_MODE2) { + switch (value) { + case ASUS_MINI_LED_2024_WEAK: + value =3D ASUS_MINI_LED_ON; + break; + case ASUS_MINI_LED_2024_STRONG: + value =3D ASUS_MINI_LED_STRONG_MODE; + break; + case ASUS_MINI_LED_2024_OFF: + value =3D ASUS_MINI_LED_OFF; + break; + } + } + + return sysfs_emit(buf, "%u\n", value); +} + +static ssize_t mini_led_mode_current_value_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t count) +{ + u32 mode; + int err; + + err =3D kstrtou32(buf, 10, &mode); + if (err) + return err; + + if (asus_armoury.mini_led_dev_id =3D=3D ASUS_WMI_DEVID_MINI_LED_MODE && + mode > ASUS_MINI_LED_ON) + return -EINVAL; + if (asus_armoury.mini_led_dev_id =3D=3D ASUS_WMI_DEVID_MINI_LED_MODE2 && + mode > ASUS_MINI_LED_STRONG_MODE) + return -EINVAL; + + /* + * Remap the mode values so expected behaviour is the same as the last + * generation of mini-LED with 0 =3D=3D off, 1 =3D=3D on. + */ + if (asus_armoury.mini_led_dev_id =3D=3D ASUS_WMI_DEVID_MINI_LED_MODE2) { + switch (mode) { + case ASUS_MINI_LED_OFF: + mode =3D ASUS_MINI_LED_2024_OFF; + break; + case ASUS_MINI_LED_ON: + mode =3D ASUS_MINI_LED_2024_WEAK; + break; + case ASUS_MINI_LED_STRONG_MODE: + mode =3D ASUS_MINI_LED_2024_STRONG; + break; + } + } + + err =3D armoury_wmi_set_devstate(attr, mode, asus_armoury.mini_led_dev_id= ); + if (err) + return err; + + sysfs_notify(kobj, NULL, attr->attr.name); + + return count; +} + +static ssize_t mini_led_mode_possible_values_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + switch (asus_armoury.mini_led_dev_id) { + case ASUS_WMI_DEVID_MINI_LED_MODE: + return sysfs_emit(buf, "0;1\n"); + case ASUS_WMI_DEVID_MINI_LED_MODE2: + return sysfs_emit(buf, "0;1;2\n"); + default: + return -ENODEV; + } +} + +ATTR_GROUP_ENUM_CUSTOM(mini_led_mode, "mini_led_mode", "Set the mini-LED b= acklight mode"); + +static ssize_t gpu_mux_mode_current_value_store(struct kobject *kobj, + struct kobj_attribute *attr, const char *buf, + size_t count) +{ + int result, err; + u32 optimus; + + err =3D kstrtou32(buf, 10, &optimus); + if (err) + return err; + + if (optimus > 1) + return -EINVAL; + + if (asus_wmi_is_present(ASUS_WMI_DEVID_DGPU)) { + err =3D asus_wmi_get_devstate_dsts(ASUS_WMI_DEVID_DGPU, &result); + if (err) + return err; + if (result && !optimus) { + pr_warn("Can not switch MUX to dGPU mode when dGPU is disabled: %02X %0= 2X\n", + result, optimus); + return -ENODEV; + } + } + + if (asus_wmi_is_present(ASUS_WMI_DEVID_EGPU)) { + err =3D asus_wmi_get_devstate_dsts(ASUS_WMI_DEVID_EGPU, &result); + if (err) + return err; + if (result && !optimus) { + pr_warn("Can not switch MUX to dGPU mode when eGPU is enabled\n"); + return -EBUSY; + } + } + + err =3D armoury_wmi_set_devstate(attr, optimus, asus_armoury.gpu_mux_dev_= id); + if (err) + return err; + + sysfs_notify(kobj, NULL, attr->attr.name); + asus_set_reboot_and_signal_event(); + + return count; +} +WMI_SHOW_INT(gpu_mux_mode_current_value, "%u\n", asus_armoury.gpu_mux_dev_= id); +ATTR_GROUP_BOOL_CUSTOM(gpu_mux_mode, "gpu_mux_mode", "Set the GPU display = MUX mode"); + +/* + * A user may be required to store the value twice, typical store first, t= hen + * rescan PCI bus to activate power, then store a second time to save corr= ectly. + */ +static ssize_t dgpu_disable_current_value_store(struct kobject *kobj, + struct kobj_attribute *attr, const char *buf, + size_t count) +{ + int result, err; + u32 disable; + + err =3D kstrtou32(buf, 10, &disable); + if (err) + return err; + + if (disable > 1) + return -EINVAL; + + if (asus_armoury.gpu_mux_dev_id) { + err =3D asus_wmi_get_devstate_dsts(asus_armoury.gpu_mux_dev_id, &result); + if (err) + return err; + if (!result && disable) { + pr_warn("Can not disable dGPU when the MUX is in dGPU mode\n"); + return -EBUSY; + } + } + + err =3D armoury_wmi_set_devstate(attr, disable, ASUS_WMI_DEVID_DGPU); + if (err) + return err; + + sysfs_notify(kobj, NULL, attr->attr.name); + + return count; +} +WMI_SHOW_INT(dgpu_disable_current_value, "%d\n", ASUS_WMI_DEVID_DGPU); +ATTR_GROUP_BOOL_CUSTOM(dgpu_disable, "dgpu_disable", "Disable the dGPU"); + +/* The ACPI call to enable the eGPU also disables the internal dGPU */ +static ssize_t egpu_enable_current_value_store(struct kobject *kobj, struc= t kobj_attribute *attr, + const char *buf, size_t count) +{ + int result, err; + u32 enable; + + err =3D kstrtou32(buf, 10, &enable); + if (err) + return err; + + if (enable > 1) + return -EINVAL; + + err =3D asus_wmi_get_devstate_dsts(ASUS_WMI_DEVID_EGPU_CONNECTED, &result= ); + if (err) { + pr_warn("Failed to get eGPU connection status: %d\n", err); + return err; + } + + if (asus_armoury.gpu_mux_dev_id) { + err =3D asus_wmi_get_devstate_dsts(asus_armoury.gpu_mux_dev_id, &result); + if (err) { + pr_warn("Failed to get GPU MUX status: %d\n", result); + return err; + } + if (!result && enable) { + pr_warn("Can not enable eGPU when the MUX is in dGPU mode\n"); + return -ENODEV; + } + } + + err =3D armoury_wmi_set_devstate(attr, enable, ASUS_WMI_DEVID_EGPU); + if (err) + return err; + + sysfs_notify(kobj, NULL, attr->attr.name); + + return count; +} +WMI_SHOW_INT(egpu_enable_current_value, "%d\n", ASUS_WMI_DEVID_EGPU); +ATTR_GROUP_BOOL_CUSTOM(egpu_enable, "egpu_enable", "Enable the eGPU (also = disables dGPU)"); + +/* Simple attribute creation */ +ATTR_GROUP_ENUM_INT_RO(charge_mode, "charge_mode", ASUS_WMI_DEVID_CHARGE_M= ODE, "0;1;2", + "Show the current mode of charging"); + +ATTR_GROUP_BOOL_RW(boot_sound, "boot_sound", ASUS_WMI_DEVID_BOOT_SOUND, + "Set the boot POST sound"); +ATTR_GROUP_BOOL_RW(mcu_powersave, "mcu_powersave", ASUS_WMI_DEVID_MCU_POWE= RSAVE, + "Set MCU powersaving mode"); +ATTR_GROUP_BOOL_RW(panel_od, "panel_overdrive", ASUS_WMI_DEVID_PANEL_OD, + "Set the panel refresh overdrive"); +ATTR_GROUP_BOOL_RO(egpu_connected, "egpu_connected", ASUS_WMI_DEVID_EGPU_C= ONNECTED, + "Show the eGPU connection status"); + +/* If an attribute does not require any special case handling add it here = */ +static const struct asus_attr_group armoury_attr_groups[] =3D { + { &egpu_connected_attr_group, ASUS_WMI_DEVID_EGPU_CONNECTED }, + { &egpu_enable_attr_group, ASUS_WMI_DEVID_EGPU }, + { &dgpu_disable_attr_group, ASUS_WMI_DEVID_DGPU }, + + { &charge_mode_attr_group, ASUS_WMI_DEVID_CHARGE_MODE }, + { &boot_sound_attr_group, ASUS_WMI_DEVID_BOOT_SOUND }, + { &mcu_powersave_attr_group, ASUS_WMI_DEVID_MCU_POWERSAVE }, + { &panel_od_attr_group, ASUS_WMI_DEVID_PANEL_OD }, +}; + +static int asus_fw_attr_add(void) +{ + int err, i; + + asus_armoury.fw_attr_dev =3D device_create(&firmware_attributes_class, NU= LL, MKDEV(0, 0), + NULL, "%s", DRIVER_NAME); + if (IS_ERR(asus_armoury.fw_attr_dev)) { + err =3D PTR_ERR(asus_armoury.fw_attr_dev); + goto fail_class_get; + } + + asus_armoury.fw_attr_kset =3D kset_create_and_add("attributes", NULL, + &asus_armoury.fw_attr_dev->kobj); + if (!asus_armoury.fw_attr_kset) { + err =3D -ENOMEM; + goto err_destroy_classdev; + } + + err =3D sysfs_create_file(&asus_armoury.fw_attr_kset->kobj, &pending_rebo= ot.attr); + if (err) { + pr_err("Failed to create sysfs level attributes\n"); + goto err_destroy_kset; + } + + asus_armoury.mini_led_dev_id =3D 0; + if (asus_wmi_is_present(ASUS_WMI_DEVID_MINI_LED_MODE)) + asus_armoury.mini_led_dev_id =3D ASUS_WMI_DEVID_MINI_LED_MODE; + else if (asus_wmi_is_present(ASUS_WMI_DEVID_MINI_LED_MODE2)) + asus_armoury.mini_led_dev_id =3D ASUS_WMI_DEVID_MINI_LED_MODE2; + + if (asus_armoury.mini_led_dev_id) { + err =3D sysfs_create_group(&asus_armoury.fw_attr_kset->kobj, + &mini_led_mode_attr_group); + if (err) { + pr_err("Failed to create sysfs-group for mini_led\n"); + goto err_remove_file; + } + } + + asus_armoury.gpu_mux_dev_id =3D 0; + if (asus_wmi_is_present(ASUS_WMI_DEVID_GPU_MUX)) + asus_armoury.gpu_mux_dev_id =3D ASUS_WMI_DEVID_GPU_MUX; + else if (asus_wmi_is_present(ASUS_WMI_DEVID_GPU_MUX_VIVO)) + asus_armoury.gpu_mux_dev_id =3D ASUS_WMI_DEVID_GPU_MUX_VIVO; + + if (asus_armoury.gpu_mux_dev_id) { + err =3D sysfs_create_group(&asus_armoury.fw_attr_kset->kobj, + &gpu_mux_mode_attr_group); + if (err) { + pr_err("Failed to create sysfs-group for gpu_mux\n"); + goto err_remove_mini_led_group; + } + } + + for (i =3D 0; i < ARRAY_SIZE(armoury_attr_groups); i++) { + if (!asus_wmi_is_present(armoury_attr_groups[i].wmi_devid)) + continue; + + err =3D sysfs_create_group(&asus_armoury.fw_attr_kset->kobj, + armoury_attr_groups[i].attr_group); + if (err) { + pr_err("Failed to create sysfs-group for %s\n", + armoury_attr_groups[i].attr_group->name); + goto err_remove_groups; + } + } + + return 0; + +err_remove_groups: + while (i--) { + if (asus_wmi_is_present(armoury_attr_groups[i].wmi_devid)) + sysfs_remove_group(&asus_armoury.fw_attr_kset->kobj, + armoury_attr_groups[i].attr_group); + } + if (asus_armoury.gpu_mux_dev_id) + sysfs_remove_group(&asus_armoury.fw_attr_kset->kobj, &gpu_mux_mode_attr_= group); +err_remove_mini_led_group: + if (asus_armoury.mini_led_dev_id) + sysfs_remove_group(&asus_armoury.fw_attr_kset->kobj, &mini_led_mode_attr= _group); +err_remove_file: + sysfs_remove_file(&asus_armoury.fw_attr_kset->kobj, &pending_reboot.attr); +err_destroy_kset: + kset_unregister(asus_armoury.fw_attr_kset); +err_destroy_classdev: +fail_class_get: + device_destroy(&firmware_attributes_class, MKDEV(0, 0)); + return err; +} + +/* Init / exit ***********************************************************= *****/ + +static int __init asus_fw_init(void) +{ + char *wmi_uid; + + wmi_uid =3D wmi_get_acpi_device_uid(ASUS_WMI_MGMT_GUID); + if (!wmi_uid) + return -ENODEV; + + /* + * if equal to "ASUSWMI" then it's DCTS that can't be used for this + * driver, DSTS is required. + */ + if (!strcmp(wmi_uid, ASUS_ACPI_UID_ASUSWMI)) + return -ENODEV; + + return asus_fw_attr_add(); +} + +static void __exit asus_fw_exit(void) +{ + sysfs_remove_file(&asus_armoury.fw_attr_kset->kobj, &pending_reboot.attr); + kset_unregister(asus_armoury.fw_attr_kset); + device_destroy(&firmware_attributes_class, MKDEV(0, 0)); +} + +module_init(asus_fw_init); +module_exit(asus_fw_exit); + +MODULE_IMPORT_NS("ASUS_WMI"); +MODULE_AUTHOR("Luke Jones "); +MODULE_DESCRIPTION("ASUS BIOS Configuration Driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("wmi:" ASUS_NB_WMI_EVENT_GUID); diff --git a/drivers/platform/x86/asus-armoury.h b/drivers/platform/x86/asu= s-armoury.h new file mode 100644 index 000000000000..61675e7b5a60 --- /dev/null +++ b/drivers/platform/x86/asus-armoury.h @@ -0,0 +1,164 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Definitions for kernel modules using asus-armoury driver + * + * Copyright (c) 2024 Luke Jones + */ + +#ifndef _ASUS_ARMOURY_H_ +#define _ASUS_ARMOURY_H_ + +#include +#include + +#define DRIVER_NAME "asus-armoury" + +#define __ASUS_ATTR_RO(_func, _name) \ + { \ + .attr =3D { .name =3D __stringify(_name), .mode =3D 0444 }, \ + .show =3D _func##_##_name##_show, \ + } + +#define __ASUS_ATTR_RO_AS(_name, _show) \ + { \ + .attr =3D { .name =3D __stringify(_name), .mode =3D 0444 }, \ + .show =3D _show, \ + } + +#define __ASUS_ATTR_RW(_func, _name) \ + __ATTR(_name, 0644, _func##_##_name##_show, _func##_##_name##_store) + +#define __WMI_STORE_INT(_attr, _min, _max, _wmi) \ + static ssize_t _attr##_store(struct kobject *kobj, \ + struct kobj_attribute *attr, \ + const char *buf, size_t count) \ + { \ + return attr_uint_store(kobj, attr, buf, count, _min, \ + _max, NULL, _wmi); \ + } + +#define WMI_SHOW_INT(_attr, _fmt, _wmi) \ + static ssize_t _attr##_show(struct kobject *kobj, \ + struct kobj_attribute *attr, char *buf) \ + { \ + u32 result; \ + int err; \ + \ + err =3D asus_wmi_get_devstate_dsts(_wmi, &result); \ + if (err) \ + return err; \ + return sysfs_emit(buf, _fmt, \ + result & ~ASUS_WMI_DSTS_PRESENCE_BIT); \ + } + +/* Create functions and attributes for use in other macros or on their own= */ + +/* Shows a formatted static variable */ +#define __ATTR_SHOW_FMT(_prop, _attrname, _fmt, _val) \ + static ssize_t _attrname##_##_prop##_show( \ + struct kobject *kobj, struct kobj_attribute *attr, char *buf) \ + { \ + return sysfs_emit(buf, _fmt, _val); \ + } \ + static struct kobj_attribute attr_##_attrname##_##_prop =3D \ + __ASUS_ATTR_RO(_attrname, _prop) + +#define __ATTR_RO_INT_GROUP_ENUM(_attrname, _wmi, _fsname, _possible, _dis= pname)\ + WMI_SHOW_INT(_attrname##_current_value, "%d\n", _wmi); \ + static struct kobj_attribute attr_##_attrname##_current_value =3D \ + __ASUS_ATTR_RO(_attrname, current_value); \ + __ATTR_SHOW_FMT(display_name, _attrname, "%s\n", _dispname); \ + __ATTR_SHOW_FMT(possible_values, _attrname, "%s\n", _possible); \ + static struct kobj_attribute attr_##_attrname##_type =3D \ + __ASUS_ATTR_RO_AS(type, enum_type_show); \ + static struct attribute *_attrname##_attrs[] =3D { \ + &attr_##_attrname##_current_value.attr, \ + &attr_##_attrname##_display_name.attr, \ + &attr_##_attrname##_possible_values.attr, \ + &attr_##_attrname##_type.attr, \ + NULL \ + }; \ + static const struct attribute_group _attrname##_attr_group =3D { \ + .name =3D _fsname, .attrs =3D _attrname##_attrs \ + } + +#define __ATTR_RW_INT_GROUP_ENUM(_attrname, _minv, _maxv, _wmi, _fsname,\ + _possible, _dispname) \ + __WMI_STORE_INT(_attrname##_current_value, _minv, _maxv, _wmi); \ + WMI_SHOW_INT(_attrname##_current_value, "%d\n", _wmi); \ + static struct kobj_attribute attr_##_attrname##_current_value =3D \ + __ASUS_ATTR_RW(_attrname, current_value); \ + __ATTR_SHOW_FMT(display_name, _attrname, "%s\n", _dispname); \ + __ATTR_SHOW_FMT(possible_values, _attrname, "%s\n", _possible); \ + static struct kobj_attribute attr_##_attrname##_type =3D \ + __ASUS_ATTR_RO_AS(type, enum_type_show); \ + static struct attribute *_attrname##_attrs[] =3D { \ + &attr_##_attrname##_current_value.attr, \ + &attr_##_attrname##_display_name.attr, \ + &attr_##_attrname##_possible_values.attr, \ + &attr_##_attrname##_type.attr, \ + NULL \ + }; \ + static const struct attribute_group _attrname##_attr_group =3D { \ + .name =3D _fsname, .attrs =3D _attrname##_attrs \ + } + +/* Boolean style enumeration, base macro. Requires adding show/store */ +#define __ATTR_GROUP_ENUM(_attrname, _fsname, _possible, _dispname) \ + __ATTR_SHOW_FMT(display_name, _attrname, "%s\n", _dispname); \ + __ATTR_SHOW_FMT(possible_values, _attrname, "%s\n", _possible); \ + static struct kobj_attribute attr_##_attrname##_type =3D \ + __ASUS_ATTR_RO_AS(type, enum_type_show); \ + static struct attribute *_attrname##_attrs[] =3D { \ + &attr_##_attrname##_current_value.attr, \ + &attr_##_attrname##_display_name.attr, \ + &attr_##_attrname##_possible_values.attr, \ + &attr_##_attrname##_type.attr, \ + NULL \ + }; \ + static const struct attribute_group _attrname##_attr_group =3D { \ + .name =3D _fsname, .attrs =3D _attrname##_attrs \ + } + +#define ATTR_GROUP_BOOL_RO(_attrname, _fsname, _wmi, _dispname) \ + __ATTR_RO_INT_GROUP_ENUM(_attrname, _wmi, _fsname, "0;1", _dispname) + + +#define ATTR_GROUP_BOOL_RW(_attrname, _fsname, _wmi, _dispname) \ + __ATTR_RW_INT_GROUP_ENUM(_attrname, 0, 1, _wmi, _fsname, "0;1", _dispname) + +#define ATTR_GROUP_ENUM_INT_RO(_attrname, _fsname, _wmi, _possible, _dispn= ame) \ + __ATTR_RO_INT_GROUP_ENUM(_attrname, _wmi, _fsname, _possible, _dispname) + +/* + * Requires _current_value_show(), _current_value_show() + */ +#define ATTR_GROUP_BOOL_CUSTOM(_attrname, _fsname, _dispname) \ + static struct kobj_attribute attr_##_attrname##_current_value =3D \ + __ASUS_ATTR_RW(_attrname, current_value); \ + __ATTR_GROUP_ENUM(_attrname, _fsname, "0;1", _dispname) + +/* + * Requires _current_value_show(), _current_value_show() + * and _possible_values_show() + */ +#define ATTR_GROUP_ENUM_CUSTOM(_attrname, _fsname, _dispname) \ + __ATTR_SHOW_FMT(display_name, _attrname, "%s\n", _dispname); \ + static struct kobj_attribute attr_##_attrname##_current_value =3D \ + __ASUS_ATTR_RW(_attrname, current_value); \ + static struct kobj_attribute attr_##_attrname##_possible_values =3D \ + __ASUS_ATTR_RO(_attrname, possible_values); \ + static struct kobj_attribute attr_##_attrname##_type =3D \ + __ASUS_ATTR_RO_AS(type, enum_type_show); \ + static struct attribute *_attrname##_attrs[] =3D { \ + &attr_##_attrname##_current_value.attr, \ + &attr_##_attrname##_display_name.attr, \ + &attr_##_attrname##_possible_values.attr, \ + &attr_##_attrname##_type.attr, \ + NULL \ + }; \ + static const struct attribute_group _attrname##_attr_group =3D { \ + .name =3D _fsname, .attrs =3D _attrname##_attrs \ + } + +#endif /* _ASUS_ARMOURY_H_ */ diff --git a/drivers/platform/x86/asus-wmi.c b/drivers/platform/x86/asus-wm= i.c index e31e0264a160..9ffcd74c6328 100644 --- a/drivers/platform/x86/asus-wmi.c +++ b/drivers/platform/x86/asus-wmi.c @@ -55,8 +55,6 @@ module_param(fnlock_default, bool, 0444); #define to_asus_wmi_driver(pdrv) \ (container_of((pdrv), struct asus_wmi_driver, platform_driver)) =20 -#define ASUS_WMI_MGMT_GUID "97845ED0-4E6D-11DE-8A39-0800200C9A66" - #define NOTIFY_BRNUP_MIN 0x11 #define NOTIFY_BRNUP_MAX 0x1f #define NOTIFY_BRNDOWN_MIN 0x20 @@ -105,8 +103,6 @@ module_param(fnlock_default, bool, 0444); #define USB_INTEL_XUSB2PR 0xD0 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI 0x9c31 =20 -#define ASUS_ACPI_UID_ASUSWMI "ASUSWMI" - #define WMI_EVENT_MASK 0xFFFF =20 #define FAN_CURVE_POINTS 8 diff --git a/include/linux/platform_data/x86/asus-wmi.h b/include/linux/pla= tform_data/x86/asus-wmi.h index dbd44d9fbb6f..24d448b6b9fe 100644 --- a/include/linux/platform_data/x86/asus-wmi.h +++ b/include/linux/platform_data/x86/asus-wmi.h @@ -6,6 +6,9 @@ #include #include =20 +#define ASUS_WMI_MGMT_GUID "97845ED0-4E6D-11DE-8A39-0800200C9A66" +#define ASUS_ACPI_UID_ASUSWMI "ASUSWMI" + /* WMI Methods */ #define ASUS_WMI_METHODID_SPEC 0x43455053 /* BIOS SPECification */ #define ASUS_WMI_METHODID_SFBD 0x44424653 /* Set First Boot Device */ @@ -192,6 +195,7 @@ static inline int asus_wmi_evaluate_method(u32 method_i= d, u32 arg0, u32 arg1, #endif =20 /* To be used by both hid-asus and asus-wmi to determine which controls kb= d_brightness */ +#if IS_REACHABLE(CONFIG_ASUS_WMI) || IS_REACHABLE(CONFIG_HID_ASUS) static const struct dmi_system_id asus_use_hid_led_dmi_ids[] =3D { { .matches =3D { @@ -230,5 +234,6 @@ static const struct dmi_system_id asus_use_hid_led_dmi_= ids[] =3D { }, { }, }; +#endif =20 #endif /* __PLATFORM_DATA_X86_ASUS_WMI_H */ --=20 2.50.1 From nobody Sun Oct 5 09:07:16 2025 Received: from mail-wr1-f45.google.com (mail-wr1-f45.google.com [209.85.221.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A147E28C5DA; Wed, 6 Aug 2025 13:53:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754488438; cv=none; b=q25JxHbMhHE0KaRcmIwabLtF0dNg4bUTGpW36dIUDgjNFpB50eCwcMzVd9ZuLlOiB9O+nK21DzI/DQ/MEnZfsH6OICpoffr8WSHAQTAoD7bOlR2z1Vp4vde137Kdrknlmg5iIoy0xtTvw46IpvjyLXfFVo19ahgZDwyTVZeMInc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754488438; c=relaxed/simple; bh=p1VzCynwLsnvWrmQqLYsgjJEMrN3u9WNhMiyVp0CVzI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=XUg2vg5u4hnlY7tuL5OXWggxFrkqK+mUVd3kNHOtof9uwKnZFE9DWrgNqjjRL3aUZMlpaIieeuEQ4F5e3ykC9yC4oQveMbGNKZeG59fu9x3/LQStlBx0sIF9Gbu+CEKeVpTXAibbmWjFQb89ojtXnRHqMzUJ0Hy6hrxef1rhtGY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=KWpKPG+R; arc=none smtp.client-ip=209.85.221.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="KWpKPG+R" Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-3b780bdda21so4708806f8f.3; Wed, 06 Aug 2025 06:53:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1754488434; x=1755093234; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ig5I7ozA2QyRty8Owcdpp1cPBHOmlpLlayno0u6m2k4=; b=KWpKPG+RNA5UCYLRo5tt1yXF/VK4N8sXt6CV4PPHjqwtL9uDaP7ugD6DEjAzeFfMnl cfqLFs4oTYtj54kL0k+WxFFnjUKSP7gYxcNmvfO7ZLbkWOYYmj9LX5679ci1H80ab15Q fo2IZW40KwaRdyROlltEau1qtimBe2O3CJ1Ws5r/GdbYMnZPkzC/t+H2elDkN0sigR/G p1YxL8BxkfjCpUqL6InNeVVKCAlSAqZiqBuWJ1P8k5CWEzZl9E3WtIvgy0zfxlOjXs08 MjHJwgl3DBkBtfZB7TYLbB3KUa1Xuql4ba7EyLRjsdqTk+nPfK8pz0qxhSWnwDBYw7bR IdzQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1754488434; x=1755093234; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ig5I7ozA2QyRty8Owcdpp1cPBHOmlpLlayno0u6m2k4=; b=JRuSH0bZmaLfj4ekE8UPPq2j6fI8APn/awv3pK0LP7U8TqJBZ9olgL19nRd8E7PiVL CeBqvKhaFUSEqVvC1Eb1zTEWSqE+AdC8ju8wC3BUFcoT6owY1c4dMUqTkT0YPDTndV+t 7UgaXvRZITegm+v+ABZ8sLFidac/aFq9BJyUCREiuDDLQpVk3zsYTS/CMQ163ukiLQ6O zVpD817pzHsV6Ct/gBNcQeIdPUvUSNU4Fnl3znB9Teyf83L7LGclNmYwU+S3l4YQ0E5x GrXwPDUlujbMvY9H3Oi0mMzLFvU8y5Ux0VawHvZuJzhYkAUHiXnmr8gFoMpDHJLdBL99 Waig== X-Forwarded-Encrypted: i=1; AJvYcCVOKCgf29YD0Pbf6bo2RTWkfNhqbq7y1CbNU8tXGV0koN/Y38BxY9II2rHgBmPU9cy6Xhp1fuW5IW107/JU7bymiVnb@vger.kernel.org X-Gm-Message-State: AOJu0YyJ8/Y0q45tFXV7LCmHcuBLntS4Vhs/osx8zwxlEpZfI2N6LK49 1qrhvNyxsB2eYLSt0bKAWWrgtpfB2SN+TFXeFSVSHhnVYHi5F45g9ef48+qrlQ== X-Gm-Gg: ASbGncvzgI1A63D8Twrn3ra+NNWn8Y5I9FzHEEnfmkhFZzjUwGEF0YTSLlR2JUVuJvv EXYosCVfMiJ8/gMf3q7PfiQx9P5vM+cSahx8/Bb6oc8xKUWMMrXgkpKGuY4rhR8oRwBtS6ZuL1m /Fsb/VHyDt+CepAxUFe0yRYXEYn0msgoMtB6ocqedercKVMm2H5OhimPilBW/OpCu80FQ/ZEtwW 36YH52cvKkqUvamElw1FTPzT7tdKmuuFSFbu1bF8UfL6ZqBSnDYGfyBrd9fTNzZ4ozALhoZaKrh 8cGn+BjcKOZMnUfyEiB8QaReI6UrvPIW/MG/aEUgpYN5mPmdJtUnYLWD//+AhrfOQmBaACRzD5J R6qR+7rzdM3hiI1V+wjoZYl+11ihYQdiel1U= X-Google-Smtp-Source: AGHT+IFfN0tKGpjA2XDmzWfaQpadhYw8GCe11fup1mVTVRts8iQ1mPmpwsxWSuFlXmUWtCcvILtahQ== X-Received: by 2002:a5d:5f53:0:b0:3b7:93c3:7d49 with SMTP id ffacd0b85a97d-3b8f49274a1mr2292766f8f.39.1754488433649; Wed, 06 Aug 2025 06:53:53 -0700 (PDT) Received: from denis-pc ([151.49.205.110]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b79c3bc12csm23646087f8f.28.2025.08.06.06.53.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Aug 2025 06:53:53 -0700 (PDT) From: Denis Benato To: linux-kernel@vger.kernel.org Cc: hdegoede@redhat.com, ilpo.jarvinen@linux.intel.com, platform-driver-x86@vger.kernel.org, mario.limonciello@amd.com, "Luke D . Jones" Subject: [PATCH v10 3/8] platform/x86: asus-armoury: add panel_hd_mode attribute Date: Wed, 6 Aug 2025 15:53:14 +0200 Message-ID: <20250806135319.1205762-4-benato.denis96@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250806135319.1205762-1-benato.denis96@gmail.com> References: <20250806135319.1205762-1-benato.denis96@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable From: "Luke D. Jones" Add panel_hd_mode to toggle the panel mode between single and high definition modes. Signed-off-by: Luke D. Jones Reviewed-by: Mario Limonciello Reviewed-by: Ilpo J=C3=A4rvinen --- drivers/platform/x86/asus-armoury.c | 6 +++++- include/linux/platform_data/x86/asus-wmi.h | 1 + 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/platform/x86/asus-armoury.c b/drivers/platform/x86/asu= s-armoury.c index 57ed9449ec5f..68ce2c159ae1 100644 --- a/drivers/platform/x86/asus-armoury.c +++ b/drivers/platform/x86/asus-armoury.c @@ -92,7 +92,8 @@ static struct kobj_attribute pending_reboot =3D __ATTR_RO= (pending_reboot); =20 static bool asus_bios_requires_reboot(struct kobj_attribute *attr) { - return !strcmp(attr->attr.name, "gpu_mux_mode"); + return !strcmp(attr->attr.name, "gpu_mux_mode") || + !strcmp(attr->attr.name, "panel_hd_mode"); } =20 static int armoury_wmi_set_devstate(struct kobj_attribute *attr, u32 value= , u32 wmi_dev) @@ -403,6 +404,8 @@ ATTR_GROUP_BOOL_RW(mcu_powersave, "mcu_powersave", ASUS= _WMI_DEVID_MCU_POWERSAVE, "Set MCU powersaving mode"); ATTR_GROUP_BOOL_RW(panel_od, "panel_overdrive", ASUS_WMI_DEVID_PANEL_OD, "Set the panel refresh overdrive"); +ATTR_GROUP_BOOL_RW(panel_hd_mode, "panel_hd_mode", ASUS_WMI_DEVID_PANEL_HD, + "Set the panel HD mode to UHD<0> or FHD<1>"); ATTR_GROUP_BOOL_RO(egpu_connected, "egpu_connected", ASUS_WMI_DEVID_EGPU_C= ONNECTED, "Show the eGPU connection status"); =20 @@ -416,6 +419,7 @@ static const struct asus_attr_group armoury_attr_groups= [] =3D { { &boot_sound_attr_group, ASUS_WMI_DEVID_BOOT_SOUND }, { &mcu_powersave_attr_group, ASUS_WMI_DEVID_MCU_POWERSAVE }, { &panel_od_attr_group, ASUS_WMI_DEVID_PANEL_OD }, + { &panel_hd_mode_attr_group, ASUS_WMI_DEVID_PANEL_HD }, }; =20 static int asus_fw_attr_add(void) diff --git a/include/linux/platform_data/x86/asus-wmi.h b/include/linux/pla= tform_data/x86/asus-wmi.h index 24d448b6b9fe..adbc4e0e7576 100644 --- a/include/linux/platform_data/x86/asus-wmi.h +++ b/include/linux/platform_data/x86/asus-wmi.h @@ -76,6 +76,7 @@ #define ASUS_WMI_DEVID_THROTTLE_THERMAL_POLICY_VIVO 0x00110019 =20 /* Misc */ +#define ASUS_WMI_DEVID_PANEL_HD 0x0005001C #define ASUS_WMI_DEVID_PANEL_OD 0x00050019 #define ASUS_WMI_DEVID_CAMERA 0x00060013 #define ASUS_WMI_DEVID_LID_FLIP 0x00060062 --=20 2.50.1 From nobody Sun Oct 5 09:07:16 2025 Received: from mail-wm1-f44.google.com (mail-wm1-f44.google.com [209.85.128.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5850C28C84B; Wed, 6 Aug 2025 13:53:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754488438; cv=none; b=XNnxg4DBgD3lcdG1bOsiaUGRjqIE4JyuKXyCeRTi+3j4HMuTCXCD0TmTJVf35xQoVdOcJGSrVHzdiD4+rnl22rzUgBqmxDt82df8o0LhLgNosqJj+4Gi6yakt/tl9Je4hojVZoBy52Cbu39M3I7h2O6j6NWfxnA4an+TtRlDAxg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754488438; c=relaxed/simple; bh=90RMMBjibEGt8GZYiDvTxOAOpHgjBdvIYHYsAqX6AEI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=DNz3kEOu/NhJzIAu7baCHr1tbPDd7HrS/lKrR4PCzudJK6XSm35OGBMNjE7zA9f1/gFdg1XmI6934AKV5f3XkmQdxX5ZDmQ5ulJXD8+OJU7opM1FwohOl8JfpnwNdT3uMzJcA+BAK0UQ42pUeLBZKQLlQGb95C/DFT67plFc/FY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=U4gGkOos; arc=none smtp.client-ip=209.85.128.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="U4gGkOos" Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-458b2d9dba5so31760685e9.1; Wed, 06 Aug 2025 06:53:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1754488435; x=1755093235; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/NHWDngrAm/+zA0LnuSxz03WMYZ9UMxw00FDXT0iChU=; b=U4gGkOos+XkpHTooEFCCiWHiMlP0iedlziMtFyEjJzCn9Z9eN4cDS5ffWizyAXuF2g qSFB0wZpLQencAebx8SamrL6cSn4SieZ+PJVkKKhabp2Yvn5XECEIqffQ3DQZf/zJNk1 2TODM/2CM0p28veoct9CKFAZN6ew7HCCJPet2YZTCV4djG5UkDtwItm7Q3XFpMHtveJh WLiKY2eG+XEqoLj7smYxvPbgZu28WOyS1hHQtio1iXv1tyvvbPr7w5c7pSneBMsAzHW6 Rb4LbvFQX1XS44PEzsTJZ4Lmy1ZcMsVYzZTVzSXUyFXROylwUo/ozAFthpiOmUEqYIY1 nK/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1754488435; x=1755093235; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/NHWDngrAm/+zA0LnuSxz03WMYZ9UMxw00FDXT0iChU=; b=fFs5xM0PR2vTMH09Z2eER7sa9hXcjZ/s0Bk3uv2SQh8v0voCNHxEwX/wVwr4GWl/pT ip8c30PNqmAez2pT2zYzBZuhasSS/yWVM6F1MmbSJv0rC3a1LfXPund/Rqx01ZNq5iwM pQDfbNP9Yet3lXtO9ZO3oBM1eTn9cRW1XsfWBRLcA+gEK1JTayYv2ZhfSzH0batLYaeU NiQ0gEAMFigRheb/9suRzqSDhfRMULOsy6+vR6K/GnFQ7/r4HsXShM1m0xjotFr4AGEP KYKWpM3FrZ11PlXYTHo86/DtYIhOBQ/tgwgus55i/zmySDKSP3kberF3j4gsom9uEIty Wz8w== X-Forwarded-Encrypted: i=1; AJvYcCWyLogoWNMafatJQgzCcRLoJS5r29J9nHWWpRbXHP67l4Jkvhr3Zsr1l3Aja2H2ZhetmA621Er6FeZlmYucswsCuBgQ@vger.kernel.org X-Gm-Message-State: AOJu0Yw3f4PeqDjAR0Bl9Xi4evJw7J+s7feGj4zLEt9D2oGfLbZnd2FA G8Vo9OiEtbaf+0D3wkm3DdFsrBr+wuv7rhFuPv5W/6I2oMsuQQjax8xIiOsLHA== X-Gm-Gg: ASbGncspo4Xu2BV22teSKQ7hiW/ejIEdp2G4MJOiO5vzbAaIwB/pBlJn2WfrWL23Yxd O7RTgwmTiooYlN8muxnjTU4nFQdRQhW70CnT0o2c6u8+495skuWx8OZXM9VVKR9cjuezNfd+8si qlwPQDiEWFPYu7fEdsukbMJrjLK8X9b5w2MfvbgZ1y+a2YdXxBtSg1LhFSKzUVyJe5GxF5wwK/0 yONcU0jH8r4l/QmaO6Mi11DNVhDVbwUGEj8EvoSjDIUUcmWf0FfIIVVMq0YX9X8qq+cl0vJhrQN yQPkWdDG3PfJRZ9VP76P68Asxa38TxLbvvyVksYwFSUGI18bHjSDx0RuiX5In4TCPt1QA7LfFzB wlFbtDIfL6vfhnStBT3B63Ak8 X-Google-Smtp-Source: AGHT+IH5OQWwWaaGVRjkdkVPkU+/fXpOv7iUPGPHF1gfcu6sEvrDpqyZB+NLmDJXgBhzSErKnSafHw== X-Received: by 2002:a05:600c:310b:b0:459:dde3:1a27 with SMTP id 5b1f17b1804b1-459e7103893mr25716755e9.26.1754488434422; Wed, 06 Aug 2025 06:53:54 -0700 (PDT) Received: from denis-pc ([151.49.205.110]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b79c3bc12csm23646087f8f.28.2025.08.06.06.53.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Aug 2025 06:53:54 -0700 (PDT) From: Denis Benato To: linux-kernel@vger.kernel.org Cc: hdegoede@redhat.com, ilpo.jarvinen@linux.intel.com, platform-driver-x86@vger.kernel.org, mario.limonciello@amd.com, "Luke D . Jones" , Denis Benato Subject: [PATCH v10 4/8] platform/x86: asus-armoury: add apu-mem control support Date: Wed, 6 Aug 2025 15:53:15 +0200 Message-ID: <20250806135319.1205762-5-benato.denis96@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250806135319.1205762-1-benato.denis96@gmail.com> References: <20250806135319.1205762-1-benato.denis96@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Luke D. Jones" Implement the APU memory size control under the asus-armoury module using the fw_attributes class. This allows the APU allocated memory size to be adjusted depending on the users priority. A reboot is required after change. Signed-off-by: Luke D. Jones Signed-off-by: Denis Benato --- drivers/platform/x86/asus-armoury.c | 81 ++++++++++++++++++++++ include/linux/platform_data/x86/asus-wmi.h | 2 + 2 files changed, 83 insertions(+) diff --git a/drivers/platform/x86/asus-armoury.c b/drivers/platform/x86/asu= s-armoury.c index 68ce2c159ae1..e458d23d020d 100644 --- a/drivers/platform/x86/asus-armoury.c +++ b/drivers/platform/x86/asus-armoury.c @@ -394,6 +394,86 @@ static ssize_t egpu_enable_current_value_store(struct = kobject *kobj, struct kobj WMI_SHOW_INT(egpu_enable_current_value, "%d\n", ASUS_WMI_DEVID_EGPU); ATTR_GROUP_BOOL_CUSTOM(egpu_enable, "egpu_enable", "Enable the eGPU (also = disables dGPU)"); =20 +/* Device memory available to APU */ + +/* Values map for APU memory: some looks out of order but are actually cor= rect */ +static u32 apu_mem_map[] =3D { + [0] =3D 0x000, /* called "AUTO" on the BIOS, is the minimum available */ + [1] =3D 0x102, + [2] =3D 0x103, + [3] =3D 0x104, + [4] =3D 0x105, + [5] =3D 0x107, + [6] =3D 0x108, + [7] =3D 0x109, + [8] =3D 0x106, +}; + +static ssize_t apu_mem_current_value_show(struct kobject *kobj, struct kob= j_attribute *attr, + char *buf) +{ + int err; + u32 mem; + + err =3D asus_wmi_get_devstate_dsts(ASUS_WMI_DEVID_APU_MEM, &mem); + if (err) + return err; + + if ((mem & ASUS_WMI_DSTS_PRESENCE_BIT) =3D=3D 0) + return -ENODEV; + + mem &=3D ~ASUS_WMI_DSTS_PRESENCE_BIT; + + /* After 0x000 is set, a read will return 0x100 */ + if (mem =3D=3D 0x100) + return sysfs_emit(buf, "0\n"); + + for (unsigned int i =3D 0; i < ARRAY_SIZE(apu_mem_map); i++) { + if (apu_mem_map[i] =3D=3D mem) + return sysfs_emit(buf, "%u\n", i); + } + + pr_warn("Unrecognised value for APU mem 0x%08x\n", mem); + return sysfs_emit(buf, "%u\n", mem); +} + +static ssize_t apu_mem_current_value_store(struct kobject *kobj, struct ko= bj_attribute *attr, + const char *buf, size_t count) +{ + int result, err; + u32 requested, mem; + + result =3D kstrtou32(buf, 10, &requested); + if (result) + return result; + + if (requested > ARRAY_SIZE(apu_mem_map)) + return -EINVAL; + + mem =3D apu_mem_map[requested]; + + err =3D asus_wmi_set_devstate(ASUS_WMI_DEVID_APU_MEM, mem, &result); + if (err) { + pr_warn("Failed to set apu_mem: %d\n", err); + return err; + } + + pr_info("APU memory changed to %uGB, reboot required\n", requested+1); + sysfs_notify(kobj, NULL, attr->attr.name); + + asus_set_reboot_and_signal_event(); + + return count; +} + +static ssize_t apu_mem_possible_values_show(struct kobject *kobj, struct k= obj_attribute *attr, + char *buf) +{ + BUILD_BUG_ON(ARRAY_SIZE(apu_mem_map) !=3D 9); + return sysfs_emit(buf, "0;1;2;3;4;5;6;7;8\n"); +} +ATTR_GROUP_ENUM_CUSTOM(apu_mem, "apu_mem", "Set available system RAM (in G= B) for the APU to use"); + /* Simple attribute creation */ ATTR_GROUP_ENUM_INT_RO(charge_mode, "charge_mode", ASUS_WMI_DEVID_CHARGE_M= ODE, "0;1;2", "Show the current mode of charging"); @@ -414,6 +494,7 @@ static const struct asus_attr_group armoury_attr_groups= [] =3D { { &egpu_connected_attr_group, ASUS_WMI_DEVID_EGPU_CONNECTED }, { &egpu_enable_attr_group, ASUS_WMI_DEVID_EGPU }, { &dgpu_disable_attr_group, ASUS_WMI_DEVID_DGPU }, + { &apu_mem_attr_group, ASUS_WMI_DEVID_APU_MEM }, =20 { &charge_mode_attr_group, ASUS_WMI_DEVID_CHARGE_MODE }, { &boot_sound_attr_group, ASUS_WMI_DEVID_BOOT_SOUND }, diff --git a/include/linux/platform_data/x86/asus-wmi.h b/include/linux/pla= tform_data/x86/asus-wmi.h index adbc4e0e7576..d5f4b1de6d54 100644 --- a/include/linux/platform_data/x86/asus-wmi.h +++ b/include/linux/platform_data/x86/asus-wmi.h @@ -137,6 +137,8 @@ /* dgpu on/off */ #define ASUS_WMI_DEVID_DGPU 0x00090020 =20 +#define ASUS_WMI_DEVID_APU_MEM 0x000600C1 + /* gpu mux switch, 0 =3D dGPU, 1 =3D Optimus */ #define ASUS_WMI_DEVID_GPU_MUX 0x00090016 #define ASUS_WMI_DEVID_GPU_MUX_VIVO 0x00090026 --=20 2.50.1 From nobody Sun Oct 5 09:07:16 2025 Received: from mail-wr1-f53.google.com (mail-wr1-f53.google.com [209.85.221.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 368CE28C87D; Wed, 6 Aug 2025 13:53:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754488439; cv=none; b=jWGtQR8bHQdk/qJ15OoaGGwGptcAmGBvq48/AUL+N2RszSJNyL9C6rq3/zm9kprSMHQyBEKB1Fn/RvvUKzHGitJUE9vLkRM7Ek9VMEMVBXGHBThd4lTWqa3KcFEKrYY+I2FN8owAlRx7VtOLLIC8f97CK00eqqBGP7VPfiZCQl0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754488439; c=relaxed/simple; bh=NyieNGe+oF+v3JEmHPg/hCdfI+0EoAYznbT6C2k8OVI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=V+pH5dcsg+PjDOwp141W8fuEL3zNfXC6XFH7qAZiv3GzEYAwzSLoccz0t0FcXaT3cQIXf5QdtQjeIm8QhTHgWmfDPpWYCd6dJZVw7OCz5u/FyaG7wBmTW6VUYMrq9jnXG08fiGWQ6wJRLTISjUvEgClMZqqU+CYDQt2QJSYp7jY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=HY6ya0Et; arc=none smtp.client-ip=209.85.221.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="HY6ya0Et" Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-3b78d337dd9so3726462f8f.3; Wed, 06 Aug 2025 06:53:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1754488435; x=1755093235; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bDR2vFZKCmVOxJ0q5lD+gqAbFKbxZlWWeU0ccf6/sqQ=; b=HY6ya0Etgf/DoXfBiZDQYOjBiTQWR5DE5J+Z87Tonaf1RLR+8l2X4FJhIWCpzWHxaQ R7RDZBsHUWgUfFkXvxCndsU8WfmOfqhM+QLB02AGATLoSvwBQ4nrCTKhI8TRsiZZtyml tWQ27Y7dfFty9ZD0y06ALmw6kQ0aZDdeNNeAoogevBDPacN20L00x5c4XMRlmf4MqU9v s4Ew6plW0oyIH+ZWuDxi9oHwU1EhsRi4jJaXVODU4v44iCVFkGVi/v6zfkXE5wZH0VdN zWSuKkHo9KEw/XFFQhIptPz2GxUqwedDsUUaVgQ8oJEacNABetH3dauN9YIPavFrRzFl Fgng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1754488435; x=1755093235; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bDR2vFZKCmVOxJ0q5lD+gqAbFKbxZlWWeU0ccf6/sqQ=; b=c3kcVw1AbRl8XZKEtmUH4BVShHKC5xQMVx2V/UW6zuGhcZS/iFiEULNJ2ZdTxwW8hX v18ZzY1r/GhxSr4Y3VjwEhFbaVrZStyPqrD0p9b1Qa0jv8sb0BTvTLWMvn579ziVKfoG j5YJBdcwEq2rnnjIzxrGQF/En5fm3kcFccXKv1+LDHmLl905RjyJ1raJNQFVMUIASjyL 12FgCYJszn9ArBb7kFYOC7ZS8wJDUsL1CZKb47KwMopQUYwYULgUFGRPCccYHAzAj4z2 AOsjrvu5NDb00bTV1TRVOya+6lmmDq+a1j0Zr7822mpl3Q4YRaXZsWxxIHeHGwuGUVHG Q3SQ== X-Forwarded-Encrypted: i=1; AJvYcCU0EvKDP2Gp2enbthsEWxr92QtxYq8ge/RVZ+4zScTztuJdltAHZOGf/AplUXu+Pqy++GE0ozmISDsZ3FswZjIdS1D6@vger.kernel.org X-Gm-Message-State: AOJu0YzNR5oRkXjxvxddZ91OFPZdYAMrx/kVGgvsiAA9TGtM3BG+P/TF rKLrcPzPVqRc7qffrUafySLOj8jAN532EgB2c7TdJgJUnVuBXYUuXto3Pe3FzQ== X-Gm-Gg: ASbGncsjo3YBbalAMamy36upfbcgUHTQdSBOQIMyeBbtZ4flgkKfv+1otdaJSHBM3Nu 8QNcyBjYWo8hpnjHEcmCA8BOrSHDeXDLN8c9QyyUpSrnVGngVzt8Fcizv0QCQqNGKCZyDZKzQZv a+owOuXNRvmDEIjUj6v1keSkx5hyeLZnhicIW6bXVT4xE82WCIxue4orycztBJ0biWH7lRcSA1F c+hTQh3CQC2jL9QCSDm8IBY7X/2K7d8hHxCqwSndHFy8WTggDEFcdYtNPGAoSn925PjrAzxsu7p 2Cq/uErvuGr3cIJUvXpOk/uxxJvLFsHwmET6RGGTLAF0BD5E3yGO2tsSt1BbT0cGfPicOY8jXeU XLHLRTnybAGcjm3hJuWn1j3h1 X-Google-Smtp-Source: AGHT+IHvrU4MHTfDrDKQ9bhNDfzUJKrdgeb4MpRKlaRoK1aYF6lroNVc6vaigTedFS1UcDU274agGg== X-Received: by 2002:a05:6000:2486:b0:3b7:9a31:2a10 with SMTP id ffacd0b85a97d-3b8f4923f05mr2033711f8f.41.1754488435181; Wed, 06 Aug 2025 06:53:55 -0700 (PDT) Received: from denis-pc ([151.49.205.110]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b79c3bc12csm23646087f8f.28.2025.08.06.06.53.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Aug 2025 06:53:54 -0700 (PDT) From: Denis Benato To: linux-kernel@vger.kernel.org Cc: hdegoede@redhat.com, ilpo.jarvinen@linux.intel.com, platform-driver-x86@vger.kernel.org, mario.limonciello@amd.com, "Luke D . Jones" , Denis Benato Subject: [PATCH v10 5/8] platform/x86: asus-armoury: add core count control Date: Wed, 6 Aug 2025 15:53:16 +0200 Message-ID: <20250806135319.1205762-6-benato.denis96@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250806135319.1205762-1-benato.denis96@gmail.com> References: <20250806135319.1205762-1-benato.denis96@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Luke D. Jones" Implement Intel core enablement under the asus-armoury module using the fw_attributes class. This allows users to enable or disable preformance or efficiency cores depending on their requirements. After change a reboot is required. Signed-off-by: Denis Benato Signed-off-by: Luke D. Jones --- drivers/platform/x86/asus-armoury.c | 258 ++++++++++++++++++++- drivers/platform/x86/asus-armoury.h | 28 +++ include/linux/platform_data/x86/asus-wmi.h | 5 + 3 files changed, 290 insertions(+), 1 deletion(-) diff --git a/drivers/platform/x86/asus-armoury.c b/drivers/platform/x86/asu= s-armoury.c index e458d23d020d..4629389c4c25 100644 --- a/drivers/platform/x86/asus-armoury.c +++ b/drivers/platform/x86/asus-armoury.c @@ -45,13 +45,49 @@ #define ASUS_MINI_LED_2024_STRONG 0x01 #define ASUS_MINI_LED_2024_OFF 0x02 =20 +#define ASUS_POWER_CORE_MASK GENMASK(15, 8) +#define ASUS_PERF_CORE_MASK GENMASK(7, 0) + +enum cpu_core_type { + CPU_CORE_PERF =3D 0, + CPU_CORE_POWER, +}; + +enum cpu_core_value { + CPU_CORE_DEFAULT =3D 0, + CPU_CORE_MIN, + CPU_CORE_MAX, + CPU_CORE_CURRENT, +}; + +#define CPU_PERF_CORE_COUNT_MIN 4 +#define CPU_POWR_CORE_COUNT_MIN 0 + +/* Tunables provided by ASUS for gaming laptops */ +struct cpu_cores { + u32 cur_perf_cores; + u32 min_perf_cores; + u32 max_perf_cores; + u32 cur_power_cores; + u32 min_power_cores; + u32 max_power_cores; +}; + static struct asus_armoury_priv { struct device *fw_attr_dev; struct kset *fw_attr_kset; =20 + struct cpu_cores *cpu_cores; u32 mini_led_dev_id; u32 gpu_mux_dev_id; -} asus_armoury; + /* + * Mutex to prevent big/little core count changes writing to same + * endpoint at the same time. Must lock during attr store. + */ + struct mutex cpu_core_mutex; +} asus_armoury =3D { + .cpu_core_mutex =3D __MUTEX_INITIALIZER(asus_armoury.cpu_core_mutex) +}; =20 struct fw_attrs_group { bool pending_reboot; @@ -93,6 +129,8 @@ static struct kobj_attribute pending_reboot =3D __ATTR_R= O(pending_reboot); static bool asus_bios_requires_reboot(struct kobj_attribute *attr) { return !strcmp(attr->attr.name, "gpu_mux_mode") || + !strcmp(attr->attr.name, "cores_performance") || + !strcmp(attr->attr.name, "cores_efficiency") || !strcmp(attr->attr.name, "panel_hd_mode"); } =20 @@ -171,6 +209,12 @@ static ssize_t enum_type_show(struct kobject *kobj, st= ruct kobj_attribute *attr, return sysfs_emit(buf, "enumeration\n"); } =20 +static ssize_t int_type_show(struct kobject *kobj, struct kobj_attribute *= attr, + char *buf) +{ + return sysfs_emit(buf, "integer\n"); +} + /* Mini-LED mode *********************************************************= *****/ static ssize_t mini_led_mode_current_value_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) @@ -474,6 +518,207 @@ static ssize_t apu_mem_possible_values_show(struct ko= bject *kobj, struct kobj_at } ATTR_GROUP_ENUM_CUSTOM(apu_mem, "apu_mem", "Set available system RAM (in G= B) for the APU to use"); =20 +static int init_max_cpu_cores(void) +{ + u32 cores; + int err; + + asus_armoury.cpu_cores =3D kzalloc(sizeof(struct cpu_cores), GFP_KERNEL); + if (!asus_armoury.cpu_cores) + return -ENOMEM; + + err =3D asus_wmi_get_devstate_dsts(ASUS_WMI_DEVID_CORES_MAX, &cores); + if (err) + return err; + + if ((cores & ASUS_WMI_DSTS_PRESENCE_BIT) =3D=3D 0) { + pr_err("ACPI does not support CPU core count control\n"); + err =3D -ENODEV; + goto init_max_cpu_cores_err; + } + + asus_armoury.cpu_cores->max_power_cores =3D FIELD_GET(ASUS_POWER_CORE_MAS= K, cores); + asus_armoury.cpu_cores->max_perf_cores =3D FIELD_GET(ASUS_PERF_CORE_MASK,= cores); + + err =3D asus_wmi_get_devstate_dsts(ASUS_WMI_DEVID_CORES, &cores); + if (err) { + pr_err("Could not get CPU core count: error %d\n", err); + goto init_max_cpu_cores_err; + } + + asus_armoury.cpu_cores->cur_perf_cores =3D FIELD_GET(ASUS_PERF_CORE_MASK,= cores); + asus_armoury.cpu_cores->cur_power_cores =3D FIELD_GET(ASUS_POWER_CORE_MAS= K, cores); + + asus_armoury.cpu_cores->min_perf_cores =3D CPU_PERF_CORE_COUNT_MIN; + asus_armoury.cpu_cores->min_power_cores =3D CPU_POWR_CORE_COUNT_MIN; + + return 0; + +init_max_cpu_cores_err: + kfree(asus_armoury.cpu_cores); + return err; +} + +static ssize_t cores_value_show(struct kobject *kobj, struct kobj_attribut= e *attr, char *buf, + enum cpu_core_type core_type, enum cpu_core_value core_value) +{ + u32 cores; + + switch (core_value) { + case CPU_CORE_DEFAULT: + case CPU_CORE_MAX: + if (core_type =3D=3D CPU_CORE_PERF) + return sysfs_emit(buf, "%u\n", + asus_armoury.cpu_cores->max_perf_cores); + else + return sysfs_emit(buf, "%u\n", + asus_armoury.cpu_cores->max_power_cores); + case CPU_CORE_MIN: + if (core_type =3D=3D CPU_CORE_PERF) + return sysfs_emit(buf, "%u\n", + asus_armoury.cpu_cores->min_perf_cores); + else + return sysfs_emit(buf, "%u\n", + asus_armoury.cpu_cores->min_power_cores); + default: + break; + } + + if (core_type =3D=3D CPU_CORE_PERF) + cores =3D asus_armoury.cpu_cores->cur_perf_cores; + else + cores =3D asus_armoury.cpu_cores->cur_power_cores; + + return sysfs_emit(buf, "%u\n", cores); +} + +static ssize_t cores_current_value_store(struct kobject *kobj, struct kobj= _attribute *attr, + const char *buf, enum cpu_core_type core_type) +{ + u32 new_cores, perf_cores, power_cores, out_val, min, max; + int result, err; + + result =3D kstrtou32(buf, 10, &new_cores); + if (result) + return result; + + scoped_guard(mutex, &asus_armoury.cpu_core_mutex) { + if (core_type =3D=3D CPU_CORE_PERF) { + perf_cores =3D new_cores; + power_cores =3D asus_armoury.cpu_cores->cur_power_cores; + min =3D asus_armoury.cpu_cores->min_perf_cores; + max =3D asus_armoury.cpu_cores->max_perf_cores; + } else { + perf_cores =3D asus_armoury.cpu_cores->cur_perf_cores; + power_cores =3D new_cores; + min =3D asus_armoury.cpu_cores->min_power_cores; + max =3D asus_armoury.cpu_cores->max_power_cores; + } + + if (new_cores < min || new_cores > max) + return -EINVAL; + + out_val =3D FIELD_PREP(ASUS_PERF_CORE_MASK, perf_cores) | + FIELD_PREP(ASUS_POWER_CORE_MASK, power_cores); + + err =3D asus_wmi_set_devstate(ASUS_WMI_DEVID_CORES, out_val, &result); + if (err) { + pr_warn("Failed to set CPU core count: %d\n", err); + return err; + } + + if (result > 1) { + pr_warn("Failed to set CPU core count (result): 0x%x\n", result); + return -EIO; + } + } + + pr_info("CPU core count changed, reboot required\n"); + + sysfs_notify(kobj, NULL, attr->attr.name); + asus_set_reboot_and_signal_event(); + + return 0; +} + +static ssize_t cores_performance_min_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_PERF, CPU_CORE_MIN); +} + +static ssize_t cores_performance_max_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_PERF, CPU_CORE_MAX); +} + +static ssize_t cores_performance_default_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_PERF, CPU_CORE_DEFAULT); +} + +static ssize_t cores_performance_current_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_PERF, CPU_CORE_CURRENT); +} + +static ssize_t cores_performance_current_value_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t count) +{ + int err; + + err =3D cores_current_value_store(kobj, attr, buf, CPU_CORE_PERF); + if (err) + return err; + + return count; +} +ATTR_GROUP_CORES_RW(cores_performance, "cores_performance", + "Set the max available performance cores"); + +static ssize_t cores_efficiency_min_value_show(struct kobject *kobj, struc= t kobj_attribute *attr, + char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_POWER, CPU_CORE_MIN); +} + +static ssize_t cores_efficiency_max_value_show(struct kobject *kobj, struc= t kobj_attribute *attr, + char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_POWER, CPU_CORE_MAX); +} + +static ssize_t cores_efficiency_default_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_POWER, CPU_CORE_DEFAULT= ); +} + +static ssize_t cores_efficiency_current_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_POWER, CPU_CORE_CURRENT= ); +} + +static ssize_t cores_efficiency_current_value_store(struct kobject *kobj, + struct kobj_attribute *attr, const char *buf, + size_t count) +{ + int err; + + err =3D cores_current_value_store(kobj, attr, buf, CPU_CORE_POWER); + if (err) + return err; + + return count; +} +ATTR_GROUP_CORES_RW(cores_efficiency, "cores_efficiency", + "Set the max available efficiency cores"); + /* Simple attribute creation */ ATTR_GROUP_ENUM_INT_RO(charge_mode, "charge_mode", ASUS_WMI_DEVID_CHARGE_M= ODE, "0;1;2", "Show the current mode of charging"); @@ -495,6 +740,8 @@ static const struct asus_attr_group armoury_attr_groups= [] =3D { { &egpu_enable_attr_group, ASUS_WMI_DEVID_EGPU }, { &dgpu_disable_attr_group, ASUS_WMI_DEVID_DGPU }, { &apu_mem_attr_group, ASUS_WMI_DEVID_APU_MEM }, + { &cores_efficiency_attr_group, ASUS_WMI_DEVID_CORES_MAX }, + { &cores_performance_attr_group, ASUS_WMI_DEVID_CORES_MAX }, =20 { &charge_mode_attr_group, ASUS_WMI_DEVID_CHARGE_MODE }, { &boot_sound_attr_group, ASUS_WMI_DEVID_BOOT_SOUND }, @@ -598,6 +845,7 @@ static int asus_fw_attr_add(void) static int __init asus_fw_init(void) { char *wmi_uid; + int err; =20 wmi_uid =3D wmi_get_acpi_device_uid(ASUS_WMI_MGMT_GUID); if (!wmi_uid) @@ -610,6 +858,14 @@ static int __init asus_fw_init(void) if (!strcmp(wmi_uid, ASUS_ACPI_UID_ASUSWMI)) return -ENODEV; =20 + if (asus_wmi_is_present(ASUS_WMI_DEVID_CORES_MAX)) { + err =3D init_max_cpu_cores(); + if (err) { + pr_err("Could not initialise CPU core control %d\n", err); + return err; + } + } + return asus_fw_attr_add(); } =20 diff --git a/drivers/platform/x86/asus-armoury.h b/drivers/platform/x86/asu= s-armoury.h index 61675e7b5a60..a6c4caefdef9 100644 --- a/drivers/platform/x86/asus-armoury.h +++ b/drivers/platform/x86/asus-armoury.h @@ -161,4 +161,32 @@ .name =3D _fsname, .attrs =3D _attrname##_attrs \ } =20 +/* CPU core attributes need a little different in setup */ +#define ATTR_GROUP_CORES_RW(_attrname, _fsname, _dispname) \ + __ATTR_SHOW_FMT(scalar_increment, _attrname, "%d\n", 1); \ + __ATTR_SHOW_FMT(display_name, _attrname, "%s\n", _dispname); \ + static struct kobj_attribute attr_##_attrname##_current_value =3D \ + __ASUS_ATTR_RW(_attrname, current_value); \ + static struct kobj_attribute attr_##_attrname##_default_value =3D \ + __ASUS_ATTR_RO(_attrname, default_value); \ + static struct kobj_attribute attr_##_attrname##_min_value =3D \ + __ASUS_ATTR_RO(_attrname, min_value); \ + static struct kobj_attribute attr_##_attrname##_max_value =3D \ + __ASUS_ATTR_RO(_attrname, max_value); \ + static struct kobj_attribute attr_##_attrname##_type =3D \ + __ASUS_ATTR_RO_AS(type, int_type_show); \ + static struct attribute *_attrname##_attrs[] =3D { \ + &attr_##_attrname##_current_value.attr, \ + &attr_##_attrname##_default_value.attr, \ + &attr_##_attrname##_min_value.attr, \ + &attr_##_attrname##_max_value.attr, \ + &attr_##_attrname##_scalar_increment.attr, \ + &attr_##_attrname##_display_name.attr, \ + &attr_##_attrname##_type.attr, \ + NULL \ + }; \ + static const struct attribute_group _attrname##_attr_group =3D { \ + .name =3D _fsname, .attrs =3D _attrname##_attrs \ + } + #endif /* _ASUS_ARMOURY_H_ */ diff --git a/include/linux/platform_data/x86/asus-wmi.h b/include/linux/pla= tform_data/x86/asus-wmi.h index d5f4b1de6d54..3e7491f8e01a 100644 --- a/include/linux/platform_data/x86/asus-wmi.h +++ b/include/linux/platform_data/x86/asus-wmi.h @@ -137,6 +137,11 @@ /* dgpu on/off */ #define ASUS_WMI_DEVID_DGPU 0x00090020 =20 +/* Intel E-core and P-core configuration in a format 0x0[E]0[P] */ +#define ASUS_WMI_DEVID_CORES 0x001200D2 + /* Maximum Intel E-core and P-core availability */ +#define ASUS_WMI_DEVID_CORES_MAX 0x001200D3 + #define ASUS_WMI_DEVID_APU_MEM 0x000600C1 =20 /* gpu mux switch, 0 =3D dGPU, 1 =3D Optimus */ --=20 2.50.1 From nobody Sun Oct 5 09:07:16 2025 Received: from mail-wr1-f42.google.com (mail-wr1-f42.google.com [209.85.221.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0A22028CF64; Wed, 6 Aug 2025 13:53:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754488440; cv=none; b=LfX/0W9Ajz2ST9tgimNGd5NWIvfN5jQz/5h0bsX8cTTBiXEkJWNbLFGl2SVL9/LlRGDNKNiUR9vSaWttdzYz4QkOXDG6x6F2JjA8DZ+bgZrEYWGIpZZ6gzPBWpxXPRfcVt1Ft/QY56uygnXfvMhekdt/4Cbl1I4IdDm5GrBsSn8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754488440; c=relaxed/simple; bh=OxQBCVIRGDSLaxwSWnR+pZYN7IJX3nZQ+HCBgGE2Sxc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=BH2lY0+kim0/XBC3qHLf/kayePA8Q8UWDJVtz5lTX3JvIRdvO2sn2TgJLSrjKShoR1AfjmU6g2izKezvb98U7AIybGT+ArMxwxXIkawgP/CZ9bc1E4+m7NnJ9xiXgU8AsWjtiwQSq6u6xAvKpJGppt1LOJ6EuiUbulV4sm9nRGM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=OffscTjZ; arc=none smtp.client-ip=209.85.221.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="OffscTjZ" Received: by mail-wr1-f42.google.com with SMTP id ffacd0b85a97d-3b790dbb112so3777655f8f.3; Wed, 06 Aug 2025 06:53:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1754488436; x=1755093236; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=b7+Z0OmSBKwVxIIJ8aTGKOkqCQCixyQZfy+H+rgeu0M=; b=OffscTjZvOz+/xVqZoGtlfveDpJ3kIKhoP+DbqAN32uiGr4fI6UhW/NY4fgZT6oRkO dcUapdm9mqqGtlfv55MzfHsh9/1p6c/5FcuGpKo8PrlvIm3RLqV3Noo7pqmfLnyR13pj 8G2hQ8DtC2D1Ww92cpj3RLoJ2cAWZmOVWZe1A6JRuZ/Zap2U1NluISkv6sVGj7UeM9lm vji6gQh/Gq7I48yn4OCvyhKVirK74fbO6Kozm7CIM5UrPhWN0vKGxSNhf4HKUIgqwXDu P45Zcc9/zGLX00ZrYZd55/VzGWakz1wByafyj5fKzeeAoGVE+cz50ULQ7ZW2LgVqILVE tmpg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1754488436; x=1755093236; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=b7+Z0OmSBKwVxIIJ8aTGKOkqCQCixyQZfy+H+rgeu0M=; b=ZlhU9e4NNRYi+zC9Vxdixf1OMR+pxO7iLDb1B2FASrds1xDmJNV/H1vObtJvZ+FSKx GXUWOLIH7ovxg660L5YD7M6lKeBUnoOgX49IMiTFXHyt0T0T7Mg0Jb6cnhXfmqjxeGD/ oYDu6a8z7gnfYCzQAueAE2vYUqPDt1yCUJI/Lsq5p5zkU88t1iYHaTOVuRtO7OzY4Sky nv4Etcllnh7ntjTHS1EIbEWFP1ofU7rixF7g/YzAi2cWw1475bnB7dpZLYdW/aQ04KkD 5f404BL59+8kyHl6+pH71RLkt4YM/tCGp67Vk6a8MyASOqqm0/x3oVSzSw/P6xLJ6ryR KK6w== X-Forwarded-Encrypted: i=1; AJvYcCXlcJ0joIEKVJ4sWbgjM3aR44L/ReYoVg5eiFJBUOlyeTcVvhdnzsjxtk8Vl6dsnvgT9TMDG++46D9Szt4/CB0aMyDF@vger.kernel.org X-Gm-Message-State: AOJu0Ywgd3+1+IIL94qiTuY6rpJxDz71G217xOwFqOsjaHZkiIwESkF+ jtU3fmAdGgqy+gmmYpNfZpVOG/96r39KrOJuvwiAnNygMrzqfjfKEHmW1ep6Mw== X-Gm-Gg: ASbGncvdXlL/ELi2gFjjevGqRnXbse8IMP+Zwm9i1K8NrASBnuOrQonPjovkYpvOlwT aV1g4CU2o6WHhwdywVTC8uRX0s7tpAjIpHaAvQdXX6O8eqr1AtD0hrTeIls+ZxGGTV7a2vZTkHm 55soUkmlEcJgaWS5oWVrahjoCtm5gstZbrGNXZwCbJdqik73mey1ida412BHD/Tm52X5okQFsPq Q9ZYkkY7pLe96iSVwy2yWS/V28YFC8iUIqIpNdV/WUBbjPHqw9bG3V/plq4NhNqEn1HfQzvY3bz LkVJqGc9h7TbRg/vTEBEIxvmTlzY6GSxuBAToNUx42dPax9MfvcgyQLzAYL7BRnn/PnGm/AIJgH AGuheQJLaczsORt3ss0/+3xeP/vFRTP6Diqs= X-Google-Smtp-Source: AGHT+IFEZGwYJ9Uf8whp6ywxuyMpKU8MRqotups1+m2niz2At8Q4bgaQgb4HlslDZaZbC007u7+SDg== X-Received: by 2002:a05:6000:2204:b0:3a6:d349:1b52 with SMTP id ffacd0b85a97d-3b8f41980femr2388655f8f.21.1754488435945; Wed, 06 Aug 2025 06:53:55 -0700 (PDT) Received: from denis-pc ([151.49.205.110]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b79c3bc12csm23646087f8f.28.2025.08.06.06.53.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Aug 2025 06:53:55 -0700 (PDT) From: Denis Benato To: linux-kernel@vger.kernel.org Cc: hdegoede@redhat.com, ilpo.jarvinen@linux.intel.com, platform-driver-x86@vger.kernel.org, mario.limonciello@amd.com, "Luke D . Jones" Subject: [PATCH v10 6/8] platform/x86: asus-armoury: add screen auto-brightness toggle Date: Wed, 6 Aug 2025 15:53:17 +0200 Message-ID: <20250806135319.1205762-7-benato.denis96@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250806135319.1205762-1-benato.denis96@gmail.com> References: <20250806135319.1205762-1-benato.denis96@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable From: "Luke D. Jones" Add screen_auto_brightness toggle supported on some laptops. Signed-off-by: Luke D. Jones Reviewed-by: Mario Limonciello Reviewed-by: Ilpo J=C3=A4rvinen --- drivers/platform/x86/asus-armoury.c | 4 ++++ include/linux/platform_data/x86/asus-wmi.h | 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/platform/x86/asus-armoury.c b/drivers/platform/x86/asu= s-armoury.c index 4629389c4c25..36571290fc40 100644 --- a/drivers/platform/x86/asus-armoury.c +++ b/drivers/platform/x86/asus-armoury.c @@ -731,6 +731,9 @@ ATTR_GROUP_BOOL_RW(panel_od, "panel_overdrive", ASUS_WM= I_DEVID_PANEL_OD, "Set the panel refresh overdrive"); ATTR_GROUP_BOOL_RW(panel_hd_mode, "panel_hd_mode", ASUS_WMI_DEVID_PANEL_HD, "Set the panel HD mode to UHD<0> or FHD<1>"); +ATTR_GROUP_BOOL_RW(screen_auto_brightness, "screen_auto_brightness", + ASUS_WMI_DEVID_SCREEN_AUTO_BRIGHTNESS, + "Set the panel brightness to Off<0> or On<1>"); ATTR_GROUP_BOOL_RO(egpu_connected, "egpu_connected", ASUS_WMI_DEVID_EGPU_C= ONNECTED, "Show the eGPU connection status"); =20 @@ -748,6 +751,7 @@ static const struct asus_attr_group armoury_attr_groups= [] =3D { { &mcu_powersave_attr_group, ASUS_WMI_DEVID_MCU_POWERSAVE }, { &panel_od_attr_group, ASUS_WMI_DEVID_PANEL_OD }, { &panel_hd_mode_attr_group, ASUS_WMI_DEVID_PANEL_HD }, + { &screen_auto_brightness_attr_group, ASUS_WMI_DEVID_SCREEN_AUTO_BRIGHTNE= SS }, }; =20 static int asus_fw_attr_add(void) diff --git a/include/linux/platform_data/x86/asus-wmi.h b/include/linux/pla= tform_data/x86/asus-wmi.h index 3e7491f8e01a..1191760297d7 100644 --- a/include/linux/platform_data/x86/asus-wmi.h +++ b/include/linux/platform_data/x86/asus-wmi.h @@ -83,6 +83,7 @@ #define ASUS_WMI_DEVID_LID_FLIP_ROG 0x00060077 #define ASUS_WMI_DEVID_MINI_LED_MODE 0x0005001E #define ASUS_WMI_DEVID_MINI_LED_MODE2 0x0005002E +#define ASUS_WMI_DEVID_SCREEN_AUTO_BRIGHTNESS 0x0005002A =20 /* Storage */ #define ASUS_WMI_DEVID_CARDREADER 0x00080013 --=20 2.50.1 From nobody Sun Oct 5 09:07:16 2025 Received: from mail-wr1-f45.google.com (mail-wr1-f45.google.com [209.85.221.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E70E228D844; Wed, 6 Aug 2025 13:53:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754488442; cv=none; b=YFdbjw8/IwOVJGdJMcQnbSsmVb3pMntyzTmk9AJMzZYF6w23DEYQcNSKXBnng0KaIV/MNHHpLPheJ5myp73VrkzdUn6ACQzzJveqdSu47W4G99cUBEeHn8aYpTYQhcASYa0RFKcvjupmitABE55m/tgoUqmG4j/AozIuFOwssMI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754488442; c=relaxed/simple; bh=S8G8M1Bst9Zyi141BHc8U3NY9i/yZtnKloPFhhYG7AY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kMoFK4L301QJy0YpoDjTrMCU1GLSdDS7DCt53dkTkDfBGg/Bc9N7eyKeIOgTY99Twlb7PJli6dKjKV09icZWc3GgoTf1z4caVod4u0LGJOsKMyvzetU5kWU7Lj5modoRcMD/FgLOn9+h/7+O5ObTPw82MALjOwmygAM+lXMSRDY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=GwR/AP88; arc=none smtp.client-ip=209.85.221.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="GwR/AP88" Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-3b7825e2775so5962511f8f.2; Wed, 06 Aug 2025 06:53:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1754488437; x=1755093237; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+JOi4Cywc3NyJoafumHonyS1tl7AhNYOG4SgCAJDZqE=; b=GwR/AP88mmXP8tNNBeZZamTDuJBkt7sF4ftX7EAjf4TG/C56Mvw8Y1m5fO+beSEZtz 1w7EVfqSniyEVOoDmuHoiqfVo1NRrFMGZMKTZZiqlq9w+Ypzx0Bk6kRjk1S5GRDadnYo Uu0dWlaAfKRRAc5mnjEHB9dPI+WWaibNW7rUVVNQ0nSwTnCh72QowoG64AHyxczChc7w ZH6aZRZNr5eraqAFI+Pfsy8ZGfeJ+MfpMHVxASpJvurP63pT8PZ8cVt6+n6C7Hz7flVC f54SgG9812JTeelrGmHbb5rYr4QZwVXYOAJFAwV7LsmFIoXOzR/jj8J5wrHtXjVAcA2N vKLA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1754488437; x=1755093237; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+JOi4Cywc3NyJoafumHonyS1tl7AhNYOG4SgCAJDZqE=; b=taCEFOUuMID1Ts0HNVH0eAs8TyV8/g0Kio4numwuxl0xRDvHp6yOYXt4l9Gs+9VWNY Az+UB6upKId/TXR2klMb4SBMmntvBIaV6TnDt2xJde15IjJCjrLwb7myGDcygXzmJsQz ZFZBBxyfVcl/Qe9JorWuJx935Vlk9kU8/apNoF3V1uG3Hr8CBpKCV+diRJ/sM3fbs/7V ARv/pAuSiRI2jC8nwjitJO4JWAXXOemInyXWNDe7reIImXQattNMoibo5ItRtHQgLJl1 oGdn0KvZyOWJu3aZB6PuPMFpRFPmkE4OEw0inAsiPnDPoqi40TY6LKPUm7FpVps6omjE y0Sw== X-Forwarded-Encrypted: i=1; AJvYcCU97nhhupfaYCLprLeGCXpsKhCDeMCeJS8FTLYa3fgNcuVif5AgyPTGTrCSiNKWcMsixs3FsRrhfSaKl/LG5WdWpaCr@vger.kernel.org X-Gm-Message-State: AOJu0Yyk7nV3TtZF1YCoBO+FtMFXKkKvrMGCye35gOoXNLwWBKUjuKtm QUp2V2NpzOKJcC0OkeSVvkkstrCNgZhWD1fcUOcOg11w+0SFAgZowptlk4XqBQ== X-Gm-Gg: ASbGncvpRYqAAGaMxIU8EQcFUNuuKhosHvC6U7uWOHWNk2FY83FkZGZvsa61GiiF8Fd pSE2wnWOxMuUgpEycagRurDrT+/enlijgwGRw0YgbIyBWsBFT7YkSdHqHefIKqtOct6XuqUJ9sb 6DLULwR7y+sBzsOBTPf/9E1uP5olua7t70sMrE2TpePaXlFzaiFZrw4XIG36WQBfgZbfnXC5ky0 zjaC8VnkKpRTO8I9INVk38pKJr/rQmV8v6lM/v+6WzpEs3Alkwj3BV0b9ybqO4kWzxPeLwSXAFn ruciZyqHFtoaCFsst+Ml3UAgzkOYVzd1F/v0Dt1WTAu/O576C+NCnYntITVhpGfuRWgQFoU8sd+ Jit5qfpLW/PM2UONuqcHRfevF X-Google-Smtp-Source: AGHT+IECSfPkT97tLuqfkAk3gR5p52TGiqgbGehvP5X9rmxQ9C5/2Yadols6P2NovXDioCE4uooUTQ== X-Received: by 2002:a05:600c:4586:b0:458:bc3f:6a77 with SMTP id 5b1f17b1804b1-459e7075eabmr27596615e9.2.1754488436758; Wed, 06 Aug 2025 06:53:56 -0700 (PDT) Received: from denis-pc ([151.49.205.110]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b79c3bc12csm23646087f8f.28.2025.08.06.06.53.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Aug 2025 06:53:56 -0700 (PDT) From: Denis Benato To: linux-kernel@vger.kernel.org Cc: hdegoede@redhat.com, ilpo.jarvinen@linux.intel.com, platform-driver-x86@vger.kernel.org, mario.limonciello@amd.com, "Luke D . Jones" , Denis Benato Subject: [PATCH v10 7/8] platform/x86: asus-wmi: deprecate bios features Date: Wed, 6 Aug 2025 15:53:18 +0200 Message-ID: <20250806135319.1205762-8-benato.denis96@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250806135319.1205762-1-benato.denis96@gmail.com> References: <20250806135319.1205762-1-benato.denis96@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Luke D. Jones" With the existence of the asus-armoury module the attributes no longer need to live under the /sys/devices/platform/asus-nb-wmi/ path. Deprecate all those that were implemented in asus-bioscfg with the goal of removing them fully in the next LTS cycle. Signed-off-by: Luke D. Jones Reviewed-by: Mario Limonciello Tested-by: Denis Benato --- .../ABI/testing/sysfs-platform-asus-wmi | 17 +++ drivers/platform/x86/Kconfig | 11 ++ drivers/platform/x86/asus-wmi.c | 121 ++++++++++++++---- 3 files changed, 124 insertions(+), 25 deletions(-) diff --git a/Documentation/ABI/testing/sysfs-platform-asus-wmi b/Documentat= ion/ABI/testing/sysfs-platform-asus-wmi index 28144371a0f1..765d50b0d9df 100644 --- a/Documentation/ABI/testing/sysfs-platform-asus-wmi +++ b/Documentation/ABI/testing/sysfs-platform-asus-wmi @@ -63,6 +63,7 @@ Date: Aug 2022 KernelVersion: 6.1 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON Switch the GPU hardware MUX mode. Laptops with this feature can can be toggled to boot with only the dGPU (discrete mode) or in standard Optimus/Hybrid mode. On switch a reboot is required: @@ -75,6 +76,7 @@ Date: Aug 2022 KernelVersion: 5.17 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON Disable discrete GPU: * 0 - Enable dGPU, * 1 - Disable dGPU @@ -84,6 +86,7 @@ Date: Aug 2022 KernelVersion: 5.17 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON Enable the external GPU paired with ROG X-Flow laptops. Toggling this setting will also trigger ACPI to disable the dGPU: =20 @@ -95,6 +98,7 @@ Date: Aug 2022 KernelVersion: 5.17 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON Enable an LCD response-time boost to reduce or remove ghosting: * 0 - Disable, * 1 - Enable @@ -104,6 +108,7 @@ Date: Jun 2023 KernelVersion: 6.5 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON Get the current charging mode being used: * 1 - Barrel connected charger, * 2 - USB-C charging @@ -114,6 +119,7 @@ Date: Jun 2023 KernelVersion: 6.5 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON Show if the egpu (XG Mobile) is correctly connected: * 0 - False, * 1 - True @@ -123,6 +129,7 @@ Date: Jun 2023 KernelVersion: 6.5 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON Change the mini-LED mode: * 0 - Single-zone, * 1 - Multi-zone @@ -133,6 +140,7 @@ Date: Apr 2024 KernelVersion: 6.10 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON List the available mini-led modes. =20 What: /sys/devices/platform//ppt_pl1_spl @@ -140,6 +148,7 @@ Date: Jun 2023 KernelVersion: 6.5 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON Set the Package Power Target total of CPU: PL1 on Intel, SPL on AMD. Shown on Intel+Nvidia or AMD+Nvidia based systems: =20 @@ -150,6 +159,7 @@ Date: Jun 2023 KernelVersion: 6.5 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON Set the Slow Package Power Tracking Limit of CPU: PL2 on Intel, SPPT, on AMD. Shown on Intel+Nvidia or AMD+Nvidia based systems: =20 @@ -160,6 +170,7 @@ Date: Jun 2023 KernelVersion: 6.5 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON Set the Fast Package Power Tracking Limit of CPU. AMD+Nvidia only: * min=3D5, max=3D250 =20 @@ -168,6 +179,7 @@ Date: Jun 2023 KernelVersion: 6.5 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON Set the APU SPPT limit. Shown on full AMD systems only: * min=3D5, max=3D130 =20 @@ -176,6 +188,7 @@ Date: Jun 2023 KernelVersion: 6.5 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON Set the platform SPPT limit. Shown on full AMD systems only: * min=3D5, max=3D130 =20 @@ -184,6 +197,7 @@ Date: Jun 2023 KernelVersion: 6.5 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON Set the dynamic boost limit of the Nvidia dGPU: * min=3D5, max=3D25 =20 @@ -192,6 +206,7 @@ Date: Jun 2023 KernelVersion: 6.5 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON Set the target temperature limit of the Nvidia dGPU: * min=3D75, max=3D87 =20 @@ -200,6 +215,7 @@ Date: Apr 2024 KernelVersion: 6.10 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON Set if the BIOS POST sound is played on boot. * 0 - False, * 1 - True @@ -209,6 +225,7 @@ Date: Apr 2024 KernelVersion: 6.10 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON Set if the MCU can go in to low-power mode on system sleep * 0 - False, * 1 - True diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig index f3464e30bd23..a8bde431d541 100644 --- a/drivers/platform/x86/Kconfig +++ b/drivers/platform/x86/Kconfig @@ -284,6 +284,17 @@ config ASUS_WMI To compile this driver as a module, choose M here: the module will be called asus-wmi. =20 +config ASUS_WMI_DEPRECATED_ATTRS + bool "BIOS option support in WMI platform (DEPRECATED)" + depends on ASUS_WMI + default y + help + Say Y to expose the configurable BIOS options through the asus-wmi + driver. + + This can be used with or without the asus-armoury driver which + has the same attributes, but more, and better features. + config ASUS_NB_WMI tristate "Asus Notebook WMI Driver" depends on ASUS_WMI diff --git a/drivers/platform/x86/asus-wmi.c b/drivers/platform/x86/asus-wm= i.c index 9ffcd74c6328..153112502e34 100644 --- a/drivers/platform/x86/asus-wmi.c +++ b/drivers/platform/x86/asus-wmi.c @@ -336,6 +336,13 @@ struct asus_wmi { /* Global to allow setting externally without requiring driver data */ static enum asus_ally_mcu_hack use_ally_mcu_hack =3D ASUS_WMI_ALLY_MCU_HAC= K_INIT; =20 +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) +static void asus_wmi_show_deprecated(void) +{ + pr_notice_once("Accessing attributes through /sys/bus/platform/asus_wmi i= s deprecated and will be removed in a future release. Please switch over to= /sys/class/firmware_attributes.\n"); +} +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ + /* WMI *******************************************************************= *****/ =20 static int asus_wmi_evaluate_method3(u32 method_id, @@ -722,6 +729,7 @@ static void asus_wmi_tablet_mode_get_state(struct asus_= wmi *asus) } =20 /* Charging mode, 1=3DBarrel, 2=3DUSB ************************************= ******/ +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t charge_mode_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -732,12 +740,16 @@ static ssize_t charge_mode_show(struct device *dev, if (result < 0) return result; =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%d\n", value & 0xff); } =20 static DEVICE_ATTR_RO(charge_mode); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* dGPU ******************************************************************= **/ +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t dgpu_disable_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -748,6 +760,8 @@ static ssize_t dgpu_disable_show(struct device *dev, if (result < 0) return result; =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%d\n", result); } =20 @@ -801,8 +815,10 @@ static ssize_t dgpu_disable_store(struct device *dev, return count; } static DEVICE_ATTR_RW(dgpu_disable); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* eGPU ******************************************************************= **/ +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t egpu_enable_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -813,6 +829,8 @@ static ssize_t egpu_enable_show(struct device *dev, if (result < 0) return result; =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%d\n", result); } =20 @@ -869,8 +887,10 @@ static ssize_t egpu_enable_store(struct device *dev, return count; } static DEVICE_ATTR_RW(egpu_enable); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* Is eGPU connected? ****************************************************= *****/ +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t egpu_connected_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -881,12 +901,16 @@ static ssize_t egpu_connected_show(struct device *dev, if (result < 0) return result; =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%d\n", result); } =20 static DEVICE_ATTR_RO(egpu_connected); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* gpu mux switch ********************************************************= *****/ +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t gpu_mux_mode_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -897,6 +921,8 @@ static ssize_t gpu_mux_mode_show(struct device *dev, if (result < 0) return result; =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%d\n", result); } =20 @@ -955,6 +981,7 @@ static ssize_t gpu_mux_mode_store(struct device *dev, return count; } static DEVICE_ATTR_RW(gpu_mux_mode); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* TUF Laptop Keyboard RGB Modes *****************************************= *****/ static ssize_t kbd_rgb_mode_store(struct device *dev, @@ -1078,6 +1105,7 @@ static const struct attribute_group *kbd_rgb_mode_gro= ups[] =3D { }; =20 /* Tunable: PPT: Intel=3DPL1, AMD=3DSPPT *********************************= ********/ +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t ppt_pl2_sppt_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) @@ -1116,6 +1144,8 @@ static ssize_t ppt_pl2_sppt_show(struct device *dev, { struct asus_wmi *asus =3D dev_get_drvdata(dev); =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%u\n", asus->ppt_pl2_sppt); } static DEVICE_ATTR_RW(ppt_pl2_sppt); @@ -1158,6 +1188,8 @@ static ssize_t ppt_pl1_spl_show(struct device *dev, { struct asus_wmi *asus =3D dev_get_drvdata(dev); =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%u\n", asus->ppt_pl1_spl); } static DEVICE_ATTR_RW(ppt_pl1_spl); @@ -1201,6 +1233,8 @@ static ssize_t ppt_fppt_show(struct device *dev, { struct asus_wmi *asus =3D dev_get_drvdata(dev); =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%u\n", asus->ppt_fppt); } static DEVICE_ATTR_RW(ppt_fppt); @@ -1244,6 +1278,8 @@ static ssize_t ppt_apu_sppt_show(struct device *dev, { struct asus_wmi *asus =3D dev_get_drvdata(dev); =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%u\n", asus->ppt_apu_sppt); } static DEVICE_ATTR_RW(ppt_apu_sppt); @@ -1287,6 +1323,8 @@ static ssize_t ppt_platform_sppt_show(struct device *= dev, { struct asus_wmi *asus =3D dev_get_drvdata(dev); =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%u\n", asus->ppt_platform_sppt); } static DEVICE_ATTR_RW(ppt_platform_sppt); @@ -1330,6 +1368,8 @@ static ssize_t nv_dynamic_boost_show(struct device *d= ev, { struct asus_wmi *asus =3D dev_get_drvdata(dev); =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%u\n", asus->nv_dynamic_boost); } static DEVICE_ATTR_RW(nv_dynamic_boost); @@ -1373,9 +1413,12 @@ static ssize_t nv_temp_target_show(struct device *de= v, { struct asus_wmi *asus =3D dev_get_drvdata(dev); =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%u\n", asus->nv_temp_target); } static DEVICE_ATTR_RW(nv_temp_target); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* Ally MCU Powersave ****************************************************= ****/ =20 @@ -1416,6 +1459,7 @@ void set_ally_mcu_powersave(bool enabled) } EXPORT_SYMBOL_NS_GPL(set_ally_mcu_powersave, "ASUS_WMI"); =20 +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t mcu_powersave_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -1426,6 +1470,8 @@ static ssize_t mcu_powersave_show(struct device *dev, if (result < 0) return result; =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%d\n", result); } =20 @@ -1461,6 +1507,7 @@ static ssize_t mcu_powersave_store(struct device *dev, return count; } static DEVICE_ATTR_RW(mcu_powersave); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* Battery ***************************************************************= *****/ =20 @@ -2334,6 +2381,7 @@ static int asus_wmi_rfkill_init(struct asus_wmi *asus) } =20 /* Panel Overdrive *******************************************************= *****/ +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t panel_od_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -2344,6 +2392,8 @@ static ssize_t panel_od_show(struct device *dev, if (result < 0) return result; =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%d\n", result); } =20 @@ -2380,9 +2430,10 @@ static ssize_t panel_od_store(struct device *dev, return count; } static DEVICE_ATTR_RW(panel_od); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* Bootup sound **********************************************************= *****/ - +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t boot_sound_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -2393,6 +2444,8 @@ static ssize_t boot_sound_show(struct device *dev, if (result < 0) return result; =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%d\n", result); } =20 @@ -2428,8 +2481,10 @@ static ssize_t boot_sound_store(struct device *dev, return count; } static DEVICE_ATTR_RW(boot_sound); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* Mini-LED mode *********************************************************= *****/ +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t mini_led_mode_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -2460,6 +2515,8 @@ static ssize_t mini_led_mode_show(struct device *dev, } } =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%d\n", value); } =20 @@ -2530,10 +2587,13 @@ static ssize_t available_mini_led_mode_show(struct = device *dev, return sysfs_emit(buf, "0 1 2\n"); } =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "0\n"); } =20 static DEVICE_ATTR_RO(available_mini_led_mode); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* Quirks ****************************************************************= *****/ =20 @@ -3821,6 +3881,7 @@ static int throttle_thermal_policy_set_default(struct= asus_wmi *asus) return throttle_thermal_policy_write(asus); } =20 +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t throttle_thermal_policy_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -3864,6 +3925,7 @@ static ssize_t throttle_thermal_policy_store(struct d= evice *dev, * Throttle thermal policy: 0 - default, 1 - overboost, 2 - silent */ static DEVICE_ATTR_RW(throttle_thermal_policy); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* Platform profile ******************************************************= *****/ static int asus_wmi_platform_profile_get(struct device *dev, @@ -4465,27 +4527,29 @@ static struct attribute *platform_attributes[] =3D { &dev_attr_camera.attr, &dev_attr_cardr.attr, &dev_attr_touchpad.attr, - &dev_attr_charge_mode.attr, - &dev_attr_egpu_enable.attr, - &dev_attr_egpu_connected.attr, - &dev_attr_dgpu_disable.attr, - &dev_attr_gpu_mux_mode.attr, &dev_attr_lid_resume.attr, &dev_attr_als_enable.attr, &dev_attr_fan_boost_mode.attr, - &dev_attr_throttle_thermal_policy.attr, - &dev_attr_ppt_pl2_sppt.attr, - &dev_attr_ppt_pl1_spl.attr, - &dev_attr_ppt_fppt.attr, - &dev_attr_ppt_apu_sppt.attr, - &dev_attr_ppt_platform_sppt.attr, - &dev_attr_nv_dynamic_boost.attr, - &dev_attr_nv_temp_target.attr, - &dev_attr_mcu_powersave.attr, - &dev_attr_boot_sound.attr, - &dev_attr_panel_od.attr, - &dev_attr_mini_led_mode.attr, - &dev_attr_available_mini_led_mode.attr, +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) + &dev_attr_charge_mode.attr, + &dev_attr_egpu_enable.attr, + &dev_attr_egpu_connected.attr, + &dev_attr_dgpu_disable.attr, + &dev_attr_gpu_mux_mode.attr, + &dev_attr_ppt_pl2_sppt.attr, + &dev_attr_ppt_pl1_spl.attr, + &dev_attr_ppt_fppt.attr, + &dev_attr_ppt_apu_sppt.attr, + &dev_attr_ppt_platform_sppt.attr, + &dev_attr_nv_dynamic_boost.attr, + &dev_attr_nv_temp_target.attr, + &dev_attr_mcu_powersave.attr, + &dev_attr_boot_sound.attr, + &dev_attr_panel_od.attr, + &dev_attr_mini_led_mode.attr, + &dev_attr_available_mini_led_mode.attr, + &dev_attr_throttle_thermal_policy.attr, +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ NULL }; =20 @@ -4507,7 +4571,11 @@ static umode_t asus_sysfs_is_visible(struct kobject = *kobj, devid =3D ASUS_WMI_DEVID_LID_RESUME; else if (attr =3D=3D &dev_attr_als_enable.attr) devid =3D ASUS_WMI_DEVID_ALS_ENABLE; - else if (attr =3D=3D &dev_attr_charge_mode.attr) + else if (attr =3D=3D &dev_attr_fan_boost_mode.attr) + ok =3D asus->fan_boost_mode_available; + +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) + if (attr =3D=3D &dev_attr_charge_mode.attr) devid =3D ASUS_WMI_DEVID_CHARGE_MODE; else if (attr =3D=3D &dev_attr_egpu_enable.attr) ok =3D asus->egpu_enable_available; @@ -4545,6 +4613,7 @@ static umode_t asus_sysfs_is_visible(struct kobject *= kobj, ok =3D asus->mini_led_dev_id !=3D 0; else if (attr =3D=3D &dev_attr_available_mini_led_mode.attr) ok =3D asus->mini_led_dev_id !=3D 0; +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 if (devid !=3D -1) { ok =3D !(asus_wmi_get_devstate_simple(asus, devid) < 0); @@ -4800,6 +4869,7 @@ static int asus_wmi_add(struct platform_device *pdev) } =20 /* ensure defaults for tunables */ +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) asus->ppt_pl2_sppt =3D 5; asus->ppt_pl1_spl =3D 5; asus->ppt_apu_sppt =3D 5; @@ -4822,17 +4892,18 @@ static int asus_wmi_add(struct platform_device *pde= v) asus->gpu_mux_dev =3D ASUS_WMI_DEVID_GPU_MUX; else if (asus_wmi_dev_is_present(asus, ASUS_WMI_DEVID_GPU_MUX_VIVO)) asus->gpu_mux_dev =3D ASUS_WMI_DEVID_GPU_MUX_VIVO; - - if (asus_wmi_dev_is_present(asus, ASUS_WMI_DEVID_TUF_RGB_MODE)) - asus->kbd_rgb_dev =3D ASUS_WMI_DEVID_TUF_RGB_MODE; - else if (asus_wmi_dev_is_present(asus, ASUS_WMI_DEVID_TUF_RGB_MODE2)) - asus->kbd_rgb_dev =3D ASUS_WMI_DEVID_TUF_RGB_MODE2; +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 if (asus_wmi_dev_is_present(asus, ASUS_WMI_DEVID_THROTTLE_THERMAL_POLICY)) asus->throttle_thermal_policy_dev =3D ASUS_WMI_DEVID_THROTTLE_THERMAL_PO= LICY; else if (asus_wmi_dev_is_present(asus, ASUS_WMI_DEVID_THROTTLE_THERMAL_PO= LICY_VIVO)) asus->throttle_thermal_policy_dev =3D ASUS_WMI_DEVID_THROTTLE_THERMAL_PO= LICY_VIVO; =20 + if (asus_wmi_dev_is_present(asus, ASUS_WMI_DEVID_TUF_RGB_MODE)) + asus->kbd_rgb_dev =3D ASUS_WMI_DEVID_TUF_RGB_MODE; + else if (asus_wmi_dev_is_present(asus, ASUS_WMI_DEVID_TUF_RGB_MODE2)) + asus->kbd_rgb_dev =3D ASUS_WMI_DEVID_TUF_RGB_MODE2; + err =3D fan_boost_mode_check_present(asus); if (err) goto fail_fan_boost_mode; --=20 2.50.1 From nobody Sun Oct 5 09:07:16 2025 Received: from mail-wm1-f50.google.com (mail-wm1-f50.google.com [209.85.128.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB3AB28DB64; Wed, 6 Aug 2025 13:53:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754488444; cv=none; b=fs7typ5r5UBrCvjq3YDbZN/tLr2oLOcy/1cLX9aUzCpiI/ldeo9USlKcOypW5sga+Qy4lZObIv2PBgXsBVhVVDBXKDwHamZq004/IIj2N0ut/vLr3KDj+F9P1WPZ337Q8caNGvO1cHSiiS8iPsX/TzeXzfanvxYv5wIu0Xd30sk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754488444; c=relaxed/simple; bh=aYj0hRcpQm9sLd5ZQMWpwYrIUkSSq05KQMQeFHRHP7A=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=coYii/X7W1c79rbRUYeSP4vjxbZGLy4EvMe7rSnhc8WX1OCPKFEZhPOqF9ffokeAAtLOIVhhrxA57Csw74qf4Q60hQN85nIVE2kM7Wx5pSQfXIfjH98Mc+Sk83l0JqTuiNpdYspTSfDCS5ncmO7ScqVAKBv8Xw0wdn2KCN+rDEI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=XJUj5YW1; arc=none smtp.client-ip=209.85.128.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="XJUj5YW1" Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-454f428038eso59738765e9.2; Wed, 06 Aug 2025 06:53:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1754488438; x=1755093238; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dViotDlJZTipbTL6YgUDYUzk0lh/iL67fpZOXjm4HgU=; b=XJUj5YW19XmTa0kN0EgPWuydKxfq81EJyKQhdmHttnBItu2j9TTFpK0oOzrMNXOYkW Q4Fm1icqk6dy5TsEX3WHKASpijhsnX8xUTmMQivHdL+wssmx2I8iuWlXqmf255jPjpMF QVvUjexJ80X6t+/khsYC2UDFVZ5JSyKUv7Zse6ffXKBvwrqcWxM9Z83IsAtdOoIdgWN3 Pka8bLjPu2GdAxkUgtU+UT8G0OoQAbE0mw30R3YubU4so2NKFYMQBMZeuAEIb4BKulzL nBwUWInDVu57W61NmwB1yZdF3q6Jvr3Uj9qCW/shk5ukMGZThxzDMd/l45q+svX+nxkX 98CQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1754488438; x=1755093238; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dViotDlJZTipbTL6YgUDYUzk0lh/iL67fpZOXjm4HgU=; b=Gu9wuYToezdvnAs8RhSFKldit6k1judkLoMzpDjMB/bhjHMw15M3sJZI7vIQvJrJpb wtO10MYDPPm+sOVPDgBTaOaf4ojK5U3wc/XlbrqLO+9DWahX2Yns9AnCYWHoslWpUr7v z4BZxip6CxXBN0M/Dj3uT4w+QXkJB4QXTnOD0ZsIx1yZAbQJUNeh6jaqCYKq8I6fkUaF /mbJ18bTxWpanOGFGHNUZ6t4nUHvSKCTXIJThfjRDD1yVHas2ZmlgX4UMYcxUuRm+d3O IW+Z061O6OVBrpG3djfUK2y+Pb5ly3xykYhMAzkZF+dBpH8QfxLUV1nP84jbpFsHZHt9 pmSw== X-Forwarded-Encrypted: i=1; AJvYcCWCw51YAAM02L2DiR6cS5bcEQ/awoNernF2gfifIH7HXI181mgrE6Ay/sIjSN0bvMJ7JrhvbfrYbJRkjzlNtwEoMwKk@vger.kernel.org X-Gm-Message-State: AOJu0YxI+uLnpD0a26bD/KdMAs59hfneNKNBjxzB6Xyqu3d133EaPmtP FtZiY8SD5kLoyPLeuZSUNf5eKsgl75lp4ROGES/CGlHUJm18jJB5P42dLHteNg== X-Gm-Gg: ASbGnctWHF26s0VnSuqHwguXpZWD0y9jfBd6VV7TRRXrUwRvllsdoelFmmWx3JizAXo Ke6VO1oiMqXq/Zrb1EgDyY3kTGhqKRoyuPM3pSPUD6Gfz8V38KfjHckse++PzLhNcM9bMWl9efX djsOLeV8Ri0UnUXJAVsWaimQoxd8xudQKHftvGkbBEasyNRs14hbQ8zovpIHwngEn8m9aPPV7xe AFjNf2AGk0dshxEvogro2hPsNrlI58DoiCyyiOscl2mtjh2sk4vJKxHC9olFPeWmhZ5eDdPeJCB yfLp69HkRsk/l158Q3GFKQ/yQ1DvdXcNjaqWXtK1xZic28PFHIauPh1bvXJ89mNVjOnCSjyXWZy KKFOTCoNBnMB6Fivey8kcDvpJ X-Google-Smtp-Source: AGHT+IE+Ie7Jnz5ILIZ33pILOKfBgCdNgZYj/GD0O9FP5e0VET8QF767bfANqh6vD5PmHp5g5vImag== X-Received: by 2002:a05:600c:1d16:b0:455:fc16:9eb3 with SMTP id 5b1f17b1804b1-459e70f68c5mr25433925e9.33.1754488437646; Wed, 06 Aug 2025 06:53:57 -0700 (PDT) Received: from denis-pc ([151.49.205.110]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b79c3bc12csm23646087f8f.28.2025.08.06.06.53.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Aug 2025 06:53:57 -0700 (PDT) From: Denis Benato To: linux-kernel@vger.kernel.org Cc: hdegoede@redhat.com, ilpo.jarvinen@linux.intel.com, platform-driver-x86@vger.kernel.org, mario.limonciello@amd.com, "Luke D . Jones" , Denis Benato Subject: [PATCH v10 8/8] platform/x86: asus-armoury: add ppt_* and nv_* tuning knobs Date: Wed, 6 Aug 2025 15:53:19 +0200 Message-ID: <20250806135319.1205762-9-benato.denis96@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250806135319.1205762-1-benato.denis96@gmail.com> References: <20250806135319.1205762-1-benato.denis96@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Luke D. Jones" Adds the ppt_* and nv_* tuning knobs that are available via WMI methods and adds proper min/max levels plus defaults. The min/max are defined by ASUS and typically gained by looking at what they allow in the ASUS Armoury Crate application - ASUS does not share the values outside of this. It could also be possible to gain the AMD values by use of ryzenadj and testing for the minimum stable value. The general rule of thumb for adding to the match table is that if the model range has a single CPU used throughout, then the DMI match can omit the last letter of the model number as this is the GPU model. If a min or max value is not provided it is assumed that the particular setting is not supported. for example ppt_pl2_sppt_min/max is not set. If a _def is not set then the default is assumed to be _max It is assumed that at least AC settings are available so that the firmware attributes will be created - if no DC table is available and power is on DC, then reading the attributes is -ENODEV. Signed-off-by: Denis Benato Signed-off-by: Luke D. Jones Reviewed-by: Mario Limonciello --- drivers/platform/x86/asus-armoury.c | 296 +++++- drivers/platform/x86/asus-armoury.h | 1086 ++++++++++++++++++++ include/linux/platform_data/x86/asus-wmi.h | 3 + 3 files changed, 1379 insertions(+), 6 deletions(-) diff --git a/drivers/platform/x86/asus-armoury.c b/drivers/platform/x86/asu= s-armoury.c index 36571290fc40..a461be936294 100644 --- a/drivers/platform/x86/asus-armoury.c +++ b/drivers/platform/x86/asus-armoury.c @@ -27,6 +27,7 @@ #include #include #include +#include #include =20 #include "asus-armoury.h" @@ -45,6 +46,17 @@ #define ASUS_MINI_LED_2024_STRONG 0x01 #define ASUS_MINI_LED_2024_OFF 0x02 =20 +/* Power tunable attribute name defines */ +#define ATTR_PPT_PL1_SPL "ppt_pl1_spl" +#define ATTR_PPT_PL2_SPPT "ppt_pl2_sppt" +#define ATTR_PPT_PL3_FPPT "ppt_pl3_fppt" +#define ATTR_PPT_APU_SPPT "ppt_apu_sppt" +#define ATTR_PPT_PLATFORM_SPPT "ppt_platform_sppt" +#define ATTR_NV_DYNAMIC_BOOST "nv_dynamic_boost" +#define ATTR_NV_TEMP_TARGET "nv_temp_target" +#define ATTR_NV_BASE_TGP "nv_base_tgp" +#define ATTR_NV_TGP "nv_tgp" + #define ASUS_POWER_CORE_MASK GENMASK(15, 8) #define ASUS_PERF_CORE_MASK GENMASK(7, 0) =20 @@ -73,11 +85,26 @@ struct cpu_cores { u32 max_power_cores; }; =20 +struct rog_tunables { + const struct power_limits *power_limits; + u32 ppt_pl1_spl; // cpu + u32 ppt_pl2_sppt; // cpu + u32 ppt_pl3_fppt; // cpu + u32 ppt_apu_sppt; // plat + u32 ppt_platform_sppt; // plat + + u32 nv_dynamic_boost; + u32 nv_temp_target; + u32 nv_tgp; +}; + static struct asus_armoury_priv { struct device *fw_attr_dev; struct kset *fw_attr_kset; =20 struct cpu_cores *cpu_cores; + /* Index 0 for DC, 1 for AC */ + struct rog_tunables *rog_tunables[2]; u32 mini_led_dev_id; u32 gpu_mux_dev_id; /* @@ -719,7 +746,34 @@ static ssize_t cores_efficiency_current_value_store(st= ruct kobject *kobj, ATTR_GROUP_CORES_RW(cores_efficiency, "cores_efficiency", "Set the max available efficiency cores"); =20 +/* Define helper to access the current power mode tunable values */ +static inline struct rog_tunables *get_current_tunables(void) +{ + return asus_armoury + .rog_tunables[power_supply_is_system_supplied() ? 1 : 0]; +} + /* Simple attribute creation */ +ATTR_GROUP_ROG_TUNABLE(ppt_pl1_spl, ATTR_PPT_PL1_SPL, ASUS_WMI_DEVID_PPT_P= L1_SPL, + "Set the CPU slow package limit"); +ATTR_GROUP_ROG_TUNABLE(ppt_pl2_sppt, ATTR_PPT_PL2_SPPT, ASUS_WMI_DEVID_PPT= _PL2_SPPT, + "Set the CPU fast package limit"); +ATTR_GROUP_ROG_TUNABLE(ppt_pl3_fppt, ATTR_PPT_PL3_FPPT, ASUS_WMI_DEVID_PPT= _FPPT, + "Set the CPU fastest package limit"); +ATTR_GROUP_ROG_TUNABLE(ppt_apu_sppt, ATTR_PPT_APU_SPPT, ASUS_WMI_DEVID_PPT= _APU_SPPT, + "Set the APU package limit"); +ATTR_GROUP_ROG_TUNABLE(ppt_platform_sppt, ATTR_PPT_PLATFORM_SPPT, ASUS_WMI= _DEVID_PPT_PLAT_SPPT, + "Set the platform package limit"); +ATTR_GROUP_ROG_TUNABLE(nv_dynamic_boost, ATTR_NV_DYNAMIC_BOOST, ASUS_WMI_D= EVID_NV_DYN_BOOST, + "Set the Nvidia dynamic boost limit"); +ATTR_GROUP_ROG_TUNABLE(nv_temp_target, ATTR_NV_TEMP_TARGET, ASUS_WMI_DEVID= _NV_THERM_TARGET, + "Set the Nvidia max thermal limit"); +ATTR_GROUP_ROG_TUNABLE(nv_tgp, "nv_tgp", ASUS_WMI_DEVID_DGPU_SET_TGP, + "Set the additional TGP on top of the base TGP"); +ATTR_GROUP_INT_VALUE_ONLY_RO(nv_base_tgp, ATTR_NV_BASE_TGP, ASUS_WMI_DEVID= _DGPU_BASE_TGP, + "Read the base TGP value"); + + ATTR_GROUP_ENUM_INT_RO(charge_mode, "charge_mode", ASUS_WMI_DEVID_CHARGE_M= ODE, "0;1;2", "Show the current mode of charging"); =20 @@ -746,6 +800,16 @@ static const struct asus_attr_group armoury_attr_group= s[] =3D { { &cores_efficiency_attr_group, ASUS_WMI_DEVID_CORES_MAX }, { &cores_performance_attr_group, ASUS_WMI_DEVID_CORES_MAX }, =20 + { &ppt_pl1_spl_attr_group, ASUS_WMI_DEVID_PPT_PL1_SPL }, + { &ppt_pl2_sppt_attr_group, ASUS_WMI_DEVID_PPT_PL2_SPPT }, + { &ppt_pl3_fppt_attr_group, ASUS_WMI_DEVID_PPT_FPPT }, + { &ppt_apu_sppt_attr_group, ASUS_WMI_DEVID_PPT_APU_SPPT }, + { &ppt_platform_sppt_attr_group, ASUS_WMI_DEVID_PPT_PLAT_SPPT }, + { &nv_dynamic_boost_attr_group, ASUS_WMI_DEVID_NV_DYN_BOOST }, + { &nv_temp_target_attr_group, ASUS_WMI_DEVID_NV_THERM_TARGET }, + { &nv_base_tgp_attr_group, ASUS_WMI_DEVID_DGPU_BASE_TGP }, + { &nv_tgp_attr_group, ASUS_WMI_DEVID_DGPU_SET_TGP }, + { &charge_mode_attr_group, ASUS_WMI_DEVID_CHARGE_MODE }, { &boot_sound_attr_group, ASUS_WMI_DEVID_BOOT_SOUND }, { &mcu_powersave_attr_group, ASUS_WMI_DEVID_MCU_POWERSAVE }, @@ -754,8 +818,75 @@ static const struct asus_attr_group armoury_attr_group= s[] =3D { { &screen_auto_brightness_attr_group, ASUS_WMI_DEVID_SCREEN_AUTO_BRIGHTNE= SS }, }; =20 +/** + * is_power_tunable_attr - Determines if an attribute is a power-related t= unable + * @name: The name of the attribute to check + * + * This function checks if the given attribute name is related to power tu= ning. + * + * Return: true if the attribute is a power-related tunable, false otherwi= se + */ +static bool is_power_tunable_attr(const char *name) +{ + static const char * const power_tunable_attrs[] =3D { + ATTR_PPT_PL1_SPL, ATTR_PPT_PL2_SPPT, + ATTR_PPT_PL3_FPPT, ATTR_PPT_APU_SPPT, + ATTR_PPT_PLATFORM_SPPT, ATTR_NV_DYNAMIC_BOOST, + ATTR_NV_TEMP_TARGET, ATTR_NV_BASE_TGP, + ATTR_NV_TGP + }; + + for (unsigned int i =3D 0; i < ARRAY_SIZE(power_tunable_attrs); i++) { + if (!strcmp(name, power_tunable_attrs[i])) + return true; + } + + return false; +} + +/** + * has_valid_limit - Checks if a power-related attribute has a valid limit= value + * @name: The name of the attribute to check + * @limits: Pointer to the power_limits structure containing limit values + * + * This function checks if a power-related attribute has a valid limit val= ue. + * It returns false if limits is NULL or if the corresponding limit value = is zero. + * + * Return: true if the attribute has a valid limit value, false otherwise + */ +static bool has_valid_limit(const char *name, const struct power_limits *l= imits) +{ + u32 limit_value =3D 0; + + if (!limits) + return false; + + if (!strcmp(name, ATTR_PPT_PL1_SPL)) + limit_value =3D limits->ppt_pl1_spl_max; + else if (!strcmp(name, ATTR_PPT_PL2_SPPT)) + limit_value =3D limits->ppt_pl2_sppt_max; + else if (!strcmp(name, ATTR_PPT_PL3_FPPT)) + limit_value =3D limits->ppt_pl3_fppt_max; + else if (!strcmp(name, ATTR_PPT_APU_SPPT)) + limit_value =3D limits->ppt_apu_sppt_max; + else if (!strcmp(name, ATTR_PPT_PLATFORM_SPPT)) + limit_value =3D limits->ppt_platform_sppt_max; + else if (!strcmp(name, ATTR_NV_DYNAMIC_BOOST)) + limit_value =3D limits->nv_dynamic_boost_max; + else if (!strcmp(name, ATTR_NV_TEMP_TARGET)) + limit_value =3D limits->nv_temp_target_max; + else if (!strcmp(name, ATTR_NV_BASE_TGP) || + !strcmp(name, ATTR_NV_TGP)) + limit_value =3D limits->nv_tgp_max; + + return limit_value > 0; +} + static int asus_fw_attr_add(void) { + const struct power_limits *limits; + bool should_create; + const char *name; int err, i; =20 asus_armoury.fw_attr_dev =3D device_create(&firmware_attributes_class, NU= LL, MKDEV(0, 0), @@ -812,12 +943,30 @@ static int asus_fw_attr_add(void) if (!asus_wmi_is_present(armoury_attr_groups[i].wmi_devid)) continue; =20 - err =3D sysfs_create_group(&asus_armoury.fw_attr_kset->kobj, - armoury_attr_groups[i].attr_group); - if (err) { - pr_err("Failed to create sysfs-group for %s\n", - armoury_attr_groups[i].attr_group->name); - goto err_remove_groups; + /* Always create by default, unless PPT is not present */ + should_create =3D true; + name =3D armoury_attr_groups[i].attr_group->name; + + /* Check if this is a power-related tunable requiring limits */ + if (asus_armoury.rog_tunables[1] && asus_armoury.rog_tunables[1]->power_= limits && + is_power_tunable_attr(name)) { + limits =3D asus_armoury.rog_tunables[1]->power_limits; + /* Check only AC, if DC is not present then AC won't be either */ + should_create =3D has_valid_limit(name, limits); + if (!should_create) { + pr_debug("Missing max value on %s for tunable: %s\n", + dmi_get_system_info(DMI_BOARD_NAME), name); + } + } + + if (should_create) { + err =3D sysfs_create_group(&asus_armoury.fw_attr_kset->kobj, + armoury_attr_groups[i].attr_group); + if (err) { + pr_err("Failed to create sysfs-group for %s\n", + armoury_attr_groups[i].attr_group->name); + goto err_remove_groups; + } } } =20 @@ -846,6 +995,135 @@ static int asus_fw_attr_add(void) =20 /* Init / exit ***********************************************************= *****/ =20 +/* Set up the min/max and defaults for ROG tunables */ +static void init_rog_tunables(void) +{ + const struct power_limits *ac_limits, *dc_limits; + const struct power_data *power_data; + const struct dmi_system_id *dmi_id; + bool ac_initialized =3D false, dc_initialized =3D false; + + /* Match the system against the power_limits table */ + dmi_id =3D dmi_first_match(power_limits); + if (!dmi_id) { + pr_warn("No matching power limits found for this system\n"); + return; + } + + /* Get the power data for this system */ + power_data =3D dmi_id->driver_data; + if (!power_data) { + pr_info("No power data available for this system\n"); + return; + } + + /* Initialize AC power tunables */ + ac_limits =3D power_data->ac_data; + if (ac_limits) { + asus_armoury.rog_tunables[1] =3D + kzalloc(sizeof(*asus_armoury.rog_tunables[1]), GFP_KERNEL); + if (!asus_armoury.rog_tunables[1]) + goto err_nomem; + + asus_armoury.rog_tunables[1]->power_limits =3D ac_limits; + + /* Set initial AC values */ + asus_armoury.rog_tunables[1]->ppt_pl1_spl =3D + ac_limits->ppt_pl1_spl_def ? + ac_limits->ppt_pl1_spl_def : + ac_limits->ppt_pl1_spl_max; + + asus_armoury.rog_tunables[1]->ppt_pl2_sppt =3D + ac_limits->ppt_pl2_sppt_def ? + ac_limits->ppt_pl2_sppt_def : + ac_limits->ppt_pl2_sppt_max; + + asus_armoury.rog_tunables[1]->ppt_pl3_fppt =3D + ac_limits->ppt_pl3_fppt_def ? + ac_limits->ppt_pl3_fppt_def : + ac_limits->ppt_pl3_fppt_max; + + asus_armoury.rog_tunables[1]->ppt_apu_sppt =3D + ac_limits->ppt_apu_sppt_def ? + ac_limits->ppt_apu_sppt_def : + ac_limits->ppt_apu_sppt_max; + + asus_armoury.rog_tunables[1]->ppt_platform_sppt =3D + ac_limits->ppt_platform_sppt_def ? + ac_limits->ppt_platform_sppt_def : + ac_limits->ppt_platform_sppt_max; + + asus_armoury.rog_tunables[1]->nv_dynamic_boost =3D + ac_limits->nv_dynamic_boost_max; + asus_armoury.rog_tunables[1]->nv_temp_target =3D + ac_limits->nv_temp_target_max; + asus_armoury.rog_tunables[1]->nv_tgp =3D ac_limits->nv_tgp_max; + + ac_initialized =3D true; + pr_debug("AC power limits initialized for %s\n", dmi_id->matches[0].subs= tr); + } + + /* Initialize DC power tunables */ + dc_limits =3D power_data->dc_data; + if (dc_limits) { + asus_armoury.rog_tunables[0] =3D + kzalloc(sizeof(*asus_armoury.rog_tunables[0]), GFP_KERNEL); + if (!asus_armoury.rog_tunables[0]) { + if (ac_initialized) + kfree(asus_armoury.rog_tunables[1]); + goto err_nomem; + } + + asus_armoury.rog_tunables[0]->power_limits =3D dc_limits; + + /* Set initial DC values */ + asus_armoury.rog_tunables[0]->ppt_pl1_spl =3D + dc_limits->ppt_pl1_spl_def ? + dc_limits->ppt_pl1_spl_def : + dc_limits->ppt_pl1_spl_max; + + asus_armoury.rog_tunables[0]->ppt_pl2_sppt =3D + dc_limits->ppt_pl2_sppt_def ? + dc_limits->ppt_pl2_sppt_def : + dc_limits->ppt_pl2_sppt_max; + + asus_armoury.rog_tunables[0]->ppt_pl3_fppt =3D + dc_limits->ppt_pl3_fppt_def ? + dc_limits->ppt_pl3_fppt_def : + dc_limits->ppt_pl3_fppt_max; + + asus_armoury.rog_tunables[0]->ppt_apu_sppt =3D + dc_limits->ppt_apu_sppt_def ? + dc_limits->ppt_apu_sppt_def : + dc_limits->ppt_apu_sppt_max; + + asus_armoury.rog_tunables[0]->ppt_platform_sppt =3D + dc_limits->ppt_platform_sppt_def ? + dc_limits->ppt_platform_sppt_def : + dc_limits->ppt_platform_sppt_max; + + asus_armoury.rog_tunables[0]->nv_dynamic_boost =3D + dc_limits->nv_dynamic_boost_max; + asus_armoury.rog_tunables[0]->nv_temp_target =3D + dc_limits->nv_temp_target_max; + asus_armoury.rog_tunables[0]->nv_tgp =3D dc_limits->nv_tgp_max; + + dc_initialized =3D true; + pr_debug("DC power limits initialized for %s\n", dmi_id->matches[0].subs= tr); + } + + if (!ac_initialized) + pr_debug("No AC PPT limits defined\n"); + + if (!dc_initialized) + pr_debug("No DC PPT limits defined\n"); + + return; + +err_nomem: + pr_err("Failed to allocate memory for tunables\n"); +} + static int __init asus_fw_init(void) { char *wmi_uid; @@ -870,6 +1148,9 @@ static int __init asus_fw_init(void) } } =20 + init_rog_tunables(); + + /* Must always be last step to ensure data is available */ return asus_fw_attr_add(); } =20 @@ -878,6 +1159,9 @@ static void __exit asus_fw_exit(void) sysfs_remove_file(&asus_armoury.fw_attr_kset->kobj, &pending_reboot.attr); kset_unregister(asus_armoury.fw_attr_kset); device_destroy(&firmware_attributes_class, MKDEV(0, 0)); + + kfree(asus_armoury.rog_tunables[0]); + kfree(asus_armoury.rog_tunables[1]); } =20 module_init(asus_fw_init); diff --git a/drivers/platform/x86/asus-armoury.h b/drivers/platform/x86/asu= s-armoury.h index a6c4caefdef9..438768ea14cc 100644 --- a/drivers/platform/x86/asus-armoury.h +++ b/drivers/platform/x86/asus-armoury.h @@ -8,6 +8,7 @@ #ifndef _ASUS_ARMOURY_H_ #define _ASUS_ARMOURY_H_ =20 +#include #include #include =20 @@ -189,4 +190,1089 @@ .name =3D _fsname, .attrs =3D _attrname##_attrs \ } =20 +#define ATTR_GROUP_INT_VALUE_ONLY_RO(_attrname, _fsname, _wmi, _dispname) \ + WMI_SHOW_INT(_attrname##_current_value, "%d\n", _wmi); \ + static struct kobj_attribute attr_##_attrname##_current_value =3D \ + __ASUS_ATTR_RO(_attrname, current_value); \ + __ATTR_SHOW_FMT(display_name, _attrname, "%s\n", _dispname); \ + static struct kobj_attribute attr_##_attrname##_type =3D \ + __ASUS_ATTR_RO_AS(type, int_type_show); \ + static struct attribute *_attrname##_attrs[] =3D { \ + &attr_##_attrname##_current_value.attr, \ + &attr_##_attrname##_display_name.attr, \ + &attr_##_attrname##_type.attr, NULL \ + }; \ + static const struct attribute_group _attrname##_attr_group =3D { \ + .name =3D _fsname, .attrs =3D _attrname##_attrs \ + } + +/* + * ROG PPT attributes need a little different in setup as they + * require rog_tunables members. + */ + +#define __ROG_TUNABLE_SHOW(_prop, _attrname, _val) \ + static ssize_t _attrname##_##_prop##_show( \ + struct kobject *kobj, struct kobj_attribute *attr, char *buf) \ + { \ + struct rog_tunables *tunables =3D get_current_tunables(); \ + \ + if (!tunables || !tunables->power_limits) \ + return -ENODEV; \ + \ + return sysfs_emit(buf, "%d\n", tunables->power_limits->_val); \ + } \ + static struct kobj_attribute attr_##_attrname##_##_prop =3D \ + __ASUS_ATTR_RO(_attrname, _prop) + +#define __ROG_TUNABLE_SHOW_DEFAULT(_attrname) \ + static ssize_t _attrname##_default_value_show( \ + struct kobject *kobj, struct kobj_attribute *attr, char *buf) \ + { \ + struct rog_tunables *tunables =3D get_current_tunables(); \ + \ + if (!tunables || !tunables->power_limits) \ + return -ENODEV; \ + \ + return sysfs_emit( \ + buf, "%d\n", \ + tunables->power_limits->_attrname##_def ? \ + tunables->power_limits->_attrname##_def : \ + tunables->power_limits->_attrname##_max); \ + } \ + static struct kobj_attribute attr_##_attrname##_default_value =3D \ + __ASUS_ATTR_RO(_attrname, default_value) + +#define __ROG_TUNABLE_RW(_attr, _wmi) \ + static ssize_t _attr##_current_value_store( \ + struct kobject *kobj, struct kobj_attribute *attr, \ + const char *buf, size_t count) \ + { \ + struct rog_tunables *tunables =3D get_current_tunables(); \ + \ + if (!tunables || !tunables->power_limits) \ + return -ENODEV; \ + \ + return attr_uint_store(kobj, attr, buf, count, \ + tunables->power_limits->_attr##_min, \ + tunables->power_limits->_attr##_max, \ + &tunables->_attr, _wmi); \ + } \ + static ssize_t _attr##_current_value_show( \ + struct kobject *kobj, struct kobj_attribute *attr, char *buf) \ + { \ + struct rog_tunables *tunables =3D get_current_tunables(); \ + \ + if (!tunables) \ + return -ENODEV; \ + \ + return sysfs_emit(buf, "%u\n", tunables->_attr); \ + } \ + static struct kobj_attribute attr_##_attr##_current_value =3D \ + __ASUS_ATTR_RW(_attr, current_value) + +#define ATTR_GROUP_ROG_TUNABLE(_attrname, _fsname, _wmi, _dispname) \ + __ROG_TUNABLE_RW(_attrname, _wmi); \ + __ROG_TUNABLE_SHOW_DEFAULT(_attrname); \ + __ROG_TUNABLE_SHOW(min_value, _attrname, _attrname##_min); \ + __ROG_TUNABLE_SHOW(max_value, _attrname, _attrname##_max); \ + __ATTR_SHOW_FMT(scalar_increment, _attrname, "%d\n", 1); \ + __ATTR_SHOW_FMT(display_name, _attrname, "%s\n", _dispname); \ + static struct kobj_attribute attr_##_attrname##_type =3D \ + __ASUS_ATTR_RO_AS(type, int_type_show); \ + static struct attribute *_attrname##_attrs[] =3D { \ + &attr_##_attrname##_current_value.attr, \ + &attr_##_attrname##_default_value.attr, \ + &attr_##_attrname##_min_value.attr, \ + &attr_##_attrname##_max_value.attr, \ + &attr_##_attrname##_scalar_increment.attr, \ + &attr_##_attrname##_display_name.attr, \ + &attr_##_attrname##_type.attr, \ + NULL \ + }; \ + static const struct attribute_group _attrname##_attr_group =3D { \ + .name =3D _fsname, .attrs =3D _attrname##_attrs \ + } + +/* Default is always the maximum value unless *_def is specified */ +struct power_limits { + u8 ppt_pl1_spl_min; + u8 ppt_pl1_spl_def; + u8 ppt_pl1_spl_max; + u8 ppt_pl2_sppt_min; + u8 ppt_pl2_sppt_def; + u8 ppt_pl2_sppt_max; + u8 ppt_pl3_fppt_min; + u8 ppt_pl3_fppt_def; + u8 ppt_pl3_fppt_max; + u8 ppt_apu_sppt_min; + u8 ppt_apu_sppt_def; + u8 ppt_apu_sppt_max; + u8 ppt_platform_sppt_min; + u8 ppt_platform_sppt_def; + u8 ppt_platform_sppt_max; + /* Nvidia GPU specific, default is always max */ + u8 nv_dynamic_boost_def; // unused. exists for macro + u8 nv_dynamic_boost_min; + u8 nv_dynamic_boost_max; + u8 nv_temp_target_def; // unused. exists for macro + u8 nv_temp_target_min; + u8 nv_temp_target_max; + u8 nv_tgp_def; // unused. exists for macro + u8 nv_tgp_min; + u8 nv_tgp_max; +}; + +struct power_data { + const struct power_limits *ac_data; + const struct power_limits *dc_data; + bool requires_fan_curve; +}; + +/* + * For each avilable attribute there must be a min and a max. + * _def is not required and will be assumed to be default =3D=3D max if mi= ssing. + */ +static const struct dmi_system_id power_limits[] =3D { + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FA401W"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_max =3D 80, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 80, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_tgp_min =3D 55, + .nv_tgp_max =3D 75, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 30, + .ppt_pl2_sppt_min =3D 31, + .ppt_pl2_sppt_max =3D 44, + .ppt_pl3_fppt_min =3D 45, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FA507N"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_max =3D 80, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 80, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_def =3D 45, + .ppt_pl1_spl_max =3D 65, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 54, + .ppt_pl2_sppt_max =3D 65, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + } + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FA507R"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 80, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 80 + }, + .dc_data =3D NULL + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FA507X"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_max =3D 80, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 80, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 20, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_tgp_min =3D 55, + .nv_tgp_max =3D 85, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_def =3D 45, + .ppt_pl1_spl_max =3D 65, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 54, + .ppt_pl2_sppt_max =3D 65, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + } + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FA507Z"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_max =3D 65, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 105, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 15, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_tgp_min =3D 55, + .nv_tgp_max =3D 85, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 45, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_max =3D 60, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + } + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FA607P"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 30, + .ppt_pl1_spl_def =3D 100, + .ppt_pl1_spl_max =3D 135, + .ppt_pl2_sppt_min =3D 30, + .ppt_pl2_sppt_def =3D 115, + .ppt_pl2_sppt_max =3D 135, + .ppt_pl3_fppt_min =3D 30, + .ppt_pl3_fppt_max =3D 135, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_tgp_min =3D 55, + .nv_tgp_max =3D 115, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_def =3D 45, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_def =3D 60, + .ppt_pl2_sppt_max =3D 80, + .ppt_pl3_fppt_min =3D 25, + .ppt_pl3_fppt_max =3D 80, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + } + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FA617NS"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_apu_sppt_min =3D 15, + .ppt_apu_sppt_max =3D 80, + .ppt_platform_sppt_min =3D 30, + .ppt_platform_sppt_max =3D 120 + }, + .dc_data =3D &(struct power_limits) { + .ppt_apu_sppt_min =3D 25, + .ppt_apu_sppt_max =3D 35, + .ppt_platform_sppt_min =3D 45, + .ppt_platform_sppt_max =3D 100 + } + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FA617NT"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_apu_sppt_min =3D 15, + .ppt_apu_sppt_max =3D 80, + .ppt_platform_sppt_min =3D 30, + .ppt_platform_sppt_max =3D 115 + }, + .dc_data =3D &(struct power_limits) { + .ppt_apu_sppt_min =3D 15, + .ppt_apu_sppt_max =3D 45, + .ppt_platform_sppt_min =3D 30, + .ppt_platform_sppt_max =3D 50 + } + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FA617XS"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_apu_sppt_min =3D 15, + .ppt_apu_sppt_max =3D 80, + .ppt_platform_sppt_min =3D 30, + .ppt_platform_sppt_max =3D 120, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_apu_sppt_min =3D 25, + .ppt_apu_sppt_max =3D 35, + .ppt_platform_sppt_min =3D 45, + .ppt_platform_sppt_max =3D 100, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + } + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FX507Z"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_max =3D 90, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 135, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 15, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 45, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_max =3D 60, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GA401Q"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 15, + .ppt_pl2_sppt_max =3D 80, + }, + .dc_data =3D NULL + }, + }, + { + .matches =3D { + // This model is full AMD. No Nvidia dGPU. + DMI_MATCH(DMI_BOARD_NAME, "GA402R"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_apu_sppt_min =3D 15, + .ppt_apu_sppt_max =3D 80, + .ppt_platform_sppt_min =3D 30, + .ppt_platform_sppt_max =3D 115, + }, + .dc_data =3D &(struct power_limits) { + .ppt_apu_sppt_min =3D 25, + .ppt_apu_sppt_def =3D 30, + .ppt_apu_sppt_max =3D 45, + .ppt_platform_sppt_min =3D 40, + .ppt_platform_sppt_max =3D 60, + } + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GA402X"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_def =3D 35, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_def =3D 65, + .ppt_pl2_sppt_max =3D 80, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 80, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 35, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 35, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GA403U"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 80, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 80, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_tgp_min =3D 55, + .nv_tgp_max =3D 65, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 35, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 35, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GA503R"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_def =3D 35, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 65, + .ppt_pl2_sppt_max =3D 80, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 80, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 20, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_def =3D 25, + .ppt_pl1_spl_max =3D 65, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 54, + .ppt_pl2_sppt_max =3D 60, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 65 + } + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GA605W"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_max =3D 80, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 80, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 20, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_tgp_min =3D 55, + .nv_tgp_max =3D 85, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 35, + .ppt_pl2_sppt_min =3D 31, + .ppt_pl2_sppt_max =3D 44, + .ppt_pl3_fppt_min =3D 45, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GU603Z"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 60, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 135, + /* Only allowed in AC mode */ + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 20, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 40, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 40, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + } + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GU604V"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 65, + .ppt_pl1_spl_max =3D 120, + .ppt_pl2_sppt_min =3D 65, + .ppt_pl2_sppt_max =3D 150, + /* Only allowed in AC mode */ + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 40, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 40, + .ppt_pl2_sppt_max =3D 60, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + } + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GU605M"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_max =3D 90, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 135, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 20, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 35, + .ppt_pl2_sppt_min =3D 38, + .ppt_pl2_sppt_max =3D 53, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GV301Q"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 45, + .ppt_pl2_sppt_min =3D 65, + .ppt_pl2_sppt_max =3D 80, + }, + .dc_data =3D NULL + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GV301R"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 45, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 54, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 35, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 35, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + } + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GV601R"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_def =3D 35, + .ppt_pl1_spl_max =3D 90, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 54, + .ppt_pl2_sppt_max =3D 100, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_def =3D 80, + .ppt_pl3_fppt_max =3D 125, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_def =3D 28, + .ppt_pl1_spl_max =3D 65, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 54, + .ppt_pl2_sppt_def =3D 40, + .ppt_pl2_sppt_max =3D 60, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_def =3D 80, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + } + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GV601V"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_def =3D 100, + .ppt_pl1_spl_max =3D 110, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 135, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 20, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 40, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 40, + .ppt_pl2_sppt_max =3D 60, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + } + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GX650P"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_def =3D 110, + .ppt_pl1_spl_max =3D 130, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 125, + .ppt_pl2_sppt_max =3D 130, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_def =3D 125, + .ppt_pl3_fppt_max =3D 135, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_def =3D 25, + .ppt_pl1_spl_max =3D 65, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 35, + .ppt_pl2_sppt_max =3D 65, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_def =3D 42, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + } + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "G513I"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + /* Yes this laptop is very limited */ + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 15, + .ppt_pl2_sppt_max =3D 80, + }, + .dc_data =3D NULL, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "G513QM"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + /* Yes this laptop is very limited */ + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 100, + .ppt_pl2_sppt_min =3D 15, + .ppt_pl2_sppt_max =3D 190, + }, + .dc_data =3D NULL, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "G513R"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 35, + .ppt_pl1_spl_max =3D 90, + .ppt_pl2_sppt_min =3D 54, + .ppt_pl2_sppt_max =3D 100, + .ppt_pl3_fppt_min =3D 54, + .ppt_pl3_fppt_max =3D 125, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_max =3D 50, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 50, + .ppt_pl3_fppt_min =3D 28, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "G614J"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_max =3D 140, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 175, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 55, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 70, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "G634J"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_max =3D 140, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 175, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 55, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 70, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "G733C"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_max =3D 170, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 175, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_max =3D 35, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 35, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "G733P"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 30, + .ppt_pl1_spl_def =3D 100, + .ppt_pl1_spl_max =3D 130, + .ppt_pl2_sppt_min =3D 65, + .ppt_pl2_sppt_def =3D 125, + .ppt_pl2_sppt_max =3D 130, + .ppt_pl3_fppt_min =3D 65, + .ppt_pl3_fppt_def =3D 125, + .ppt_pl3_fppt_max =3D 130, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 65, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 65, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 75, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "G814J"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_max =3D 140, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 140, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 55, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 70, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "G834J"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_max =3D 140, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 175, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 55, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 70, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "H7606W"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_max =3D 80, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 80, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 20, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_tgp_min =3D 55, + .nv_tgp_max =3D 85, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 35, + .ppt_pl2_sppt_min =3D 31, + .ppt_pl2_sppt_max =3D 44, + .ppt_pl3_fppt_min =3D 45, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + } + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "RC71"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 7, + .ppt_pl1_spl_max =3D 30, + .ppt_pl2_sppt_min =3D 15, + .ppt_pl2_sppt_max =3D 43, + .ppt_pl3_fppt_min =3D 15, + .ppt_pl3_fppt_max =3D 53 + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 7, + .ppt_pl1_spl_def =3D 15, + .ppt_pl1_spl_max =3D 25, + .ppt_pl2_sppt_min =3D 15, + .ppt_pl2_sppt_def =3D 20, + .ppt_pl2_sppt_max =3D 30, + .ppt_pl3_fppt_min =3D 15, + .ppt_pl3_fppt_def =3D 25, + .ppt_pl3_fppt_max =3D 35 + } + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "RC72"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 7, + .ppt_pl1_spl_max =3D 30, + .ppt_pl2_sppt_min =3D 15, + .ppt_pl2_sppt_max =3D 43, + .ppt_pl3_fppt_min =3D 15, + .ppt_pl3_fppt_max =3D 53 + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 7, + .ppt_pl1_spl_def =3D 17, + .ppt_pl1_spl_max =3D 25, + .ppt_pl2_sppt_min =3D 15, + .ppt_pl2_sppt_def =3D 24, + .ppt_pl2_sppt_max =3D 30, + .ppt_pl3_fppt_min =3D 15, + .ppt_pl3_fppt_def =3D 30, + .ppt_pl3_fppt_max =3D 35 + } + }, + }, + {} +}; + #endif /* _ASUS_ARMOURY_H_ */ diff --git a/include/linux/platform_data/x86/asus-wmi.h b/include/linux/pla= tform_data/x86/asus-wmi.h index 1191760297d7..86279da06ea2 100644 --- a/include/linux/platform_data/x86/asus-wmi.h +++ b/include/linux/platform_data/x86/asus-wmi.h @@ -145,6 +145,9 @@ =20 #define ASUS_WMI_DEVID_APU_MEM 0x000600C1 =20 +#define ASUS_WMI_DEVID_DGPU_BASE_TGP 0x00120099 +#define ASUS_WMI_DEVID_DGPU_SET_TGP 0x00120098 + /* gpu mux switch, 0 =3D dGPU, 1 =3D Optimus */ #define ASUS_WMI_DEVID_GPU_MUX 0x00090016 #define ASUS_WMI_DEVID_GPU_MUX_VIVO 0x00090026 --=20 2.50.1