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charset="utf-8" From: Md Sadre Alam IPQ5424 have different OPPs available for the CPU based on SoC variant. This can be determined through use of an eFuse register present in the silicon. Added support for ipq5424 on nvmem driver which helps to determine OPPs at runtime based on the eFuse register which has the CPU frequency limits. opp-supported-hw dt binding can be used to indicate the available OPPs for each limit. nvmem driver also creates the "cpufreq-dt" platform_device after passing the version matching data to the OPP framework so that the cpufreq-dt handles the actual cpufreq implementation. Signed-off-by: Md Sadre Alam Signed-off-by: Sricharan Ramabadhran Acked-by: Viresh Kumar Reviewed-by: Konrad Dybcio [ Changed '!=3D' based check to '=3D=3D' based check ] Signed-off-by: Varadarajan Narayanan --- v5: Add 'Acked-by: Viresh Kumar' --- drivers/cpufreq/cpufreq-dt-platdev.c | 1 + drivers/cpufreq/qcom-cpufreq-nvmem.c | 5 +++++ 2 files changed, 6 insertions(+) diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq= -dt-platdev.c index 015dd393eaba..de1769649368 100644 --- a/drivers/cpufreq/cpufreq-dt-platdev.c +++ b/drivers/cpufreq/cpufreq-dt-platdev.c @@ -191,6 +191,7 @@ static const struct of_device_id blocklist[] __initcons= t =3D { { .compatible =3D "ti,am62p5", }, =20 { .compatible =3D "qcom,ipq5332", }, + { .compatible =3D "qcom,ipq5424", }, { .compatible =3D "qcom,ipq6018", }, { .compatible =3D "qcom,ipq8064", }, { .compatible =3D "qcom,ipq8074", }, diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cp= ufreq-nvmem.c index 54f8117103c8..765a5bb81829 100644 --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c @@ -200,6 +200,10 @@ static int qcom_cpufreq_kryo_name_version(struct devic= e *cpu_dev, case QCOM_ID_IPQ9574: drv->versions =3D 1 << (unsigned int)(*speedbin); break; + case QCOM_ID_IPQ5424: + case QCOM_ID_IPQ5404: + drv->versions =3D (*speedbin =3D=3D 0x3b) ? BIT(1) : BIT(0); + break; case QCOM_ID_MSM8996SG: case QCOM_ID_APQ8096SG: drv->versions =3D 1 << ((unsigned int)(*speedbin) + 4); @@ -591,6 +595,7 @@ static const struct of_device_id qcom_cpufreq_match_lis= t[] __initconst __maybe_u { .compatible =3D "qcom,msm8996", .data =3D &match_data_kryo }, { .compatible =3D "qcom,qcs404", .data =3D &match_data_qcs404 }, { .compatible =3D "qcom,ipq5332", .data =3D &match_data_kryo }, + { .compatible =3D "qcom,ipq5424", .data =3D &match_data_kryo }, { .compatible =3D "qcom,ipq6018", .data =3D &match_data_ipq6018 }, { .compatible =3D "qcom,ipq8064", .data =3D &match_data_ipq8064 }, { .compatible =3D "qcom,ipq8074", .data =3D &match_data_ipq8074 }, --=20 2.34.1