From nobody Sun Oct 5 09:07:53 2025 Received: from mailout2.samsung.com (mailout2.samsung.com [203.254.224.25]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 960368821 for ; Wed, 6 Aug 2025 07:00:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=203.254.224.25 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754463636; cv=none; b=XuSmQ69l8MtRJiQHl5if/jo1g1HjqxQmJze7VH4Aeywnytp8m7h/wgau763Wna46VHSdeelzVEFQ/9VF3oCSkudtedJ8FmbktrLNpQfWSpjunpE8qsRJQ/2DgvIIbZomU8vWiUSU934OiBxtg2gyADpI4c/FgqpNCgfr9WpZJKk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754463636; c=relaxed/simple; bh=l1zppUoGsgYQuvWfeE9ZII+mvExfI8uZ5tf9ENz9M9I=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:MIME-Version: Content-Type:References; b=JS0eiHNZFZJ5pTgkFhBnfCUO7OdWLhKNumc/Zb44BPGIkUvimdyL8II114eQN5VR50figbUDTMcoEMA4NoIzdVECKmvBCpQYSL1X/ftE90BCBEVu+r2SWmzlv5Xjohod+QZTXOQbAOerGG4183wExo38YZ+Ry2isx7CA+m+51iA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com; spf=pass smtp.mailfrom=samsung.com; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b=r7dlNq/u; arc=none smtp.client-ip=203.254.224.25 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=samsung.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="r7dlNq/u" Received: from epcas2p3.samsung.com (unknown [182.195.41.55]) by mailout2.samsung.com (KnoxPortal) with ESMTP id 20250806070031epoutp02f7b8f795b46c68645384157426646143~ZG2CmWU9y0359403594epoutp02f for ; Wed, 6 Aug 2025 07:00:31 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout2.samsung.com 20250806070031epoutp02f7b8f795b46c68645384157426646143~ZG2CmWU9y0359403594epoutp02f DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1754463631; bh=iF7XGLKPcudkWLwpYz/z12ZVFINWFvDEkKGpP/Zh/5A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=r7dlNq/uMXoo3w1DXnptLLOpG3nzFYKhs0yXKGY8qmlXilOEPnRTo+vpoH94dBM/m k9sCzy3cZUAwoE2iFddO75pSn21DgrER5HM99Sw4LHHBN56us/3oVMY1M4dkWGF0QV mP1LNXjXi7Iyo/9NXPypXy2Hl5+NzXlngYfL4CgY= Received: from epsnrtp02.localdomain (unknown [182.195.42.154]) by epcas2p1.samsung.com (KnoxPortal) with ESMTPS id 20250806070031epcas2p17a262a7d137cb71fe22b980fbe93030a~ZG2COqlmH3143031430epcas2p1b; Wed, 6 Aug 2025 07:00:31 +0000 (GMT) Received: from epcas2p2.samsung.com (unknown [182.195.36.101]) by epsnrtp02.localdomain (Postfix) with ESMTP id 4bxh5B4c7Yz2SSKn; Wed, 6 Aug 2025 07:00:30 +0000 (GMT) Received: from epsmtip2.samsung.com (unknown [182.195.34.31]) by epcas2p3.samsung.com (KnoxPortal) with ESMTPA id 20250806070029epcas2p3a937682ba1bdad1317ef62aab8f826ae~ZG2AzGAgf0509105091epcas2p3M; Wed, 6 Aug 2025 07:00:29 +0000 (GMT) Received: from localhost.localdomain (unknown [10.229.9.126]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20250806070029epsmtip225a7d2938714340a4c5feb1655141d0e~ZG2As9TKD1971119711epsmtip2V; Wed, 6 Aug 2025 07:00:29 +0000 (GMT) From: Sangwook Shin To: krzk@kernel.org, alim.akhtar@samsung.com, wim@linux-watchdog.org, linux@roeck-us.net, semen.protsenko@linaro.org, dongil01.park@samsung.com, khwan.seo@samsung.com Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, Sangwook Shin Subject: [PATCH v5 1/5] watchdog: s3c2410_wdt: Replace hardcoded values with macro definitions Date: Wed, 6 Aug 2025 15:55:10 +0900 Message-Id: <20250806065514.3688485-2-sw617.shin@samsung.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250806065514.3688485-1-sw617.shin@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250806070029epcas2p3a937682ba1bdad1317ef62aab8f826ae X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P cpgsPolicy: CPGSC10-234,N X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250806070029epcas2p3a937682ba1bdad1317ef62aab8f826ae References: <20250806065514.3688485-1-sw617.shin@samsung.com> Modify the code to utilize macro-defined values instead of hardcoded values. The value 0x100 in the s3c2410wdt_set_heartbeat function represents S3C2410_WTCON_PRESCALE_MAX + 1, but it is hardcoded, making its meaning difficult to understand and reducing code readability. Reviewed-by: Sam Protsenko Reviewed-by: Alim Akhtar Signed-off-by: Sangwook Shin --- drivers/watchdog/s3c2410_wdt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c index 40901bdac426..95f7207e390a 100644 --- a/drivers/watchdog/s3c2410_wdt.c +++ b/drivers/watchdog/s3c2410_wdt.c @@ -587,7 +587,7 @@ static int s3c2410wdt_set_heartbeat(struct watchdog_dev= ice *wdd, if (count >=3D 0x10000) { divisor =3D DIV_ROUND_UP(count, 0xffff); =20 - if (divisor > 0x100) { + if (divisor > S3C2410_WTCON_PRESCALE_MAX + 1) { dev_err(wdt->dev, "timeout %d too big\n", timeout); return -EINVAL; } --=20 2.25.1 From nobody Sun Oct 5 09:07:54 2025 Received: from mailout2.samsung.com (mailout2.samsung.com [203.254.224.25]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9608E1C860E for ; Wed, 6 Aug 2025 07:00:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Wed, 6 Aug 2025 07:00:30 +0000 (GMT) Received: from epcas2p3.samsung.com (unknown [182.195.36.92]) by epsnrtp04.localdomain (Postfix) with ESMTP id 4bxh5B3x25z6B9mG; Wed, 6 Aug 2025 07:00:30 +0000 (GMT) Received: from epsmtip2.samsung.com (unknown [182.195.34.31]) by epcas2p1.samsung.com (KnoxPortal) with ESMTPA id 20250806070029epcas2p1f764301b115b766f88b422b0dbdd68f1~ZG2A32YOF0152301523epcas2p1n; Wed, 6 Aug 2025 07:00:29 +0000 (GMT) Received: from localhost.localdomain (unknown [10.229.9.126]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20250806070029epsmtip298a6e310946bb155b77ddf18434180b6~ZG2AzuvxD2044420444epsmtip2e; Wed, 6 Aug 2025 07:00:29 +0000 (GMT) From: Sangwook Shin To: krzk@kernel.org, alim.akhtar@samsung.com, wim@linux-watchdog.org, linux@roeck-us.net, semen.protsenko@linaro.org, dongil01.park@samsung.com, khwan.seo@samsung.com Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, Sangwook Shin Subject: [PATCH v5 2/5] watchdog: s3c2410_wdt: Fix max_timeout being calculated larger Date: Wed, 6 Aug 2025 15:55:11 +0900 Message-Id: <20250806065514.3688485-3-sw617.shin@samsung.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250806065514.3688485-1-sw617.shin@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250806070029epcas2p1f764301b115b766f88b422b0dbdd68f1 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P cpgsPolicy: CPGSC10-234,N X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250806070029epcas2p1f764301b115b766f88b422b0dbdd68f1 References: <20250806065514.3688485-1-sw617.shin@samsung.com> Fix the issue of max_timeout being calculated larger than actual value. The calculation result of freq / (S3C2410_WTCON_PRESCALE_MAX + 1) / S3C2410_WTCON_MAXDIV is smaller than the actual value because the remainder is discarded during the calculation process. This leads to a larger calculated value for max_timeout compared to the actual settable value. To resolve this issue, the order of calculations in the computation process has been adjusted. Signed-off-by: Sangwook Shin Reviewed-by: Sam Protsenko --- drivers/watchdog/s3c2410_wdt.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c index 95f7207e390a..0a4c0ab2a3d6 100644 --- a/drivers/watchdog/s3c2410_wdt.c +++ b/drivers/watchdog/s3c2410_wdt.c @@ -27,6 +27,7 @@ #include #include #include +#include =20 #define S3C2410_WTCON 0x00 #define S3C2410_WTDAT 0x04 @@ -410,9 +411,13 @@ static inline unsigned long s3c2410wdt_get_freq(struct= s3c2410_wdt *wdt) static inline unsigned int s3c2410wdt_max_timeout(struct s3c2410_wdt *wdt) { const unsigned long freq =3D s3c2410wdt_get_freq(wdt); + //(S3C2410_WTCON_PRESCALE_MAX + 1) * S3C2410_WTCON_MAXDIV =3D 0x8000 + u64 t_max =3D div64_ul((u64)S3C2410_WTCNT_MAXCNT * 0x8000, freq); =20 - return S3C2410_WTCNT_MAXCNT / (freq / (S3C2410_WTCON_PRESCALE_MAX + 1) - / S3C2410_WTCON_MAXDIV); + if (t_max > UINT_MAX) + t_max =3D UINT_MAX; + + return t_max; } =20 static int s3c2410wdt_disable_wdt_reset(struct s3c2410_wdt *wdt, bool mask) --=20 2.25.1 From nobody Sun Oct 5 09:07:54 2025 Received: from mailout2.samsung.com (mailout2.samsung.com [203.254.224.25]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 41808216E24 for ; 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Wed, 6 Aug 2025 07:00:31 +0000 (GMT) Received: from epcas2p1.samsung.com (unknown [182.195.36.90]) by epsnrtp01.localdomain (Postfix) with ESMTP id 4bxh5C242hz6B9m5; Wed, 6 Aug 2025 07:00:31 +0000 (GMT) Received: from epsmtip2.samsung.com (unknown [182.195.34.31]) by epcas2p2.samsung.com (KnoxPortal) with ESMTPA id 20250806070030epcas2p24cc79e6dd3e505afd980fc05ee9e4f19~ZG2BBgIB00238902389epcas2p2f; Wed, 6 Aug 2025 07:00:30 +0000 (GMT) Received: from localhost.localdomain (unknown [10.229.9.126]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20250806070029epsmtip2009cde937e0098d78076564724ab8bec~ZG2A4JwRr2292322923epsmtip25; Wed, 6 Aug 2025 07:00:29 +0000 (GMT) From: Sangwook Shin To: krzk@kernel.org, alim.akhtar@samsung.com, wim@linux-watchdog.org, linux@roeck-us.net, semen.protsenko@linaro.org, dongil01.park@samsung.com, khwan.seo@samsung.com Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, Sangwook Shin Subject: [PATCH v5 3/5] watchdog: s3c2410_wdt: Increase max timeout value of watchdog Date: Wed, 6 Aug 2025 15:55:12 +0900 Message-Id: <20250806065514.3688485-4-sw617.shin@samsung.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250806065514.3688485-1-sw617.shin@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250806070030epcas2p24cc79e6dd3e505afd980fc05ee9e4f19 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P cpgsPolicy: CPGSC10-234,N X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250806070030epcas2p24cc79e6dd3e505afd980fc05ee9e4f19 References: <20250806065514.3688485-1-sw617.shin@samsung.com> Increase max_timeout value from 55s to 3665038s (1018h 3min 58s) with 38400000 frequency system if the system has 32-bit WTCNT register. cat /sys/class/watchdog/watchdog0/max_timeout 3665038 [ 0.330082] s3c2410-wdt 10060000.watchdog_cl0: Heartbeat: count=3D109951= 1400000, timeout=3D3665038, freq=3D300000 [ 0.330087] s3c2410-wdt 10060000.watchdog_cl0: Heartbeat: timeout=3D3665= 038, divisor=3D256, count=3D1099511400000 (fffffc87) [ 0.330127] s3c2410-wdt 10060000.watchdog_cl0: starting watchdog timer [ 0.330134] s3c2410-wdt 10060000.watchdog_cl0: Starting watchdog: count= =3D0xfffffc87, wtcon=3D0001ff39 [ 0.330319] s3c2410-wdt 10060000.watchdog_cl0: watchdog active, reset en= abled, irq disabled If the system has a 32-bit WTCNT, add QUIRK_HAS_32BIT_CNT to its quirk flag= s, and it will operate with a 32-bit counter. If not, it will operate with a 1= 6-bit counter like in the previous version. Signed-off-by: Sangwook Shin Reviewed-by: Sam Protsenko --- drivers/watchdog/s3c2410_wdt.c | 26 +++++++++++++++++++------- 1 file changed, 19 insertions(+), 7 deletions(-) diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c index 0a4c0ab2a3d6..673ab6768688 100644 --- a/drivers/watchdog/s3c2410_wdt.c +++ b/drivers/watchdog/s3c2410_wdt.c @@ -34,7 +34,8 @@ #define S3C2410_WTCNT 0x08 #define S3C2410_WTCLRINT 0x0c =20 -#define S3C2410_WTCNT_MAXCNT 0xffff +#define S3C2410_WTCNT_MAXCNT_16 0xffff +#define S3C2410_WTCNT_MAXCNT_32 0xffffffff =20 #define S3C2410_WTCON_RSTEN BIT(0) #define S3C2410_WTCON_INTEN BIT(2) @@ -124,6 +125,10 @@ * %QUIRK_HAS_DBGACK_BIT: WTCON register has DBGACK_MASK bit. Setting the * DBGACK_MASK bit disables the watchdog outputs when the SoC is in debug = mode. * Debug mode is determined by the DBGACK CPU signal. + * + * %QUIRK_HAS_32BIT_CNT: WTDAT and WTCNT are 32-bit registers. With these + * 32-bit registers, larger values will be set, which means that larger ti= meouts + * value can be set. */ #define QUIRK_HAS_WTCLRINT_REG BIT(0) #define QUIRK_HAS_PMU_MASK_RESET BIT(1) @@ -131,6 +136,7 @@ #define QUIRK_HAS_PMU_AUTO_DISABLE BIT(3) #define QUIRK_HAS_PMU_CNT_EN BIT(4) #define QUIRK_HAS_DBGACK_BIT BIT(5) +#define QUIRK_HAS_32BIT_CNT BIT(6) =20 /* These quirks require that we have a PMU register map */ #define QUIRKS_HAVE_PMUREG \ @@ -199,6 +205,7 @@ struct s3c2410_wdt { struct notifier_block freq_transition; const struct s3c2410_wdt_variant *drv_data; struct regmap *pmureg; + u32 max_cnt; }; =20 static const struct s3c2410_wdt_variant drv_data_s3c2410 =3D { @@ -412,7 +419,7 @@ static inline unsigned int s3c2410wdt_max_timeout(struc= t s3c2410_wdt *wdt) { const unsigned long freq =3D s3c2410wdt_get_freq(wdt); //(S3C2410_WTCON_PRESCALE_MAX + 1) * S3C2410_WTCON_MAXDIV =3D 0x8000 - u64 t_max =3D div64_ul((u64)S3C2410_WTCNT_MAXCNT * 0x8000, freq); + u64 t_max =3D div64_ul((u64)wdt->max_cnt * 0x8000, freq); =20 if (t_max > UINT_MAX) t_max =3D UINT_MAX; @@ -571,7 +578,7 @@ static int s3c2410wdt_set_heartbeat(struct watchdog_dev= ice *wdd, { struct s3c2410_wdt *wdt =3D watchdog_get_drvdata(wdd); unsigned long freq =3D s3c2410wdt_get_freq(wdt); - unsigned int count; + unsigned long count; unsigned int divisor =3D 1; unsigned long wtcon; =20 @@ -581,7 +588,7 @@ static int s3c2410wdt_set_heartbeat(struct watchdog_dev= ice *wdd, freq =3D DIV_ROUND_UP(freq, 128); count =3D timeout * freq; =20 - dev_dbg(wdt->dev, "Heartbeat: count=3D%d, timeout=3D%d, freq=3D%lu\n", + dev_dbg(wdt->dev, "Heartbeat: count=3D%lu, timeout=3D%d, freq=3D%lu\n", count, timeout, freq); =20 /* if the count is bigger than the watchdog register, @@ -589,8 +596,8 @@ static int s3c2410wdt_set_heartbeat(struct watchdog_dev= ice *wdd, actually make this value */ =20 - if (count >=3D 0x10000) { - divisor =3D DIV_ROUND_UP(count, 0xffff); + if (count > wdt->max_cnt) { + divisor =3D DIV_ROUND_UP(count, wdt->max_cnt); =20 if (divisor > S3C2410_WTCON_PRESCALE_MAX + 1) { dev_err(wdt->dev, "timeout %d too big\n", timeout); @@ -598,7 +605,7 @@ static int s3c2410wdt_set_heartbeat(struct watchdog_dev= ice *wdd, } } =20 - dev_dbg(wdt->dev, "Heartbeat: timeout=3D%d, divisor=3D%d, count=3D%d (%08= x)\n", + dev_dbg(wdt->dev, "Heartbeat: timeout=3D%d, divisor=3D%d, count=3D%lu (%0= 8lx)\n", timeout, divisor, count, DIV_ROUND_UP(count, divisor)); =20 count =3D DIV_ROUND_UP(count, divisor); @@ -806,6 +813,11 @@ static int s3c2410wdt_probe(struct platform_device *pd= ev) if (IS_ERR(wdt->src_clk)) return dev_err_probe(dev, PTR_ERR(wdt->src_clk), "failed to get source c= lock\n"); =20 + if (wdt->drv_data->quirks & QUIRK_HAS_32BIT_CNT) + wdt->max_cnt =3D S3C2410_WTCNT_MAXCNT_32; + else + wdt->max_cnt =3D S3C2410_WTCNT_MAXCNT_16; + wdt->wdt_device.min_timeout =3D 1; wdt->wdt_device.max_timeout =3D s3c2410wdt_max_timeout(wdt); =20 --=20 2.25.1 From nobody Sun Oct 5 09:07:54 2025 Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9F709215F7C for ; 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Wed, 6 Aug 2025 07:00:31 +0000 (GMT) Received: from epcas2p3.samsung.com (unknown [182.195.36.100]) by epsnrtp03.localdomain (Postfix) with ESMTP id 4bxh5B5g2Bz3hhT7; Wed, 6 Aug 2025 07:00:30 +0000 (GMT) Received: from epsmtip2.samsung.com (unknown [182.195.34.31]) by epcas2p3.samsung.com (KnoxPortal) with ESMTPA id 20250806070030epcas2p3f2b0c36b6c492629e50e76be469b2db3~ZG2BCi5f80529905299epcas2p3a; Wed, 6 Aug 2025 07:00:30 +0000 (GMT) Received: from localhost.localdomain (unknown [10.229.9.126]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20250806070029epsmtip25dbf0c4b3bad33e05b0354e7716c4448~ZG2A82Z2n2095520955epsmtip2S; Wed, 6 Aug 2025 07:00:29 +0000 (GMT) From: Sangwook Shin To: krzk@kernel.org, alim.akhtar@samsung.com, wim@linux-watchdog.org, linux@roeck-us.net, semen.protsenko@linaro.org, dongil01.park@samsung.com, khwan.seo@samsung.com Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, Sangwook Shin Subject: [PATCH v5 4/5] watchdog: s3c2410_wdt: exynosautov920: Enable QUIRK_HAS_32BIT_CNT Date: Wed, 6 Aug 2025 15:55:13 +0900 Message-Id: <20250806065514.3688485-5-sw617.shin@samsung.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250806065514.3688485-1-sw617.shin@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250806070030epcas2p3f2b0c36b6c492629e50e76be469b2db3 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P cpgsPolicy: CPGSC10-234,N X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250806070030epcas2p3f2b0c36b6c492629e50e76be469b2db3 References: <20250806065514.3688485-1-sw617.shin@samsung.com> Enable QUIRK_HAS_32BIT_CNT to ExynosAutov920 SoC which has 32-bit WTCNT. Signed-off-by: Sangwook Shin Reviewed-by: Sam Protsenko --- drivers/watchdog/s3c2410_wdt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c index 673ab6768688..541870b4d01a 100644 --- a/drivers/watchdog/s3c2410_wdt.c +++ b/drivers/watchdog/s3c2410_wdt.c @@ -357,7 +357,7 @@ static const struct s3c2410_wdt_variant drv_data_exynos= autov920_cl0 =3D { .cnt_en_bit =3D 8, .quirks =3D QUIRK_HAS_WTCLRINT_REG | QUIRK_HAS_PMU_MASK_RESET | QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN | - QUIRK_HAS_DBGACK_BIT, + QUIRK_HAS_DBGACK_BIT | QUIRK_HAS_32BIT_CNT, }; =20 static const struct s3c2410_wdt_variant drv_data_exynosautov920_cl1 =3D { @@ -370,7 +370,7 @@ static const struct s3c2410_wdt_variant drv_data_exynos= autov920_cl1 =3D { .cnt_en_bit =3D 8, .quirks =3D QUIRK_HAS_WTCLRINT_REG | QUIRK_HAS_PMU_MASK_RESET | QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN | - QUIRK_HAS_DBGACK_BIT, + QUIRK_HAS_DBGACK_BIT | QUIRK_HAS_32BIT_CNT, }; =20 static const struct of_device_id s3c2410_wdt_match[] =3D { --=20 2.25.1 From nobody Sun Oct 5 09:07:54 2025 Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7D36C217654 for ; Wed, 6 Aug 2025 07:00:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=203.254.224.33 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754463636; cv=none; b=ORg0wxZD3VG/Y6/89RR28PtW5p4J159LBtrtYe0ckxCcwlsuZ405YAxAsEnpT2RkxKXB04DRxJ+A97VGdvKAEOOhrHCLOjzc0i5mTBvhza5wu8uzfLvyByXIo+H/REai/51hJDcMtUsuavsDa60LYijSXqBwALssdut6gi5VOBc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754463636; c=relaxed/simple; bh=H59zEFkgFttAf9nouPo8nKbeyZ/Sdm2Wafzx8hd7zMg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:MIME-Version: Content-Type:References; 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Wed, 6 Aug 2025 07:00:30 +0000 (GMT) From: Sangwook Shin To: krzk@kernel.org, alim.akhtar@samsung.com, wim@linux-watchdog.org, linux@roeck-us.net, semen.protsenko@linaro.org, dongil01.park@samsung.com, khwan.seo@samsung.com Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, Sangwook Shin Subject: [PATCH v5 5/5] watchdog: s3c2410_wdt: exynosautov9: Enable supported features Date: Wed, 6 Aug 2025 15:55:14 +0900 Message-Id: <20250806065514.3688485-6-sw617.shin@samsung.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250806065514.3688485-1-sw617.shin@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250806070030epcas2p4f9b779bd9fde57b4bfea958efdf62cf4 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P cpgsPolicy: CPGSC10-234,N X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250806070030epcas2p4f9b779bd9fde57b4bfea958efdf62cf4 References: <20250806065514.3688485-1-sw617.shin@samsung.com> Enable supported features for ExynosAutov9 SoC. - QUIRK_HAS_DBGACK_BIT - QUIRK_HAS_32BIT_CNT Signed-off-by: Sangwook Shin Reviewed-by: Sam Protsenko --- drivers/watchdog/s3c2410_wdt.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c index 541870b4d01a..f25563585983 100644 --- a/drivers/watchdog/s3c2410_wdt.c +++ b/drivers/watchdog/s3c2410_wdt.c @@ -306,7 +306,8 @@ static const struct s3c2410_wdt_variant drv_data_exynos= autov9_cl0 =3D { .cnt_en_reg =3D EXYNOS850_CLUSTER0_NONCPU_OUT, .cnt_en_bit =3D 7, .quirks =3D QUIRK_HAS_WTCLRINT_REG | QUIRK_HAS_PMU_MASK_RESET | - QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN, + QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN | + QUIRK_HAS_DBGACK_BIT | QUIRK_HAS_32BIT_CNT, }; =20 static const struct s3c2410_wdt_variant drv_data_exynosautov9_cl1 =3D { @@ -318,7 +319,8 @@ static const struct s3c2410_wdt_variant drv_data_exynos= autov9_cl1 =3D { .cnt_en_reg =3D EXYNOSAUTOV9_CLUSTER1_NONCPU_OUT, .cnt_en_bit =3D 7, .quirks =3D QUIRK_HAS_WTCLRINT_REG | QUIRK_HAS_PMU_MASK_RESET | - QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN, + QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN | + QUIRK_HAS_DBGACK_BIT | QUIRK_HAS_32BIT_CNT, }; =20 static const struct s3c2410_wdt_variant drv_data_gs101_cl0 =3D { --=20 2.25.1