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[151.229.67.101]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b79c48a05bsm19153986f8f.69.2025.08.05.05.25.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Aug 2025 05:25:37 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yoshihiro Shimoda , Geert Uytterhoeven , Magnus Damm Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH 3/5] phy: renesas: rcar-gen3-usb2: Allow SoC-specific OBINT bits via phy_data Date: Tue, 5 Aug 2025 13:25:27 +0100 Message-ID: <20250805122529.2566580-4-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250805122529.2566580-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20250805122529.2566580-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Lad Prabhakar Update the PHY driver to support SoC-specific OBINT enable bits by introducing the `obint_enable_bits` field in the `rcar_gen3_phy_drv_data` structure. This allows each SoC to specify bits required. Signed-off-by: Lad Prabhakar --- drivers/phy/renesas/phy-rcar-gen3-usb2.c | 27 ++++++++++++------------ 1 file changed, 14 insertions(+), 13 deletions(-) diff --git a/drivers/phy/renesas/phy-rcar-gen3-usb2.c b/drivers/phy/renesas= /phy-rcar-gen3-usb2.c index cfa9667c7680..ea387941c6f7 100644 --- a/drivers/phy/renesas/phy-rcar-gen3-usb2.c +++ b/drivers/phy/renesas/phy-rcar-gen3-usb2.c @@ -71,8 +71,7 @@ /* OBINTSTA and OBINTEN */ #define USB2_OBINT_SESSVLDCHG BIT(12) #define USB2_OBINT_IDDIGCHG BIT(11) -#define USB2_OBINT_BITS (USB2_OBINT_SESSVLDCHG | \ - USB2_OBINT_IDDIGCHG) +#define USB2_OBINT_IDCHG_EN BIT(0) /* RZ/G2L specific */ =20 /* VBCTRL */ #define USB2_VBCTRL_OCCLREN BIT(16) @@ -93,7 +92,6 @@ #define USB2_ADPCTRL_DRVVBUS BIT(4) =20 /* RZ/G2L specific */ -#define USB2_OBINT_IDCHG_EN BIT(0) #define USB2_LINECTRL1_USB2_IDMON BIT(0) =20 #define NUM_OF_PHYS 4 @@ -130,7 +128,6 @@ struct rcar_gen3_chan { struct work_struct work; spinlock_t lock; /* protects access to hardware and driver data structure= . */ enum usb_dr_mode dr_mode; - u32 obint_enable_bits; bool extcon_host; bool is_otg_channel; bool uses_otg_pins; @@ -141,6 +138,7 @@ struct rcar_gen3_phy_drv_data { bool no_adp_ctrl; bool init_bus; bool utmi_ctrl; + u32 obint_enable_bits; }; =20 /* @@ -225,9 +223,9 @@ static void rcar_gen3_control_otg_irq(struct rcar_gen3_= chan *ch, int enable) u32 val =3D readl(usb2_base + USB2_OBINTEN); =20 if (ch->uses_otg_pins && enable) - val |=3D ch->obint_enable_bits; + val |=3D ch->drvdata->obint_enable_bits; else - val &=3D ~ch->obint_enable_bits; + val &=3D ~ch->drvdata->obint_enable_bits; writel(val, usb2_base + USB2_OBINTEN); } =20 @@ -430,7 +428,7 @@ static void rcar_gen3_init_otg(struct rcar_gen3_chan *c= h) mdelay(20); =20 writel(0xffffffff, usb2_base + USB2_OBINTSTA); - writel(ch->obint_enable_bits, usb2_base + USB2_OBINTEN); + writel(ch->drvdata->obint_enable_bits, usb2_base + USB2_OBINTEN); =20 rcar_gen3_device_recognition(ch); } @@ -450,9 +448,9 @@ static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void= *_ch) =20 scoped_guard(spinlock, &ch->lock) { status =3D readl(usb2_base + USB2_OBINTSTA); - if (status & ch->obint_enable_bits) { + if (status & ch->drvdata->obint_enable_bits) { dev_vdbg(dev, "%s: %08x\n", __func__, status); - writel(ch->obint_enable_bits, usb2_base + USB2_OBINTSTA); + writel(ch->drvdata->obint_enable_bits, usb2_base + USB2_OBINTSTA); rcar_gen3_device_recognition(ch); ret =3D IRQ_HANDLED; } @@ -591,28 +589,35 @@ static const struct phy_ops rz_g1c_phy_usb2_ops =3D { static const struct rcar_gen3_phy_drv_data rcar_gen3_phy_usb2_data =3D { .phy_usb2_ops =3D &rcar_gen3_phy_usb2_ops, .no_adp_ctrl =3D false, + .obint_enable_bits =3D USB2_OBINT_SESSVLDCHG | + USB2_OBINT_IDDIGCHG, }; =20 static const struct rcar_gen3_phy_drv_data rz_g1c_phy_usb2_data =3D { .phy_usb2_ops =3D &rz_g1c_phy_usb2_ops, .no_adp_ctrl =3D false, + .obint_enable_bits =3D USB2_OBINT_SESSVLDCHG | + USB2_OBINT_IDDIGCHG, }; =20 static const struct rcar_gen3_phy_drv_data rz_g2l_phy_usb2_data =3D { .phy_usb2_ops =3D &rcar_gen3_phy_usb2_ops, .no_adp_ctrl =3D true, + .obint_enable_bits =3D USB2_OBINT_IDCHG_EN, }; =20 static const struct rcar_gen3_phy_drv_data rz_g3s_phy_usb2_data =3D { .phy_usb2_ops =3D &rcar_gen3_phy_usb2_ops, .no_adp_ctrl =3D true, .init_bus =3D true, + .obint_enable_bits =3D USB2_OBINT_IDCHG_EN, }; =20 static const struct rcar_gen3_phy_drv_data rz_v2h_phy_usb2_data =3D { .phy_usb2_ops =3D &rcar_gen3_phy_usb2_ops, .no_adp_ctrl =3D true, .utmi_ctrl =3D true, + .obint_enable_bits =3D USB2_OBINT_IDCHG_EN, }; =20 static const struct of_device_id rcar_gen3_phy_usb2_match_table[] =3D { @@ -748,7 +753,6 @@ static int rcar_gen3_phy_usb2_probe(struct platform_dev= ice *pdev) if (IS_ERR(channel->base)) return PTR_ERR(channel->base); =20 - channel->obint_enable_bits =3D USB2_OBINT_BITS; channel->dr_mode =3D rcar_gen3_get_dr_mode(dev->of_node); if (channel->dr_mode !=3D USB_DR_MODE_UNKNOWN) { channel->is_otg_channel =3D true; @@ -788,9 +792,6 @@ static int rcar_gen3_phy_usb2_probe(struct platform_dev= ice *pdev) goto error; } =20 - if (phy_data->no_adp_ctrl) - channel->obint_enable_bits =3D USB2_OBINT_IDCHG_EN; - spin_lock_init(&channel->lock); for (i =3D 0; i < NUM_OF_PHYS; i++) { channel->rphys[i].phy =3D devm_phy_create(dev, NULL, --=20 2.50.1