From nobody Sun Oct 5 12:52:23 2025 Received: from lelvem-ot01.ext.ti.com (lelvem-ot01.ext.ti.com [198.47.23.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A89D620487E; Mon, 4 Aug 2025 18:01:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754330490; cv=none; b=S0eDpk7zwU8Xh0cn46qEsEEymnavxlBRqzx3a+pzlBvpCsuEE9EiFl+3UdXP6kcmDpQk8kg9T87KP40EVG3NZF13pN2L7Q1Y8oxLAO8eXeJS2OUwrypvcsJVuA7r7cN8SwK2G7MX11djBuJWPcxc0z1+0HLfWvfiVIFl0k+6sDI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754330490; c=relaxed/simple; bh=IGNY9Kt84YUjsnSscs5E+UAonICkwkmmpBHuKQ/exKE=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=OAcv9Bf/IWavCVom2TxygpEtfdwp5vrGix914ba025p+bqZi16CBjeLUJeFb6mheSbJ0nTPjFMeyx7lTFvM5ae8XhSeKoKYtSy+9SAYehTcJCHqVLvPVjsIuN+6bH2awQtG7Jct2PsjZDXHNjqQBzlHI19uVwSRKjzfinZqYszI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=Sp8Nh5z+; arc=none smtp.client-ip=198.47.23.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="Sp8Nh5z+" Received: from lelvem-sh02.itg.ti.com ([10.180.78.226]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTP id 574I1G483898163; Mon, 4 Aug 2025 13:01:16 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1754330476; bh=5wTAMFKayqLsd0iSt+JhcYZiEaGhndqDGSrLqbFalIE=; h=From:To:CC:Subject:Date; b=Sp8Nh5z+oxrxxEwMpGcD4K19WN1yTeGmFNOEmoC5B3GkX1FOXG5oRM6lHmv1Ev7ph J2cilWPfa28Pd5/+UpgjuVr+pJvxO63IzOLfhyTCA4m5oBLGfb1yrAiEOqDoSWJdyF UNPo7Ug3LdBy76AT6tGo1XYaRMOEYOXlsUpwwyOY= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by lelvem-sh02.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 574I1GKO3008401 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Mon, 4 Aug 2025 13:01:16 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Mon, 4 Aug 2025 13:01:16 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Mon, 4 Aug 2025 13:01:15 -0500 Received: from udba0500997.dhcp.ti.com (udba0500997.dhcp.ti.com [128.247.81.190]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 574I1Fp4533532; Mon, 4 Aug 2025 13:01:15 -0500 From: Brandon Brnich To: CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , Devarsh Thakkar , Udit Kumar , Darren Etheridge , Brandon Brnich Subject: [PATCH v2] arm64: dts: ti: k3-j722s-main: Add E5010 JPEG Encoder Date: Mon, 4 Aug 2025 13:01:06 -0500 Message-ID: <20250804180106.2393256-1-b-brnich@ti.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" This adds node for E5010 JPEG Encoder which is a stateful JPEG Encoder present in J722s SoC, supporting baseline encoding of semiplanar based YUV420 and YUV422 raw video formats to JPEG encoding, with resolutions supported from 64x64 to 8kx8k. Signed-off-by: Brandon Brnich --- Changes in v2: - remove invalid clock-names attribute arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-j722s-main.dtsi index 5cfa7bf36641..fb24c14614b4 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi @@ -385,6 +385,16 @@ c7x_1: dsp@7e200000 { ti,sci-proc-ids =3D <0x31 0xff>; status =3D "disabled"; }; + + e5010: e5010@fd20000 { + compatible =3D "img,e5010-jpeg-enc"; + reg =3D <0x00 0xfd20000 0x00 0x100>, + <0x00 0xfd20200 0x00 0x200>; + reg-names =3D "core","mmu"; + clocks =3D <&k3_clks 201 0>; + power-domains =3D <&k3_pds 201 TI_SCI_PD_EXCLUSIVE>; + interrupts =3D ; + }; }; =20 &main_bcdma_csi { --=20 2.34.1