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[130.180.211.218]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b79c4530b3sm16335579f8f.34.2025.08.04.08.24.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Aug 2025 08:24:08 -0700 (PDT) From: Daniel Lezcano To: daniel.lezcano@linaro.org, tglx@linutronix.de Cc: S32@nxp.com, linux-kernel@vger.kernel.org, ghennadi.procopciuc@oss.nxp.com Subject: [PATCH v3 15/20] clocksource/drivers/vf-pit: Encapsulate set counter function Date: Mon, 4 Aug 2025 17:23:33 +0200 Message-ID: <20250804152344.1109310-16-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250804152344.1109310-1-daniel.lezcano@linaro.org> References: <20250804152344.1109310-1-daniel.lezcano@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Encapsulate the writel() calls to set the counter into a self-explainatory function. Signed-off-by: Daniel Lezcano --- drivers/clocksource/timer-vf-pit.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/clocksource/timer-vf-pit.c b/drivers/clocksource/timer= -vf-pit.c index 609a4d9deb64..5551b61483f8 100644 --- a/drivers/clocksource/timer-vf-pit.c +++ b/drivers/clocksource/timer-vf-pit.c @@ -74,6 +74,11 @@ static inline void pit_timer_disable(struct pit_timer *p= it) writel(0, PITTCTRL(pit->clkevt_base)); } =20 +static inline void pit_timer_set_counter(void __iomem *base, unsigned int = cnt) +{ + writel(cnt, PITLDVAL(base)); +} + static inline void pit_clocksource_enable(struct pit_timer *pit) { writel(PITTCTRL_TEN, PITTCTRL(pit->clksrc_base)); @@ -118,7 +123,7 @@ static int __init pit_clocksource_init(struct pit_timer= *pit, const char *name, =20 /* set the max load value and start the clock source counter */ pit_clocksource_disable(pit); - writel(~0, PITLDVAL(pit->clksrc_base)); + pit_timer_set_counter(pit->clksrc_base, ~0); pit_clocksource_enable(pit); =20 sched_clock_base =3D pit->clksrc_base + PITCVAL_OFFSET; @@ -139,7 +144,7 @@ static int pit_set_next_event(unsigned long delta, stru= ct clock_event_device *ce * hardware requirement. */ pit_timer_disable(pit); - writel(delta - 1, PITLDVAL(pit->clkevt_base)); + pit_timer_set_counter(pit->clkevt_base, delta - 1); pit_timer_enable(pit); =20 return 0; --=20 2.43.0