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[130.180.211.218]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b79c4530b3sm16335579f8f.34.2025.08.04.08.24.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Aug 2025 08:24:04 -0700 (PDT) From: Daniel Lezcano To: daniel.lezcano@linaro.org, tglx@linutronix.de Cc: S32@nxp.com, linux-kernel@vger.kernel.org, ghennadi.procopciuc@oss.nxp.com Subject: [PATCH v3 12/20] clocksource/drivers/vf-pit: Use the node name for the interrupt and timer names Date: Mon, 4 Aug 2025 17:23:30 +0200 Message-ID: <20250804152344.1109310-13-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250804152344.1109310-1-daniel.lezcano@linaro.org> References: <20250804152344.1109310-1-daniel.lezcano@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In order to differentiate from userspace the pit timer given the device tree, let's use the node name for the interrupt and the timer names. Signed-off-by: Daniel Lezcano --- drivers/clocksource/timer-vf-pit.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/clocksource/timer-vf-pit.c b/drivers/clocksource/timer= -vf-pit.c index 4f1b85ba5de3..2a255b45561d 100644 --- a/drivers/clocksource/timer-vf-pit.c +++ b/drivers/clocksource/timer-vf-pit.c @@ -79,8 +79,8 @@ static u64 pit_timer_clocksource_read(struct clocksource = *cs) return (u64)~readl(PITCVAL(pit->clksrc_base)); } =20 -static int __init pit_clocksource_init(struct pit_timer *pit, void __iomem= *base, - unsigned long rate) +static int __init pit_clocksource_init(struct pit_timer *pit, const char *= name, + void __iomem *base, unsigned long rate) { /* * The channels 0 and 1 can be chained to build a 64-bit @@ -88,7 +88,7 @@ static int __init pit_clocksource_init(struct pit_timer *= pit, void __iomem *base * the channels 0 and 1 unused for anyone else who needs them */ pit->clksrc_base =3D base + PIT_CH(2); - pit->cs.name =3D "vf-pit"; + pit->cs.name =3D name; pit->cs.rating =3D 300; pit->cs.read =3D pit_timer_clocksource_read; pit->cs.mask =3D CLOCKSOURCE_MASK(32); @@ -162,8 +162,9 @@ static irqreturn_t pit_timer_interrupt(int irq, void *d= ev_id) return IRQ_HANDLED; } =20 -static int __init pit_clockevent_init(struct pit_timer *pit, void __iomem = *base, - unsigned long rate, int irq, unsigned int cpu) +static int __init pit_clockevent_init(struct pit_timer *pit, const char *n= ame, + void __iomem *base, unsigned long rate, + int irq, unsigned int cpu) { /* * The channels 0 and 1 can be chained to build a 64-bit @@ -178,12 +179,12 @@ static int __init pit_clockevent_init(struct pit_time= r *pit, void __iomem *base, pit_irq_acknowledge(pit); =20 BUG_ON(request_irq(irq, pit_timer_interrupt, IRQF_TIMER | IRQF_IRQPOLL, - "VF pit timer", &pit->ced)); + name, &pit->ced)); =20 pit->ced.cpumask =3D cpumask_of(cpu); pit->ced.irq =3D irq; =20 - pit->ced.name =3D "VF pit timer"; + pit->ced.name =3D name; pit->ced.features =3D CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; pit->ced.set_state_shutdown =3D pit_shutdown; pit->ced.set_state_periodic =3D pit_set_periodic; @@ -208,6 +209,7 @@ static int __init pit_timer_init(struct device_node *np) struct pit_timer *pit; struct clk *pit_clk; void __iomem *timer_base; + const char *name =3D of_node_full_name(np); unsigned long clk_rate; int irq, ret; =20 @@ -244,11 +246,11 @@ static int __init pit_timer_init(struct device_node *= np) /* enable the pit module */ writel(~PITMCR_MDIS, timer_base + PITMCR); =20 - ret =3D pit_clocksource_init(pit, timer_base, clk_rate); + ret =3D pit_clocksource_init(pit, name, timer_base, clk_rate); if (ret) goto out_disable_unprepare; =20 - ret =3D pit_clockevent_init(pit, timer_base, clk_rate, irq, 0); + ret =3D pit_clockevent_init(pit, name, timer_base, clk_rate, irq, 0); if (ret) goto out_pit_clocksource_unregister; =20 --=20 2.43.0