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[130.180.211.218]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b79c4530b3sm16335579f8f.34.2025.08.04.08.24.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Aug 2025 08:24:03 -0700 (PDT) From: Daniel Lezcano To: daniel.lezcano@linaro.org, tglx@linutronix.de Cc: S32@nxp.com, linux-kernel@vger.kernel.org, ghennadi.procopciuc@oss.nxp.com Subject: [PATCH v3 11/20] clocksource/drivers/vf-pit: Encapsulate the PTLCVAL macro Date: Mon, 4 Aug 2025 17:23:29 +0200 Message-ID: <20250804152344.1109310-12-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250804152344.1109310-1-daniel.lezcano@linaro.org> References: <20250804152344.1109310-1-daniel.lezcano@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Pass the channel and the base address to the PITLCVAL macro so it is possible to use multiple instances of the timer with the macro. Signed-off-by: Daniel Lezcano --- drivers/clocksource/timer-vf-pit.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/clocksource/timer-vf-pit.c b/drivers/clocksource/timer= -vf-pit.c index c81c68b826a0..4f1b85ba5de3 100644 --- a/drivers/clocksource/timer-vf-pit.c +++ b/drivers/clocksource/timer-vf-pit.c @@ -17,13 +17,14 @@ #define PIT0_OFFSET 0x100 #define PIT_CH(n) (PIT0_OFFSET + 0x10 * (n)) =20 -#define PITCVAL 0x04 - #define PITMCR_MDIS BIT(1) =20 #define PITLDVAL(__base) (__base) #define PITTCTRL(__base) ((__base) + 0x08) =20 +#define PITCVAL_OFFSET 0x04 +#define PITCVAL(__base) ((__base) + 0x04) + #define PITTCTRL_TEN BIT(0) #define PITTCTRL_TIE BIT(1) =20 @@ -39,7 +40,7 @@ struct pit_timer { struct clocksource cs; }; =20 -static void __iomem *clksrc_base; +static void __iomem *sched_clock_base; =20 static inline struct pit_timer *ced_to_pit(struct clock_event_device *ced) { @@ -68,14 +69,14 @@ static inline void pit_irq_acknowledge(struct pit_timer= *pit) =20 static u64 notrace pit_read_sched_clock(void) { - return ~readl(clksrc_base + PITCVAL); + return ~readl(sched_clock_base); } =20 static u64 pit_timer_clocksource_read(struct clocksource *cs) { struct pit_timer *pit =3D cs_to_pit(cs); =20 - return (u64)~readl(pit->clksrc_base + PITCVAL); + return (u64)~readl(PITCVAL(pit->clksrc_base)); } =20 static int __init pit_clocksource_init(struct pit_timer *pit, void __iomem= *base, @@ -98,8 +99,7 @@ static int __init pit_clocksource_init(struct pit_timer *= pit, void __iomem *base writel(~0, PITLDVAL(pit->clksrc_base)); writel(PITTCTRL_TEN, PITTCTRL(pit->clksrc_base)); =20 - clksrc_base =3D pit->clksrc_base; - + sched_clock_base =3D pit->clksrc_base + PITCVAL_OFFSET; sched_clock_register(pit_read_sched_clock, 32, rate); =20 return clocksource_register_hz(&pit->cs, rate); --=20 2.43.0