From nobody Sun Oct 5 14:33:05 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B7B3326FA56; Mon, 4 Aug 2025 13:32:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754314367; cv=none; b=DoAq5GdkKoWZPuMR9FOsX/dppe5NMA8qMvNZsR7iJRLjh5YZF3JMh7eh/EFt0EN9/BLR6Koot1ahp0zRQL8YmDjuTKGSXcNShAcTJl5CnjfrDsptEajAGaZqu8UKbSCo7irXPe5C4SljlBbCFla53mq7vIPe0FVGn0NjaNWM4A4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754314367; c=relaxed/simple; bh=m/48SHb+sDgnCPz39BvxsQGwb3qepM8dH2EhkYdEQ/4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=C6gbGalcl13fIl52wiKL9o3Fo5ltlrzQe9fogMw+/nGYRZ09KSaHkfYrCRKlgEKMRb+RLlsjVet1Hko9R/iXHNJjsffF6u9ZHFbh6zN0vQxB3FYOHNNqHp4wzdPe+F8fXL+g3U2UzV4ZgmrNObU/5NhqaxmEckxQkU5gfNEPJdI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=qMyECc5n; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="qMyECc5n" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1754314363; bh=m/48SHb+sDgnCPz39BvxsQGwb3qepM8dH2EhkYdEQ/4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qMyECc5nfIKEzSfqerCeK5QCJS7dXE6GL6kHgX8mC2W6DgUqdsGLdwv6qpuZ2yiBE kJ5v3qCExt617uWGl8EycuhwYqg4hweUYIauJ4+8ZSOCqebiryxhjzck/TTlCR3QPt uPJ2C1OTuvuzMoW3hdRe6HLUt2w0TJFEYk2hUrtWHJHJaDBxG8vQmOYODXa5jLrcJX 66qxkwW3vyDv8K5cx9asMz/ih0p+PXJn6304nX2f0j4wcc4K3B8u2rEIEG1FRs1yZD tb5fWGVkxbTJbFZf9LMR/Ys43W9XGFI8AOzgAi2EaWbNb0AsPPk8qzg1oqXVgpIbVJ MtJeWFWsVdZKA== Received: from laura.lan (unknown [IPv6:2001:b07:646b:e2:865e:547d:4830:837d]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: laura.nao) by bali.collaboradmins.com (Postfix) with ESMTPSA id AABF517E0202; Mon, 4 Aug 2025 15:32:41 +0200 (CEST) From: Laura Nao To: srini@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, rafael@kernel.org, daniel.lezcano@linaro.org, rui.zhang@intel.com, lukasz.luba@arm.com, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com Cc: nfraprado@collabora.com, arnd@arndb.de, colin.i.king@gmail.com, u.kleine-koenig@baylibre.com, andrew-ct.chen@mediatek.com, lala.lin@mediatek.com, bchihi@baylibre.com, frank-w@public-files.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, Laura Nao , Fei Shao Subject: [PATCH v3 4/9] thermal: mediatek: lvts: Add platform ops to support alternative conversion logic Date: Mon, 4 Aug 2025 15:30:30 +0200 Message-Id: <20250804133035.309990-5-laura.nao@collabora.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250804133035.309990-1-laura.nao@collabora.com> References: <20250804133035.309990-1-laura.nao@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Introduce lvts_platform_ops struct to support SoC-specific versions of lvts_raw_to_temp() and lvts_temp_to_raw() conversion functions. This is in preparation for supporting SoCs like MT8196/MT6991, which require a different lvts_temp_to_raw() implementation. Reviewed-by: Fei Shao Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Laura Nao --- drivers/thermal/mediatek/lvts_thermal.c | 27 ++++++++++++++++++++++--- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/medi= atek/lvts_thermal.c index 8398af657ba2..47124d33ca2e 100644 --- a/drivers/thermal/mediatek/lvts_thermal.c +++ b/drivers/thermal/mediatek/lvts_thermal.c @@ -125,8 +125,14 @@ struct lvts_ctrl_data { continue; \ else =20 +struct lvts_platform_ops { + int (*lvts_raw_to_temp)(u32 raw_temp, int temp_factor); + u32 (*lvts_temp_to_raw)(int temperature, int temp_factor); +}; + struct lvts_data { const struct lvts_ctrl_data *lvts_ctrl; + const struct lvts_platform_ops *ops; const u32 *conn_cmd; const u32 *init_cmd; int num_cal_offsets; @@ -300,6 +306,7 @@ static int lvts_get_temp(struct thermal_zone_device *tz= , int *temp) struct lvts_ctrl *lvts_ctrl =3D container_of(lvts_sensor, struct lvts_ctr= l, sensors[lvts_sensor->id]); const struct lvts_data *lvts_data =3D lvts_ctrl->lvts_data; + const struct lvts_platform_ops *ops =3D lvts_data->ops; void __iomem *msr =3D lvts_sensor->msr; u32 value; int rc; @@ -332,7 +339,7 @@ static int lvts_get_temp(struct thermal_zone_device *tz= , int *temp) if (rc) return -EAGAIN; =20 - *temp =3D lvts_raw_to_temp(value & 0xFFFF, lvts_data->temp_factor); + *temp =3D ops->lvts_raw_to_temp(value & 0xFFFF, lvts_data->temp_factor); =20 return 0; } @@ -400,10 +407,11 @@ static int lvts_set_trips(struct thermal_zone_device = *tz, int low, int high) struct lvts_ctrl *lvts_ctrl =3D container_of(lvts_sensor, struct lvts_ctr= l, sensors[lvts_sensor->id]); const struct lvts_data *lvts_data =3D lvts_ctrl->lvts_data; + const struct lvts_platform_ops *ops =3D lvts_data->ops; void __iomem *base =3D lvts_sensor->base; - u32 raw_low =3D lvts_temp_to_raw(low !=3D -INT_MAX ? low : LVTS_MINIMUM_T= HRESHOLD, + u32 raw_low =3D ops->lvts_temp_to_raw(low !=3D -INT_MAX ? low : LVTS_MINI= MUM_THRESHOLD, lvts_data->temp_factor); - u32 raw_high =3D lvts_temp_to_raw(high, lvts_data->temp_factor); + u32 raw_high =3D ops->lvts_temp_to_raw(high, lvts_data->temp_factor); bool should_update_thresh; =20 lvts_sensor->low_thresh =3D low; @@ -1763,6 +1771,11 @@ static const struct lvts_ctrl_data mt8195_lvts_ap_da= ta_ctrl[] =3D { } }; =20 +static const struct lvts_platform_ops lvts_platform_ops_v1 =3D { + .lvts_raw_to_temp =3D lvts_raw_to_temp, + .lvts_temp_to_raw =3D lvts_temp_to_raw, +}; + static const struct lvts_data mt7988_lvts_ap_data =3D { .lvts_ctrl =3D mt7988_lvts_ap_data_ctrl, .conn_cmd =3D mt7988_conn_cmds, @@ -1774,6 +1787,7 @@ static const struct lvts_data mt7988_lvts_ap_data =3D= { .temp_offset =3D LVTS_COEFF_B_MT7988, .gt_calib_bit_offset =3D 24, .num_cal_offsets =3D 3, + .ops =3D &lvts_platform_ops_v1, }; =20 static const struct lvts_data mt8186_lvts_data =3D { @@ -1788,6 +1802,7 @@ static const struct lvts_data mt8186_lvts_data =3D { .gt_calib_bit_offset =3D 24, .def_calibration =3D 19000, .num_cal_offsets =3D 3, + .ops =3D &lvts_platform_ops_v1, }; =20 static const struct lvts_data mt8188_lvts_mcu_data =3D { @@ -1802,6 +1817,7 @@ static const struct lvts_data mt8188_lvts_mcu_data = =3D { .gt_calib_bit_offset =3D 20, .def_calibration =3D 35000, .num_cal_offsets =3D 3, + .ops =3D &lvts_platform_ops_v1, }; =20 static const struct lvts_data mt8188_lvts_ap_data =3D { @@ -1816,6 +1832,7 @@ static const struct lvts_data mt8188_lvts_ap_data =3D= { .gt_calib_bit_offset =3D 20, .def_calibration =3D 35000, .num_cal_offsets =3D 3, + .ops =3D &lvts_platform_ops_v1, }; =20 static const struct lvts_data mt8192_lvts_mcu_data =3D { @@ -1830,6 +1847,7 @@ static const struct lvts_data mt8192_lvts_mcu_data = =3D { .gt_calib_bit_offset =3D 24, .def_calibration =3D 35000, .num_cal_offsets =3D 3, + .ops =3D &lvts_platform_ops_v1, }; =20 static const struct lvts_data mt8192_lvts_ap_data =3D { @@ -1844,6 +1862,7 @@ static const struct lvts_data mt8192_lvts_ap_data =3D= { .gt_calib_bit_offset =3D 24, .def_calibration =3D 35000, .num_cal_offsets =3D 3, + .ops =3D &lvts_platform_ops_v1, }; =20 static const struct lvts_data mt8195_lvts_mcu_data =3D { @@ -1858,6 +1877,7 @@ static const struct lvts_data mt8195_lvts_mcu_data = =3D { .gt_calib_bit_offset =3D 24, .def_calibration =3D 35000, .num_cal_offsets =3D 3, + .ops =3D &lvts_platform_ops_v1, }; =20 static const struct lvts_data mt8195_lvts_ap_data =3D { @@ -1872,6 +1892,7 @@ static const struct lvts_data mt8195_lvts_ap_data =3D= { .gt_calib_bit_offset =3D 24, .def_calibration =3D 35000, .num_cal_offsets =3D 3, + .ops =3D &lvts_platform_ops_v1, }; =20 static const struct of_device_id lvts_of_match[] =3D { --=20 2.39.5