From nobody Sun Oct 5 14:33:06 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 74DD126B777; Mon, 4 Aug 2025 13:32:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754314363; cv=none; b=a0vu3/RCDWetWdyWyEHWZU3mVi5+9OsmvmCFNy4xIpnZJtUBn1jSAVHWZm3MSj45Mvi5mIThjwrguIk4B1lpVDEmMN7RW7busXckGY0OCKB+ZzGzX0CA/J4f6ocG4dpxpYegeN+D/Hva/k6F2CIG9zgxDuDeJWSxnIWmX/VqaUM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754314363; c=relaxed/simple; bh=sBFrFN/0Q4PTxo3EyInJXxrpUZe3NhXyKNGlvNQwUTE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=LUgCAZEdGLalojHrA2ErztksiPzid2PQxEEoe08gj7cJhR6476W7QcdD2Z1/9Qu4jeWdxSVXKnSratrmtV3YdINFaiCjgm8Y6z78woMKdTnNGoBzmHGTgBdWnn/QTLWJV647HNc/kta7TV6kJe1a6AUtA1zdI9mBhyvrmT/CHbg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=NdBQfrrv; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="NdBQfrrv" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1754314359; bh=sBFrFN/0Q4PTxo3EyInJXxrpUZe3NhXyKNGlvNQwUTE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NdBQfrrvAZ8haD6I6RQIdM9hNdbDv9108g4AZ5di1amYZzOBaI4H3jtllUrbCGOJW RnltuFnchdQQIu8UkEQ7oYgk1FwXXXXNgZCSr8ueqWN3atkBOXt0Bh06Q7OH01lvyB d7CVAYv/MbWfptjjbkzOBfpyAi7kcMwkDfUjjqk7zNxS6r8CBGK+0jFsjX2UIm07sR v4wFWCgJ5OC+/IW1dApNRjM63rV9JxNTluMImQPPewPBcbR7YwRY8Rb3fMD3JvCLKj jzZMzZscJRUn1ksNJjoxJJf0syj8SaGeipJdxxhEppj4/7hG7Q/QWCA59WTcVr6sDs fLWPSF/Bv8VaA== Received: from laura.lan (unknown [IPv6:2001:b07:646b:e2:865e:547d:4830:837d]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: laura.nao) by bali.collaboradmins.com (Postfix) with ESMTPSA id 5920F17E0662; Mon, 4 Aug 2025 15:32:38 +0200 (CEST) From: Laura Nao To: srini@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, rafael@kernel.org, daniel.lezcano@linaro.org, rui.zhang@intel.com, lukasz.luba@arm.com, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com Cc: nfraprado@collabora.com, arnd@arndb.de, colin.i.king@gmail.com, u.kleine-koenig@baylibre.com, andrew-ct.chen@mediatek.com, lala.lin@mediatek.com, bchihi@baylibre.com, frank-w@public-files.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, Laura Nao , Fei Shao Subject: [PATCH v3 2/9] thermal/drivers/mediatek/lvts: Make number of calibration offsets configurable Date: Mon, 4 Aug 2025 15:30:28 +0200 Message-Id: <20250804133035.309990-3-laura.nao@collabora.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250804133035.309990-1-laura.nao@collabora.com> References: <20250804133035.309990-1-laura.nao@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" MT8196/MT6991 use 2-byte eFuse calibration data, whereas other SoCs supported by the driver rely on 3 bytes. Make the number of calibration bytes per sensor configurable, enabling support for SoCs with varying calibration formats. Reviewed-by: Fei Shao Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Laura Nao --- drivers/thermal/mediatek/lvts_thermal.c | 32 +++++++++++++++++-------- 1 file changed, 22 insertions(+), 10 deletions(-) diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/medi= atek/lvts_thermal.c index f4d1e66d7db9..05aa8895ccce 100644 --- a/drivers/thermal/mediatek/lvts_thermal.c +++ b/drivers/thermal/mediatek/lvts_thermal.c @@ -96,12 +96,14 @@ =20 #define LVTS_MINIMUM_THRESHOLD 20000 =20 +#define LVTS_MAX_CAL_OFFSETS 3 + static int golden_temp =3D LVTS_GOLDEN_TEMP_DEFAULT; static int golden_temp_offset; =20 struct lvts_sensor_data { int dt_id; - u8 cal_offsets[3]; + u8 cal_offsets[LVTS_MAX_CAL_OFFSETS]; }; =20 struct lvts_ctrl_data { @@ -127,6 +129,7 @@ struct lvts_data { const struct lvts_ctrl_data *lvts_ctrl; const u32 *conn_cmd; const u32 *init_cmd; + int num_cal_offsets; int num_lvts_ctrl; int num_conn_cmd; int num_init_cmd; @@ -711,7 +714,7 @@ static int lvts_calibration_init(struct device *dev, st= ruct lvts_ctrl *lvts_ctrl u8 *efuse_calibration, size_t calib_len) { - int i; + int i, j; u32 gt; =20 /* A zero value for gt means that device has invalid efuse data */ @@ -720,17 +723,18 @@ static int lvts_calibration_init(struct device *dev, = struct lvts_ctrl *lvts_ctrl lvts_for_each_valid_sensor(i, lvts_ctrl_data) { const struct lvts_sensor_data *sensor =3D &lvts_ctrl_data->lvts_sensor[i]; + u32 calib =3D 0; =20 - if (sensor->cal_offsets[0] >=3D calib_len || - sensor->cal_offsets[1] >=3D calib_len || - sensor->cal_offsets[2] >=3D calib_len) - return -EINVAL; + for (j =3D 0; j < lvts_ctrl->lvts_data->num_cal_offsets; j++) { + u8 offset =3D sensor->cal_offsets[j]; + + if (offset >=3D calib_len) + return -EINVAL; + calib |=3D efuse_calibration[offset] << (8 * j); + } =20 if (gt) { - lvts_ctrl->calibration[i] =3D - (efuse_calibration[sensor->cal_offsets[0]] << 0) + - (efuse_calibration[sensor->cal_offsets[1]] << 8) + - (efuse_calibration[sensor->cal_offsets[2]] << 16); + lvts_ctrl->calibration[i] =3D calib; } else if (lvts_ctrl->lvts_data->def_calibration) { lvts_ctrl->calibration[i] =3D lvts_ctrl->lvts_data->def_calibration; } else { @@ -1763,6 +1767,7 @@ static const struct lvts_data mt7988_lvts_ap_data =3D= { .temp_factor =3D LVTS_COEFF_A_MT7988, .temp_offset =3D LVTS_COEFF_B_MT7988, .gt_calib_bit_offset =3D 24, + .num_cal_offsets =3D 3, }; =20 static const struct lvts_data mt8186_lvts_data =3D { @@ -1776,6 +1781,7 @@ static const struct lvts_data mt8186_lvts_data =3D { .temp_offset =3D LVTS_COEFF_B_MT7988, .gt_calib_bit_offset =3D 24, .def_calibration =3D 19000, + .num_cal_offsets =3D 3, }; =20 static const struct lvts_data mt8188_lvts_mcu_data =3D { @@ -1789,6 +1795,7 @@ static const struct lvts_data mt8188_lvts_mcu_data = =3D { .temp_offset =3D LVTS_COEFF_B_MT8195, .gt_calib_bit_offset =3D 20, .def_calibration =3D 35000, + .num_cal_offsets =3D 3, }; =20 static const struct lvts_data mt8188_lvts_ap_data =3D { @@ -1802,6 +1809,7 @@ static const struct lvts_data mt8188_lvts_ap_data =3D= { .temp_offset =3D LVTS_COEFF_B_MT8195, .gt_calib_bit_offset =3D 20, .def_calibration =3D 35000, + .num_cal_offsets =3D 3, }; =20 static const struct lvts_data mt8192_lvts_mcu_data =3D { @@ -1815,6 +1823,7 @@ static const struct lvts_data mt8192_lvts_mcu_data = =3D { .temp_offset =3D LVTS_COEFF_B_MT8195, .gt_calib_bit_offset =3D 24, .def_calibration =3D 35000, + .num_cal_offsets =3D 3, }; =20 static const struct lvts_data mt8192_lvts_ap_data =3D { @@ -1828,6 +1837,7 @@ static const struct lvts_data mt8192_lvts_ap_data =3D= { .temp_offset =3D LVTS_COEFF_B_MT8195, .gt_calib_bit_offset =3D 24, .def_calibration =3D 35000, + .num_cal_offsets =3D 3, }; =20 static const struct lvts_data mt8195_lvts_mcu_data =3D { @@ -1841,6 +1851,7 @@ static const struct lvts_data mt8195_lvts_mcu_data = =3D { .temp_offset =3D LVTS_COEFF_B_MT8195, .gt_calib_bit_offset =3D 24, .def_calibration =3D 35000, + .num_cal_offsets =3D 3, }; =20 static const struct lvts_data mt8195_lvts_ap_data =3D { @@ -1854,6 +1865,7 @@ static const struct lvts_data mt8195_lvts_ap_data =3D= { .temp_offset =3D LVTS_COEFF_B_MT8195, .gt_calib_bit_offset =3D 24, .def_calibration =3D 35000, + .num_cal_offsets =3D 3, }; =20 static const struct of_device_id lvts_of_match[] =3D { --=20 2.39.5