From nobody Sun Oct 5 12:52:21 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 6DAB7254873; Mon, 4 Aug 2025 12:17:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309855; cv=none; b=ujq1REH+CIbqLoDX+77jumeF/ab1IaSC1S19VPqDlT713mBsme7csecQVLI63rN5GtxVj0aFTcTKqN0159rO9Xv4NTZxCAXrY715U/5Q8Xcv1RDVAEVy9ij6SgoX1lWUgxRgvnsLCBr2ND2KTtstPfGohelMVRDCZmjVjMxTUTc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309855; c=relaxed/simple; bh=vFmn6pAZaTv+3d/5Db+uWeo66kMJH8vLhtdgclnxEMg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=G1WXVbygjU8ivLoG3BzFIoZDOtWo5UliufRNVYPdAOsMZTDJqQrPtmLg3Ndtu+m5EJc/USohT55IJ+KILDOgvkQI4WuLETpTmI4igcBCdvePc5t2WFVX0E80TXc/4tjfbRgrYd+nGt55NR57e0+tpx6qc1FAh5Y+pYF+FXDzQrY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id ED2D51E32; Mon, 4 Aug 2025 05:17:25 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 4E33A3F738; Mon, 4 Aug 2025 05:17:30 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, broonie@kernel.org, oliver.upton@linux.dev, anshuman.khandual@arm.com, robh@kernel.org, james.morse@arm.com, mark.rutland@arm.com, joey.gouly@arm.com, ry111@xry111.site, Dave.Martin@arm.com, ahmed.genidi@arm.com, kevin.brodsky@arm.com, scott@os.amperecomputing.com, mbenes@suse.cz, james.clark@linaro.org, frederic@kernel.org, rafael@kernel.org, pavel@kernel.org, ryan.roberts@arm.com, suzuki.poulose@arm.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, kvmarm@lists.linux.dev, Yeoreum Yun Subject: [PATCH 01/11] arm64/sysreg: add system registers SCTLR2_EL2 Date: Mon, 4 Aug 2025 13:17:14 +0100 Message-Id: <20250804121724.3681531-2-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250804121724.3681531-1-yeoreum.yun@arm.com> References: <20250804121724.3681531-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add definitions of SCTLR2_EL2. Signed-off-by: Yeoreum Yun Reviewed-by: Mark Brown --- arch/arm64/tools/sysreg | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 8a8cf6874298..ae655672a944 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -2469,6 +2469,23 @@ Sysreg SCTLR2ALIAS_EL1 3 0 1 4 7 Mapping SCTLR2_EL1 EndSysreg +Sysreg SCTLR2_EL2 3 4 1 0 3 +Res0 63:13 +Field 12 CPTM0 +Field 11 CPTM +Field 10 CPTA0 +Field 9 CPTA +Field 8 EnPACM0 +Field 7 EnPACM +Field 6 EnIDCP128 +Field 5 EASE +Field 4 EnANERR +Field 3 EnADERR +Field 2 NMEA +Field 1 EMEC +Res0 0 +EndSysreg + Sysreg SCTLR2MASK_EL1 3 0 1 4 3 Res0 63:13 Field 12 CPTM0 -- LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Sun Oct 5 12:52:21 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 95ED52594BE; Mon, 4 Aug 2025 12:17:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309860; cv=none; b=FVmaAHf7KaXPz4cYoGEtkRJMXbvHQoP184bOaXafjL1Hs5NFstUrMfRXjh2/BGQyS9mCMJFUKcB1+FmsVkZ0uHb+LC8ceD5X/rN0q6YmBlPJkyC1qE7ESSUYuZVLNbLyua5Gv3NumjdGpRJJR5JRp+j0YzDsGftua0UM9ue3Lu8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309860; c=relaxed/simple; bh=RDhCmAJ56pnkwk2maKHLLimX8rlQ3eOcOj6fRl6dtcs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=L2Gr7xL19YZPRTXAjIKbebX6W3kEM3LVvf+Mul42xPuf6WkVjUlrlvaGbyMguSZBws7ENzFr+aTnS0HONUgSawvTQd5yS6nI5EH7qERDKdPa4hrg/IBGngi6P+6BAMavDaiQcone6pfRvkE5r44Vn2pNGPOMr/PtpBy+T8j0RyQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E5435150C; Mon, 4 Aug 2025 05:17:29 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 470243F738; Mon, 4 Aug 2025 05:17:34 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, broonie@kernel.org, oliver.upton@linux.dev, anshuman.khandual@arm.com, robh@kernel.org, james.morse@arm.com, mark.rutland@arm.com, joey.gouly@arm.com, ry111@xry111.site, Dave.Martin@arm.com, ahmed.genidi@arm.com, kevin.brodsky@arm.com, scott@os.amperecomputing.com, mbenes@suse.cz, james.clark@linaro.org, frederic@kernel.org, rafael@kernel.org, pavel@kernel.org, ryan.roberts@arm.com, suzuki.poulose@arm.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, kvmarm@lists.linux.dev, Yeoreum Yun Subject: [PATCH 02/11] arm64: make SCTLR2_EL1 accessible Date: Mon, 4 Aug 2025 13:17:15 +0100 Message-Id: <20250804121724.3681531-3-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250804121724.3681531-1-yeoreum.yun@arm.com> References: <20250804121724.3681531-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" make SCTLR2_EL1 accssible to initilise it. Signed-off-by: Yeoreum Yun --- arch/arm64/include/asm/el2_setup.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el= 2_setup.h index 9f38340d24c2..33b59601e8c2 100644 --- a/arch/arm64/include/asm/el2_setup.h +++ b/arch/arm64/include/asm/el2_setup.h @@ -57,9 +57,15 @@ /* Enable GCS if supported */ mrs_s x1, SYS_ID_AA64PFR1_EL1 ubfx x1, x1, #ID_AA64PFR1_EL1_GCS_SHIFT, #4 - cbz x1, .Lset_hcrx_\@ + cbz x1, .Lskip_hcrx_GCSEn_\@ orr x0, x0, #HCRX_EL2_GCSEn +.Lskip_hcrx_GCSEn_\@: + mrs_s x1, SYS_ID_AA64MMFR3_EL1 + ubfx x1, x1, #ID_AA64MMFR3_EL1_SCTLRX_SHIFT, #4 + cbz x1, .Lset_hcrx_\@ + orr x0, x0, HCRX_EL2_SCTLR2En + .Lset_hcrx_\@: msr_s SYS_HCRX_EL2, x0 .Lskip_hcrx_\@: -- LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Sun Oct 5 12:52:21 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 7CAC8257AEC; Mon, 4 Aug 2025 12:17:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309864; cv=none; b=eDyHVVkcV/XsiLnRbW7w7P3k32qCZkxg3Bkj24OFVm697LgpuuEcD/Z3o2vA2DnLYt/P8/Bzu3R7wmoHC9WEshGKvq18N1k7b/jokFurMrR/jgD0Th+4OLPyZSJIg7dkaYBTWJdDCfkR9Iw5JPeDFf1C0gurGgmT8fOZfAeAfd4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309864; c=relaxed/simple; bh=1hMzSLYo9IFCtM3zF5sFOKBYMBB/eN/qmLuxaAv7CxA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=EuSrFZvj0xR1j4xrr/TASyPyBYbsgX0L769I8m2aWTL66FUvx0Hxhg6JpH4q72shyhTT1mSAoVfWfrmUz9fFAoJAnf0J0dLZ0xICgQYFMUXMsxt2nAyURNXZQNzBHDWleMW9vcSGEz9wtbhB50b0/GzRqH08aeRtRSGfi2Ig/w4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D11DE1E32; Mon, 4 Aug 2025 05:17:33 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 3F2D73F738; Mon, 4 Aug 2025 05:17:38 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, broonie@kernel.org, oliver.upton@linux.dev, anshuman.khandual@arm.com, robh@kernel.org, james.morse@arm.com, mark.rutland@arm.com, joey.gouly@arm.com, ry111@xry111.site, Dave.Martin@arm.com, ahmed.genidi@arm.com, kevin.brodsky@arm.com, scott@os.amperecomputing.com, mbenes@suse.cz, james.clark@linaro.org, frederic@kernel.org, rafael@kernel.org, pavel@kernel.org, ryan.roberts@arm.com, suzuki.poulose@arm.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, kvmarm@lists.linux.dev, Yeoreum Yun Subject: [PATCH 03/11] arm64: initialise SCTLR2_ELx register at boot time Date: Mon, 4 Aug 2025 13:17:16 +0100 Message-Id: <20250804121724.3681531-4-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250804121724.3681531-1-yeoreum.yun@arm.com> References: <20250804121724.3681531-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" add initialisation for SCTRL2_ELx register at boot time. Signed-off-by: Yeoreum Yun --- arch/arm64/include/asm/el2_setup.h | 6 ++++++ arch/arm64/include/asm/sysreg.h | 22 ++++++++++++++++++++++ arch/arm64/kernel/head.S | 5 ++++- 3 files changed, 32 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el= 2_setup.h index 33b59601e8c2..c519b6e923ad 100644 --- a/arch/arm64/include/asm/el2_setup.h +++ b/arch/arm64/include/asm/el2_setup.h @@ -48,6 +48,11 @@ isb .endm +.macro __init_el2_sctlr2 + init_sctlr2_elx 2, x0 + isb +.endm + .macro __init_el2_hcrx mrs x0, id_aa64mmfr1_el1 ubfx x0, x0, #ID_AA64MMFR1_EL1_HCX_SHIFT, #4 @@ -303,6 +308,7 @@ */ .macro init_el2_state __init_el2_sctlr + __init_el2_sctlr2 __init_el2_hcrx __init_el2_timers __init_el2_debug diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysre= g.h index f1bb0d10c39a..ee4c6033b0d2 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -868,6 +868,8 @@ #define INIT_SCTLR_EL2_MMU_OFF \ (SCTLR_EL2_RES1 | ENDIAN_SET_EL2) +#define INIT_SCTLR2_EL2 UL(0) + /* SCTLR_EL1 specific flags. */ #ifdef CONFIG_CPU_BIG_ENDIAN #define ENDIAN_SET_EL1 (SCTLR_EL1_E0E | SCTLR_ELx_EE) @@ -888,6 +890,8 @@ SCTLR_EL1_LSMAOE | SCTLR_EL1_nTLSMD | SCTLR_EL1_EIS | \ SCTLR_EL1_TSCXT | SCTLR_EL1_EOS) +#define INIT_SCTLR2_EL1 UL(0) + /* MAIR_ELx memory attributes (used by Linux) */ #define MAIR_ATTR_DEVICE_nGnRnE UL(0x00) #define MAIR_ATTR_DEVICE_nGnRE UL(0x04) @@ -1103,6 +1107,24 @@ msr hcr_el2, \reg #endif .endm + + .macro init_sctlr2_elx, el, tmp + mrs_s \tmp, SYS_ID_AA64MMFR3_EL1 + ubfx \tmp, \tmp, #ID_AA64MMFR3_EL1_SCTLRX_SHIFT, #4 + cbz \tmp, .Lskip_sctlr2_\@ + .if \el =3D=3D 2 + mov_q \tmp, INIT_SCTLR2_EL2 + msr_s SYS_SCTLR_EL2, \tmp + .else + mov_q \tmp, INIT_SCTLR2_EL1 + .if \el =3D=3D 12 + msr_s SYS_SCTLR_EL12, \tmp + .else + msr_s SYS_SCTLR_EL1, \tmp + .endif + .endif +.Lskip_sctlr2_\@: + .endm #else #include diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index ca04b338cb0d..0dff7593e50b 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -276,6 +276,7 @@ SYM_INNER_LABEL(init_el1, SYM_L_LOCAL) mov_q x0, INIT_SCTLR_EL1_MMU_OFF pre_disable_mmu_workaround msr sctlr_el1, x0 + init_sctlr2_elx 1, x0 isb mov_q x0, INIT_PSTATE_EL1 msr spsr_el1, x0 @@ -298,7 +299,6 @@ SYM_INNER_LABEL(init_el2, SYM_L_LOCAL) msr sctlr_el2, x0 isb 0: - init_el2_hcr HCR_HOST_NVHE_FLAGS init_el2_state @@ -315,12 +315,15 @@ SYM_INNER_LABEL(init_el2, SYM_L_LOCAL) /* Set a sane SCTLR_EL1, the VHE way */ msr_s SYS_SCTLR_EL12, x1 + init_sctlr2_elx 12, x2 mov x2, #BOOT_CPU_FLAG_E2H b 3f 2: msr sctlr_el1, x1 + init_sctlr2_elx 1, x2 mov x2, xzr + 3: mov x0, #INIT_PSTATE_EL1 msr spsr_el2, x0 -- LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Sun Oct 5 12:52:21 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5A94525A327; Mon, 4 Aug 2025 12:17:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309867; cv=none; b=nSFyby+El/a7EGdU/221QdoAxL48JzkKVA4GrUBIS7R03YnNL4PTwzmClEhRMp5j4sNQu5a03T5WimF9SnBAixni5f+HptEoCyox3xi1xWFha7aKCpgSXWLNmogLVTMaZXNXiP/PKLYyeCjNGSRIaJvBY8eVzaJ3ULqRjfa1F1g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309867; c=relaxed/simple; bh=Ju7yahbdDwfnsy1wf38WfilZ/oDBCruVYIHwba/TtPs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=XLpD8gyFppk8iChajA29oUZFqIBDiltvrEFkB2Tr4ByXtrBNXgP5OyFz8ev1tCQDqS56zIZMsx0ucMedPjJcsF3VXW0LXz57U1sFXwTW7PgiOcFKFCtCGbif6N+tvmD2NFz7GK8uxvSAAHEBYOI2+GGksXzUmAb1xoo06emLpmQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C0AFC150C; Mon, 4 Aug 2025 05:17:37 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 2E63A3F738; Mon, 4 Aug 2025 05:17:42 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, broonie@kernel.org, oliver.upton@linux.dev, anshuman.khandual@arm.com, robh@kernel.org, james.morse@arm.com, mark.rutland@arm.com, joey.gouly@arm.com, ry111@xry111.site, Dave.Martin@arm.com, ahmed.genidi@arm.com, kevin.brodsky@arm.com, scott@os.amperecomputing.com, mbenes@suse.cz, james.clark@linaro.org, frederic@kernel.org, rafael@kernel.org, pavel@kernel.org, ryan.roberts@arm.com, suzuki.poulose@arm.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, kvmarm@lists.linux.dev, Yeoreum Yun Subject: [PATCH 04/11] arm64: cpufeature: add FEAT_SCTLR2 feature Date: Mon, 4 Aug 2025 13:17:17 +0100 Message-Id: <20250804121724.3681531-5-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250804121724.3681531-1-yeoreum.yun@arm.com> References: <20250804121724.3681531-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Since Armv8.8 architecture FEAT_SCTLR2 is supported to provide extensions of top-level control system (i.e) FEAT_PAuth_LR, FEAT_CPA/CPA2, FEAT_MEC and etc. To use related system extensions in the future, add SCTLR2 feature. Signed-off-by: Yeoreum Yun --- arch/arm64/kernel/cpufeature.c | 8 ++++++++ arch/arm64/tools/cpucaps | 1 + 2 files changed, 9 insertions(+) diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index e151585c6cca..4aa83221a4a6 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -500,6 +500,7 @@ static const struct arm64_ftr_bits ftr_id_aa64mmfr3[] = =3D { ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_POE), FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR3_EL1_S1POE_SHIFT, 4, 0= ), ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR3_EL= 1_S1PIE_SHIFT, 4, 0), + ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR3_EL= 1_SCTLRX_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR3_EL= 1_TCRX_SHIFT, 4, 0), ARM64_FTR_END, }; @@ -3061,6 +3062,13 @@ static const struct arm64_cpu_capabilities arm64_fea= tures[] =3D { .matches =3D has_pmuv3, }, #endif + { + .desc =3D "Secondary System Control Register (SCTLR2)", + .capability =3D ARM64_HAS_SCTLR2, + .type =3D ARM64_CPUCAP_SYSTEM_FEATURE, + .matches =3D has_cpuid_feature, + ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, SCTLRX, IMP) + }, {}, }; diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps index 10effd4cff6b..a0184295c5d9 100644 --- a/arch/arm64/tools/cpucaps +++ b/arch/arm64/tools/cpucaps @@ -52,6 +52,7 @@ HAS_S1POE HAS_RAS_EXTN HAS_RNG HAS_SB +HAS_SCTLR2 HAS_STAGE2_FWB HAS_TCR2 HAS_TIDCP1 -- LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Sun Oct 5 12:52:21 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 479B025A327; Mon, 4 Aug 2025 12:17:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309872; cv=none; b=FMr2ANnymvFcAPRskzaDh0lSDWZhg31VAmwTYzXVV8hQDz0LrCqZlFiKH6x7WVoVn09cGE70xJV/c6M+YabyOhlkeulBKsPzewOvxJTeoLkTbSml1kkSB7ADwD6q/6u/p2yPSI/72jsQe96eh+yWQhjIPlGiwKzqqbEl38Fs3I0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309872; c=relaxed/simple; bh=xmfZApnsntEoaLgPzPJYg642IK5C3Z9fXC+LraI4cDI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=rJcBBdCAp7lRKW+BM3PfMpfuNLhRxi0KNLHlVVXpYSwjNmwiFmuoyQFqvLpuQKpJgVPmZc25rKJsehqHoGnoYQA6pjThuxuDuoYf9SNbPfNwtvsKCVzMfX0yrFNGImsHyI1edZCSQKrhN//otgCsizUUXT6O0lyqfhBp7M2FVrM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B31781C25; Mon, 4 Aug 2025 05:17:41 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 1DF073F738; Mon, 4 Aug 2025 05:17:45 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, broonie@kernel.org, oliver.upton@linux.dev, anshuman.khandual@arm.com, robh@kernel.org, james.morse@arm.com, mark.rutland@arm.com, joey.gouly@arm.com, ry111@xry111.site, Dave.Martin@arm.com, ahmed.genidi@arm.com, kevin.brodsky@arm.com, scott@os.amperecomputing.com, mbenes@suse.cz, james.clark@linaro.org, frederic@kernel.org, rafael@kernel.org, pavel@kernel.org, ryan.roberts@arm.com, suzuki.poulose@arm.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, kvmarm@lists.linux.dev, Yeoreum Yun Subject: [PATCH 05/11] arm64: save/restore SCTLR2_EL1 when cpu_suspend()/resume() Date: Mon, 4 Aug 2025 13:17:18 +0100 Message-Id: <20250804121724.3681531-6-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250804121724.3681531-1-yeoreum.yun@arm.com> References: <20250804121724.3681531-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" save/restore SCTLR2_EL1 when cpu_suspend()/resume(). Signed-off-by: Yeoreum Yun --- arch/arm64/include/asm/suspend.h | 2 +- arch/arm64/mm/proc.S | 26 ++++++++++++++++++-------- 2 files changed, 19 insertions(+), 9 deletions(-) diff --git a/arch/arm64/include/asm/suspend.h b/arch/arm64/include/asm/susp= end.h index 0cde2f473971..eb60c9735553 100644 --- a/arch/arm64/include/asm/suspend.h +++ b/arch/arm64/include/asm/suspend.h @@ -2,7 +2,7 @@ #ifndef __ASM_SUSPEND_H #define __ASM_SUSPEND_H -#define NR_CTX_REGS 13 +#define NR_CTX_REGS 14 #define NR_CALLEE_SAVED_REGS 12 /* diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S index 54dccfd6aa11..155d930b6d99 100644 --- a/arch/arm64/mm/proc.S +++ b/arch/arm64/mm/proc.S @@ -87,8 +87,14 @@ SYM_FUNC_START(cpu_do_suspend) mrs x9, mdscr_el1 mrs x10, oslsr_el1 mrs x11, sctlr_el1 - get_this_cpu_offset x12 - mrs x13, sp_el0 +alternative_if_not ARM64_HAS_SCTLR2 + mov x12, xzr +alternative_else + mrs_s x12, SYS_SCTLR2_EL1 +alternative_endif + get_this_cpu_offset x13 + mrs x14, sp_el0 + stp x2, x3, [x0] stp x4, x5, [x0, #16] stp x6, x7, [x0, #32] @@ -99,7 +105,7 @@ SYM_FUNC_START(cpu_do_suspend) * Save x18 as it may be used as a platform register, e.g. by shadow * call stack. */ - str x18, [x0, #96] + stp x14, x18, [x0, #96] ret SYM_FUNC_END(cpu_do_suspend) @@ -120,8 +126,8 @@ SYM_FUNC_START(cpu_do_resume) * the buffer to minimize the risk of exposure when used for shadow * call stack. */ - ldr x18, [x0, #96] - str xzr, [x0, #96] + ldp x15, x18, [x0, #96] + str xzr, [x0, #104] msr tpidr_el0, x2 msr tpidrro_el0, x3 msr contextidr_el1, x4 @@ -136,8 +142,12 @@ SYM_FUNC_START(cpu_do_resume) msr mdscr_el1, x10 msr sctlr_el1, x12 - set_this_cpu_offset x13 - msr sp_el0, x14 +alternative_if ARM64_HAS_SCTLR2 + msr_s SYS_SCTLR2_EL1, x13 +alternative_else_nop_endif + + set_this_cpu_offset x14 + msr sp_el0, x15 /* * Restore oslsr_el1 by writing oslar_el1 */ @@ -151,7 +161,7 @@ alternative_if ARM64_HAS_RAS_EXTN msr_s SYS_DISR_EL1, xzr alternative_else_nop_endif - ptrauth_keys_install_kernel_nosync x14, x1, x2, x3 + ptrauth_keys_install_kernel_nosync x15, x1, x2, x3 isb ret SYM_FUNC_END(cpu_do_resume) -- LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Sun Oct 5 12:52:21 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1D8B0258CDC; Mon, 4 Aug 2025 12:17:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309875; cv=none; b=rSH66aLC0OiRAM8J2n3uXiaesi9KwPW6Y2fXNgErVF/hd0V7CzUoQAs7+HhGF2yKL9KTjLAJA6Vqsnn+T/ihNdhmzlpEbfZSGGjtIXqsUTQpluEaYBBPlilaDQJU9LdsHKRH+OadyShtvKDiPy8OJ6f1ZjRRy+tLadnkfjzKahU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309875; c=relaxed/simple; bh=s9v3VM+08uNNQ+6rqA+ZSQyiAlpXneS/q99uSHleGzA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=lhbk5zHKv7sIugE+E15bjQif5uLkjLm8CrF8C1Urvi7ZJA+h6N0voI32ehl19spP+17pLRIB9cO3iSGVyDnyp2o6fSoMsemAKkAbGpg8EEqNa26G1N4EFcBA+Xv5fm8FmQWeVJBAGU/+kYMZnPl/+E6IHs3xslmuqyil68QuICc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A89D9150C; Mon, 4 Aug 2025 05:17:45 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 0D93D3F738; Mon, 4 Aug 2025 05:17:49 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, broonie@kernel.org, oliver.upton@linux.dev, anshuman.khandual@arm.com, robh@kernel.org, james.morse@arm.com, mark.rutland@arm.com, joey.gouly@arm.com, ry111@xry111.site, Dave.Martin@arm.com, ahmed.genidi@arm.com, kevin.brodsky@arm.com, scott@os.amperecomputing.com, mbenes@suse.cz, james.clark@linaro.org, frederic@kernel.org, rafael@kernel.org, pavel@kernel.org, ryan.roberts@arm.com, suzuki.poulose@arm.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, kvmarm@lists.linux.dev, Yeoreum Yun Subject: [PATCH 06/11] arm64: init SCTLR2_EL1 at cpu_soft_restart() Date: Mon, 4 Aug 2025 13:17:19 +0100 Message-Id: <20250804121724.3681531-7-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250804121724.3681531-1-yeoreum.yun@arm.com> References: <20250804121724.3681531-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Initailize SCTLR2_EL1 at cpu_soft_restart(). Signed-off-by: Yeoreum Yun --- arch/arm64/kernel/cpu-reset.S | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/kernel/cpu-reset.S b/arch/arm64/kernel/cpu-reset.S index c87445dde674..123564af345b 100644 --- a/arch/arm64/kernel/cpu-reset.S +++ b/arch/arm64/kernel/cpu-reset.S @@ -37,6 +37,12 @@ SYM_TYPED_FUNC_START(cpu_soft_restart) * regime if HCR_EL2.E2H =3D=3D 1 */ msr sctlr_el1, x12 + +alternative_if ARM64_HAS_SCTLR2 + mov_q x12, INIT_SCTLR2_EL1 + msr_s SYS_SCTLR2_EL1, x12 +alternative_else_nop_endif + isb cbz x0, 1f // el2_switch? -- LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Sun Oct 5 12:52:21 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 50D9C258CDC; Mon, 4 Aug 2025 12:17:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309879; cv=none; b=g759m93WTox7h/5dzo4WG4gtg9E2YuudxLvmN5cfzRKHzapSmuYbmKHhtdrlBB117X4tLD1D6jBACiZEtJmiOU3thr9XDg7EoQFJbxTtYetYL6DB+j/h3MEiJ9UNGfzp0A5Zkx/qrTGMHkTJqbeItltFyZwXeCI4iwmUbYRF+YY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309879; c=relaxed/simple; bh=6dzm+Zi+XjXp5mYLVu5J9JmYF9QrHLzEoJ97N/GyEkM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=SgrJT1VRAx73H3k5jtHvhFUCYm0AbC/3f7mStv4E8+vUWk8pnAooVF0I1DWWJ9NpThm/rV2+tPm0oIx9jzmZJQw6SCWhCcAq/wzgrIZ2YGTxE34hy66Jill71Mo/Fstn3iGzmG43jj0zjFUvqdZlZhGqKcV7/H1uxMSSHFfxl1M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9B5CF150C; Mon, 4 Aug 2025 05:17:49 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 057273F738; Mon, 4 Aug 2025 05:17:53 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, broonie@kernel.org, oliver.upton@linux.dev, anshuman.khandual@arm.com, robh@kernel.org, james.morse@arm.com, mark.rutland@arm.com, joey.gouly@arm.com, ry111@xry111.site, Dave.Martin@arm.com, ahmed.genidi@arm.com, kevin.brodsky@arm.com, scott@os.amperecomputing.com, mbenes@suse.cz, james.clark@linaro.org, frederic@kernel.org, rafael@kernel.org, pavel@kernel.org, ryan.roberts@arm.com, suzuki.poulose@arm.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, kvmarm@lists.linux.dev, Yeoreum Yun Subject: [PATCH 07/11] arm64: make the per-task SCTLR2_EL1 Date: Mon, 4 Aug 2025 13:17:20 +0100 Message-Id: <20250804121724.3681531-8-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250804121724.3681531-1-yeoreum.yun@arm.com> References: <20250804121724.3681531-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Some of field of SCTLR2 registers should be configurable per task not globally -- i.e) FEAT_CPA2 related field and etc. For future usage of these fields, make the per-task SCTLR2_EL1. Signed-off-by: Yeoreum Yun --- arch/arm64/include/asm/processor.h | 5 +++++ arch/arm64/kernel/process.c | 9 +++++++++ 2 files changed, 14 insertions(+) diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/pr= ocessor.h index 1bf1a3b16e88..7980161172f7 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -182,6 +182,7 @@ struct thread_struct { u64 mte_ctrl; #endif u64 sctlr_user; + u64 sctlr2_user; u64 svcr; u64 tpidr2_el0; u64 por_el0; @@ -256,6 +257,9 @@ static inline void task_set_sve_vl_onexec(struct task_s= truct *task, (SCTLR_ELx_ENIA | SCTLR_ELx_ENIB | SCTLR_ELx_ENDA | SCTLR_ELx_ENDB | \ SCTLR_EL1_TCF0_MASK) +#define SCTLR2_USER_MASK \ + (SCTLR2_EL1_EnPACM0 | SCTLR2_EL1_CPTA0 | SCTLR2_EL1_CPTM0) + static inline void arch_thread_struct_whitelist(unsigned long *offset, unsigned long *size) { @@ -368,6 +372,7 @@ struct task_struct; unsigned long __get_wchan(struct task_struct *p); void update_sctlr_el1(u64 sctlr); +void update_sctlr2_el1(u64 sctlr2); /* Thread switching */ extern struct task_struct *cpu_switch_to(struct task_struct *prev, diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index 08b7042a2e2d..e86325d07fa8 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -699,6 +699,11 @@ void update_sctlr_el1(u64 sctlr) isb(); } +void update_sctlr2_el1(u64 sctlr2) +{ + sysreg_clear_set(sctlr2_el1, SCTLR2_USER_MASK, sctlr2); +} + /* * Thread switching. */ @@ -738,6 +743,10 @@ struct task_struct *__switch_to(struct task_struct *pr= ev, if (prev->thread.sctlr_user !=3D next->thread.sctlr_user) update_sctlr_el1(next->thread.sctlr_user); + if (alternative_has_cap_unlikely(ARM64_HAS_SCTLR2) && + prev->thread.sctlr2_user !=3D next->thread.sctlr2_user) + update_sctlr2_el1(next->thread.sctlr2_user); + /* the actual thread switch */ last =3D cpu_switch_to(prev, next); -- LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Sun Oct 5 12:52:21 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 09D2B25DB0A; Mon, 4 Aug 2025 12:18:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309883; cv=none; b=LohGgnaP0BCR48MJb7S4NFznO8W1i80gJCOFLdDPxUVE5awdrLlToP92etS6PD6mgGZ0OTnQFMMiX6BHfZDCDyrmvfXkRdriDAvKEVWZaF+yHp/57lornpAGzjrb3VlIKLmZGuOw70L/QWDuY2Va5uBsHE7XFl2yAPhwqbCkDK0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309883; c=relaxed/simple; bh=yyHiKn3TTe/WLOZndQLfBtKivmH21ktYqHo2TtBhYCA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=j+klTX+fJCPighgdmhASTiFb+iyC+6t1c5EkStneTZyuszgl7UGlG+NbGZ6xftaa/WsgMidFnF3Camnt4VPVaH304H7gX1yHINvQojCVd6zYX+t2Gcr+1fu2LTrOdJ806nWzUbRXts72L+lwttusSb8I54ESMchsNaH11rZ0ORo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 91355150C; Mon, 4 Aug 2025 05:17:53 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E987D3F738; Mon, 4 Aug 2025 05:17:57 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, broonie@kernel.org, oliver.upton@linux.dev, anshuman.khandual@arm.com, robh@kernel.org, james.morse@arm.com, mark.rutland@arm.com, joey.gouly@arm.com, ry111@xry111.site, Dave.Martin@arm.com, ahmed.genidi@arm.com, kevin.brodsky@arm.com, scott@os.amperecomputing.com, mbenes@suse.cz, james.clark@linaro.org, frederic@kernel.org, rafael@kernel.org, pavel@kernel.org, ryan.roberts@arm.com, suzuki.poulose@arm.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, kvmarm@lists.linux.dev, Yeoreum Yun Subject: [PATCH 08/11] KVM: arm64: initialise SCTLR2_EL1 at __kvm_host_psci_cpu_entry() Date: Mon, 4 Aug 2025 13:17:21 +0100 Message-Id: <20250804121724.3681531-9-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250804121724.3681531-1-yeoreum.yun@arm.com> References: <20250804121724.3681531-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" initialise SCTLR2_EL1 at __kvm_host_psci_cpu_entry(). Signed-off-by: Yeoreum Yun --- arch/arm64/kvm/hyp/nvhe/psci-relay.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/kvm/hyp/nvhe/psci-relay.c b/arch/arm64/kvm/hyp/nvhe= /psci-relay.c index c3e196fb8b18..4ed4b7fa57c2 100644 --- a/arch/arm64/kvm/hyp/nvhe/psci-relay.c +++ b/arch/arm64/kvm/hyp/nvhe/psci-relay.c @@ -4,6 +4,7 @@ * Author: David Brazdil */ +#include #include #include #include @@ -219,6 +220,8 @@ asmlinkage void __noreturn __kvm_host_psci_cpu_entry(bo= ol is_cpu_on) release_boot_args(boot_args); write_sysreg_el1(INIT_SCTLR_EL1_MMU_OFF, SYS_SCTLR); + if (alternative_has_cap_unlikely(ARM64_HAS_SCTLR2)) + write_sysreg_el1(INIT_SCTLR2_EL1, SYS_SCTLR2); write_sysreg(INIT_PSTATE_EL1, SPSR_EL2); __host_enter(host_ctxt); -- LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Sun Oct 5 12:52:21 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 043412580D7; Mon, 4 Aug 2025 12:18:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309887; cv=none; b=k5WPN+XgJGgZ0topxFnI0ydfPVyJonoDLDu+WOrh5j/96eCRvpRgYN2evOio+B5LN8Uuy1zUXW/k1+6coGhsbKu9IVQOaNikWOTMyZF/DTFSaC6knzN8bcOhc66WsGeaMkBoewwCQm7LvBAkH8UctANVvzx3zsnXFTyD+519W8s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309887; c=relaxed/simple; bh=T8+5cPQjby9DphJUgYz99BLIwppZBx1SYLGNWbR12rY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=ZOpF6sVSgqpSvK+frIs8gq9YjPwiBf0giNKbHMOquoP2HFqpEJ7RLGpwA0sKOs2di4iewhYmArwGnLVM31U820zOaYRwa8gtCwVX7+ALcDwWb2qjKwgLni8rFW/ePU2JwjMFQCNsOi9iTcyx0iogBnd4hOcwPZUO+4s6oPBal0Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 83D111E32; Mon, 4 Aug 2025 05:17:57 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E27133F738; Mon, 4 Aug 2025 05:18:01 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, broonie@kernel.org, oliver.upton@linux.dev, anshuman.khandual@arm.com, robh@kernel.org, james.morse@arm.com, mark.rutland@arm.com, joey.gouly@arm.com, ry111@xry111.site, Dave.Martin@arm.com, ahmed.genidi@arm.com, kevin.brodsky@arm.com, scott@os.amperecomputing.com, mbenes@suse.cz, james.clark@linaro.org, frederic@kernel.org, rafael@kernel.org, pavel@kernel.org, ryan.roberts@arm.com, suzuki.poulose@arm.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, kvmarm@lists.linux.dev, Yeoreum Yun Subject: [PATCH 09/11] KVM: arm64: support SCTLR2_EL1 for guest Date: Mon, 4 Aug 2025 13:17:22 +0100 Message-Id: <20250804121724.3681531-10-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250804121724.3681531-1-yeoreum.yun@arm.com> References: <20250804121724.3681531-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" support SCTLR2_EL1 system register for guest. Signed-off-by: Yeoreum Yun --- arch/arm64/include/asm/kvm_host.h | 4 ++++ arch/arm64/include/asm/vncr_mapping.h | 1 + arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 16 ++++++++++++++++ arch/arm64/kvm/sys_regs.c | 11 +++++++++++ 4 files changed, 32 insertions(+) diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm= _host.h index 3e41a880b062..4ff0ebcc2f60 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -532,6 +532,7 @@ enum vcpu_sysreg { VNCR(SCTLR_EL1),/* System Control Register */ VNCR(ACTLR_EL1),/* Auxiliary Control Register */ VNCR(CPACR_EL1),/* Coprocessor Access Control */ + VNCR(SCTLR2_EL1),/* Extended System Control Register */ VNCR(ZCR_EL1), /* SVE Control */ VNCR(TTBR0_EL1),/* Translation Table Base Register 0 */ VNCR(TTBR1_EL1),/* Translation Table Base Register 1 */ @@ -1659,6 +1660,9 @@ void kvm_set_vm_id_reg(struct kvm *kvm, u32 reg, u64 = val); #define kvm_has_tcr2(k) \ (kvm_has_feat((k), ID_AA64MMFR3_EL1, TCRX, IMP)) +#define kvm_has_sctlr2(k) \ + (kvm_has_feat((k), ID_AA64MMFR3_EL1, SCTLRX, IMP)) + #define kvm_has_s1pie(k) \ (kvm_has_feat((k), ID_AA64MMFR3_EL1, S1PIE, IMP)) diff --git a/arch/arm64/include/asm/vncr_mapping.h b/arch/arm64/include/asm= /vncr_mapping.h index 6f556e993644..ce7a401cb1be 100644 --- a/arch/arm64/include/asm/vncr_mapping.h +++ b/arch/arm64/include/asm/vncr_mapping.h @@ -51,6 +51,7 @@ #define VNCR_SP_EL1 0x240 #define VNCR_VBAR_EL1 0x250 #define VNCR_TCR2_EL1 0x270 +#define VNCR_SCTLR2_EL1 0x278 #define VNCR_PIRE0_EL1 0x290 #define VNCR_PIR_EL1 0x2A0 #define VNCR_POR_EL1 0x2A8 diff --git a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h b/arch/arm64/kvm/hy= p/include/hyp/sysreg-sr.h index 4d0dbea4c56f..29ee9cd54a04 100644 --- a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h +++ b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h @@ -98,6 +98,17 @@ static inline bool ctxt_has_tcrx(struct kvm_cpu_context = *ctxt) return kvm_has_tcr2(kern_hyp_va(vcpu->kvm)); } +static inline bool ctxt_has_sctlrx(struct kvm_cpu_context *ctxt) +{ + struct kvm_vcpu *vcpu; + + if (!cpus_have_final_cap(ARM64_HAS_SCTLR2)) + return false; + + vcpu =3D ctxt_to_vcpu(ctxt); + return kvm_has_sctlr2(kern_hyp_va(vcpu->kvm)); +} + static inline bool ctxt_has_s1poe(struct kvm_cpu_context *ctxt) { struct kvm_vcpu *vcpu; @@ -112,6 +123,8 @@ static inline bool ctxt_has_s1poe(struct kvm_cpu_contex= t *ctxt) static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt) { ctxt_sys_reg(ctxt, SCTLR_EL1) =3D read_sysreg_el1(SYS_SCTLR); + if (ctxt_has_sctlrx(ctxt)) + ctxt_sys_reg(ctxt, SCTLR2_EL1) =3D read_sysreg_el1(SYS_SCTLR2); ctxt_sys_reg(ctxt, CPACR_EL1) =3D read_sysreg_el1(SYS_CPACR); ctxt_sys_reg(ctxt, TTBR0_EL1) =3D read_sysreg_el1(SYS_TTBR0); ctxt_sys_reg(ctxt, TTBR1_EL1) =3D read_sysreg_el1(SYS_TTBR1); @@ -200,6 +213,9 @@ static inline void __sysreg_restore_el1_state(struct kv= m_cpu_context *ctxt, isb(); } + if (ctxt_has_sctlrx(ctxt)) + write_sysreg_el1(ctxt_sys_reg(ctxt, SCTLR2_EL1), SYS_SCTLR2); + write_sysreg_el1(ctxt_sys_reg(ctxt, CPACR_EL1), SYS_CPACR); write_sysreg_el1(ctxt_sys_reg(ctxt, TTBR0_EL1), SYS_TTBR0); write_sysreg_el1(ctxt_sys_reg(ctxt, TTBR1_EL1), SYS_TTBR1); diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index c20bd6f21e60..c960470b6d2b 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -2588,6 +2588,15 @@ static unsigned int tcr2_el2_visibility(const struct= kvm_vcpu *vcpu, return __el2_visibility(vcpu, rd, tcr2_visibility); } +static unsigned int sctlr2_visibility(const struct kvm_vcpu *vcpu, + const struct sys_reg_desc *rd) +{ + if (kvm_has_sctlr2(vcpu->kvm)) + return 0; + + return REG_HIDDEN; +} + static unsigned int s1pie_visibility(const struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd) { @@ -2955,6 +2964,8 @@ static const struct sys_reg_desc sys_reg_descs[] =3D { { SYS_DESC(SYS_SCTLR_EL1), access_vm_reg, reset_val, SCTLR_EL1, 0x00C5007= 8 }, { SYS_DESC(SYS_ACTLR_EL1), access_actlr, reset_actlr, ACTLR_EL1 }, { SYS_DESC(SYS_CPACR_EL1), NULL, reset_val, CPACR_EL1, 0 }, + { SYS_DESC(SYS_SCTLR2_EL1), access_vm_reg, reset_val, SCTLR2_EL1, 0, + .visibility =3D sctlr2_visibility }, MTE_REG(RGSR_EL1), MTE_REG(GCR_EL1), -- LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Sun Oct 5 12:52:21 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 279D0259CA9; Mon, 4 Aug 2025 12:18:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309891; cv=none; b=YZj27mZ3fPm5JnEKMMsqUzpg507CADHifAcawxyN8MAS6aWcCr9DBr/P1j3UhP8jp0VA+42BGOzOAv8AjQL4p4daKKbMSOJQHKJLpwyJ/zV46mgWHwML/ziDePPcaYZABWljkXIL8KGLKQXcssOg78f0oWjUW8nZA5kb1mt41B8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309891; c=relaxed/simple; bh=4A/Iz1W4dpCEfJiWFU8J6cV2SWj/eTLqk0uJbHh8yrQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=jnRHd0IiIkXtW3KaG5BF8QvhVOgHxafXnPyTke8Sxxa4zm4QYXp96S3TiqrJ7uES61h4sxFEmif916aeA6vbxHp27gvFeoQ8UAZ3EuSHshKsrsxiCih0ckUIssvalCZhwV35MizHyCIzdfULqRbuzzOrvgNsRYV/cUai/oNpqVg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 733DD150C; Mon, 4 Aug 2025 05:18:01 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D20A43F738; Mon, 4 Aug 2025 05:18:05 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, broonie@kernel.org, oliver.upton@linux.dev, anshuman.khandual@arm.com, robh@kernel.org, james.morse@arm.com, mark.rutland@arm.com, joey.gouly@arm.com, ry111@xry111.site, Dave.Martin@arm.com, ahmed.genidi@arm.com, kevin.brodsky@arm.com, scott@os.amperecomputing.com, mbenes@suse.cz, james.clark@linaro.org, frederic@kernel.org, rafael@kernel.org, pavel@kernel.org, ryan.roberts@arm.com, suzuki.poulose@arm.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, kvmarm@lists.linux.dev, Yeoreum Yun Subject: [PATCH 10/11] KVM: arm64: nv: support SCTLR2_ELx on nv Date: Mon, 4 Aug 2025 13:17:23 +0100 Message-Id: <20250804121724.3681531-11-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250804121724.3681531-1-yeoreum.yun@arm.com> References: <20250804121724.3681531-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Support SCTLR2_ELx sysreg on nv. Signed-off-by: Yeoreum Yun --- arch/arm64/include/asm/kvm_host.h | 3 +++ arch/arm64/kvm/emulate-nested.c | 2 ++ arch/arm64/kvm/hyp/vhe/sysreg-sr.c | 6 ++++++ arch/arm64/kvm/nested.c | 13 +++++++++++++ arch/arm64/kvm/sys_regs.c | 9 +++++++++ 5 files changed, 33 insertions(+) diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm= _host.h index 4ff0ebcc2f60..95d0027a734e 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -525,6 +525,7 @@ enum vcpu_sysreg { TCR2_EL2, /* Extended Translation Control Register (EL2) */ MDCR_EL2, /* Monitor Debug Configuration Register (EL2) */ CNTHCTL_EL2, /* Counter-timer Hypervisor Control register */ + SCTLR2_EL2, /* Extend System Control Register (EL2) */ /* Any VNCR-capable reg goes after this point */ MARKER(__VNCR_START__), @@ -1161,6 +1162,7 @@ static inline bool __vcpu_read_sys_reg_from_cpu(int r= eg, u64 *val) switch (reg) { case SCTLR_EL1: *val =3D read_sysreg_s(SYS_SCTLR_EL12); break; case CPACR_EL1: *val =3D read_sysreg_s(SYS_CPACR_EL12); break; + case SCTLR2_EL1: *val =3D read_sysreg_s(SYS_SCTLR2_EL12); break; case TTBR0_EL1: *val =3D read_sysreg_s(SYS_TTBR0_EL12); break; case TTBR1_EL1: *val =3D read_sysreg_s(SYS_TTBR1_EL12); break; case TCR_EL1: *val =3D read_sysreg_s(SYS_TCR_EL12); break; @@ -1211,6 +1213,7 @@ static inline bool __vcpu_write_sys_reg_to_cpu(u64 va= l, int reg) switch (reg) { case SCTLR_EL1: write_sysreg_s(val, SYS_SCTLR_EL12); break; case CPACR_EL1: write_sysreg_s(val, SYS_CPACR_EL12); break; + case SCTLR2_EL1: write_sysreg_s(val, SYS_SCTLR2_EL12); break; case TTBR0_EL1: write_sysreg_s(val, SYS_TTBR0_EL12); break; case TTBR1_EL1: write_sysreg_s(val, SYS_TTBR1_EL12); break; case TCR_EL1: write_sysreg_s(val, SYS_TCR_EL12); break; diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-neste= d.c index 3a384e9660b8..d7809682915c 100644 --- a/arch/arm64/kvm/emulate-nested.c +++ b/arch/arm64/kvm/emulate-nested.c @@ -782,6 +782,7 @@ static const struct encoding_to_trap_config encoding_to= _cgt[] __initconst =3D { SR_TRAP(OP_TLBI_RVALE1OSNXS, CGT_HCR_TTLB_TTLBOS), SR_TRAP(OP_TLBI_RVAALE1OSNXS, CGT_HCR_TTLB_TTLBOS), SR_TRAP(SYS_SCTLR_EL1, CGT_HCR_TVM_TRVM), + SR_TRAP(SYS_SCTLR2_EL1, CGT_HCR_TVM_TRVM), SR_TRAP(SYS_TTBR0_EL1, CGT_HCR_TVM_TRVM), SR_TRAP(SYS_TTBR1_EL1, CGT_HCR_TVM_TRVM), SR_TRAP(SYS_TCR_EL1, CGT_HCR_TVM_TRVM), @@ -1354,6 +1355,7 @@ static const struct encoding_to_trap_config encoding_= to_fgt[] __initconst =3D { SR_FGT(SYS_SCXTNUM_EL0, HFGRTR, SCXTNUM_EL0, 1), SR_FGT(SYS_SCXTNUM_EL1, HFGRTR, SCXTNUM_EL1, 1), SR_FGT(SYS_SCTLR_EL1, HFGRTR, SCTLR_EL1, 1), + SR_FGT(SYS_SCTLR2_EL1, HFGRTR, SCTLR_EL1, 1), /* not typo! */ SR_FGT(SYS_REVIDR_EL1, HFGRTR, REVIDR_EL1, 1), SR_FGT(SYS_PAR_EL1, HFGRTR, PAR_EL1, 1), SR_FGT(SYS_MPIDR_EL1, HFGRTR, MPIDR_EL1, 1), diff --git a/arch/arm64/kvm/hyp/vhe/sysreg-sr.c b/arch/arm64/kvm/hyp/vhe/sy= sreg-sr.c index 73e4bc7fde9e..689e3297d949 100644 --- a/arch/arm64/kvm/hyp/vhe/sysreg-sr.c +++ b/arch/arm64/kvm/hyp/vhe/sysreg-sr.c @@ -51,6 +51,9 @@ static void __sysreg_save_vel2_state(struct kvm_vcpu *vcp= u) __vcpu_assign_sys_reg(vcpu, TTBR1_EL2, read_sysreg_el1(SYS_TTBR1)); __vcpu_assign_sys_reg(vcpu, TCR_EL2, read_sysreg_el1(SYS_TCR)); + if (ctxt_has_sctlrx(&vcpu->arch.ctxt)) + __vcpu_assign_sys_reg(vcpu, SCTLR2_EL2, read_sysreg_el1(SYS_SCTLR2)); + if (ctxt_has_tcrx(&vcpu->arch.ctxt)) { __vcpu_assign_sys_reg(vcpu, TCR2_EL2, read_sysreg_el1(SYS_TCR2)); @@ -120,6 +123,9 @@ static void __sysreg_restore_vel2_state(struct kvm_vcpu= *vcpu) write_sysreg_el1(val, SYS_TCR); } + if (ctxt_has_sctlrx(&vcpu->arch.ctxt)) + write_sysreg_el1(__vcpu_sys_reg(vcpu, SCTLR2_EL2), SYS_SCTLR2); + if (ctxt_has_tcrx(&vcpu->arch.ctxt)) { write_sysreg_el1(__vcpu_sys_reg(vcpu, TCR2_EL2), SYS_TCR2); diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c index dc1d26559bfa..a4d3b2d2fd80 100644 --- a/arch/arm64/kvm/nested.c +++ b/arch/arm64/kvm/nested.c @@ -1704,6 +1704,19 @@ int kvm_init_nv_sysregs(struct kvm_vcpu *vcpu) TCR2_EL2_AMEC1 | TCR2_EL2_DisCH0 | TCR2_EL2_DisCH1); set_sysreg_masks(kvm, TCR2_EL2, res0, res1); + /* + * SCTLR2_EL2 - until explicit support for each feature, set all as RES0. + */ + res0 =3D SCTLR2_EL2_RES0 | SCTLR2_EL2_EMEC; + res0 |=3D SCTLR2_EL2_EASE; + res0 |=3D SCTLR2_EL2_NMEA; + res0 |=3D (SCTLR2_EL2_EnADERR | SCTLR2_EL2_EnANERR); + res0 |=3D SCTLR2_EL2_EnIDCP128; + res0 |=3D (SCTLR2_EL2_CPTA | SCTLR2_EL2_CPTA0 | + SCTLR2_EL2_CPTM | SCTLR2_EL2_CPTM0); + res1 =3D SCTLR2_EL2_RES1; + set_sysreg_masks(kvm, SCTLR2_EL2, res0, res1); + /* SCTLR_EL1 */ res0 =3D SCTLR_EL1_RES0; res1 =3D SCTLR_EL1_RES1; diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index c960470b6d2b..24881b7248b5 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -122,6 +122,7 @@ static bool get_el2_to_el1_mapping(unsigned int reg, PURE_EL2_SYSREG( CNTHCTL_EL2 ); MAPPED_EL2_SYSREG(SCTLR_EL2, SCTLR_EL1, translate_sctlr_el2_to_sctlr_el1 ); + MAPPED_EL2_SYSREG(SCTLR2_EL2, SCTLR2_EL1, NULL ); MAPPED_EL2_SYSREG(CPTR_EL2, CPACR_EL1, translate_cptr_el2_to_cpacr_el1 ); MAPPED_EL2_SYSREG(TTBR0_EL2, TTBR0_EL1, @@ -2597,6 +2598,12 @@ static unsigned int sctlr2_visibility(const struct k= vm_vcpu *vcpu, return REG_HIDDEN; } +static unsigned int sctlr2_el2_visibility(const struct kvm_vcpu *vcpu, + const struct sys_reg_desc *rd) +{ + return __el2_visibility(vcpu, rd, sctlr2_visibility); +} + static unsigned int s1pie_visibility(const struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd) { @@ -3313,6 +3320,8 @@ static const struct sys_reg_desc sys_reg_descs[] =3D { EL2_REG_VNCR(VMPIDR_EL2, reset_unknown, 0), EL2_REG(SCTLR_EL2, access_rw, reset_val, SCTLR_EL2_RES1), EL2_REG(ACTLR_EL2, access_rw, reset_val, 0), + EL2_REG_FILTERED(SCTLR2_EL2, access_rw, reset_val, 0, + sctlr2_el2_visibility), EL2_REG_VNCR(HCR_EL2, reset_hcr, 0), EL2_REG(MDCR_EL2, access_mdcr, reset_mdcr, 0), EL2_REG(CPTR_EL2, access_rw, reset_val, CPTR_NVHE_EL2_RES1), -- LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Sun Oct 5 12:52:21 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 002EC260563; Mon, 4 Aug 2025 12:18:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309895; cv=none; b=jo4gtiYfhuiiv2hWfGU1ki8UTnd4B4aO6leH6IPPaOjlwqJFXktqdHUZj8gbaWPH7dR8K1R3ahl/5eonJKuA+u+Amo5aA+bg22n0tBUWyupP2ym/f7AcaK1s88tyjljxTErF1+AuOzWRBbR7tvSL1EaGKiQkYMfQ+XbttK8PUpA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754309895; c=relaxed/simple; bh=mPy4thA1/du4dFbNzpx58/qAyPaMN57d2szGheSzUuQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=sFwHA/f1KFjjs9eUi3Ht1pMTO7ofuseIlPTJVvoebdYXAVdIIBnZB+etpfa657VmllxovALW1OMkCtv9x+qjh3m31IU0UceBM12XKjAaaHBXG8hOt8cHEYTSGJYCbiPMcwlg/0uE3/84EeyaF6/rv0UYe75/sgdAbwoklfC9yB4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 68E24150C; Mon, 4 Aug 2025 05:18:05 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C183C3F738; Mon, 4 Aug 2025 05:18:09 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, broonie@kernel.org, oliver.upton@linux.dev, anshuman.khandual@arm.com, robh@kernel.org, james.morse@arm.com, mark.rutland@arm.com, joey.gouly@arm.com, ry111@xry111.site, Dave.Martin@arm.com, ahmed.genidi@arm.com, kevin.brodsky@arm.com, scott@os.amperecomputing.com, mbenes@suse.cz, james.clark@linaro.org, frederic@kernel.org, rafael@kernel.org, pavel@kernel.org, ryan.roberts@arm.com, suzuki.poulose@arm.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, kvmarm@lists.linux.dev, Yeoreum Yun Subject: [PATCH 11/11] KVM: arm64: expose FEAT_SCTLR2 feature to guest Date: Mon, 4 Aug 2025 13:17:24 +0100 Message-Id: <20250804121724.3681531-12-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250804121724.3681531-1-yeoreum.yun@arm.com> References: <20250804121724.3681531-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" expose FEAT_SCTLR2 feature to guest. Signed-off-by: Yeoreum Yun --- arch/arm64/kvm/sys_regs.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 24881b7248b5..3f82ef1a8eb0 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1644,8 +1644,8 @@ static u64 __kvm_read_sanitised_id_reg(const struct k= vm_vcpu *vcpu, val &=3D ~ID_AA64MMFR2_EL1_NV; break; case SYS_ID_AA64MMFR3_EL1: - val &=3D ID_AA64MMFR3_EL1_TCRX | ID_AA64MMFR3_EL1_S1POE | - ID_AA64MMFR3_EL1_S1PIE; + val &=3D ID_AA64MMFR3_EL1_TCRX | ID_AA64MMFR3_EL1_SCTLRX | + ID_AA64MMFR3_EL1_S1POE | ID_AA64MMFR3_EL1_S1PIE; break; case SYS_ID_MMFR4_EL1: val &=3D ~ARM64_FEATURE_MASK(ID_MMFR4_EL1_CCIDX); @@ -2961,6 +2961,7 @@ static const struct sys_reg_desc sys_reg_descs[] =3D { ID_AA64MMFR2_EL1_NV | ID_AA64MMFR2_EL1_CCIDX)), ID_WRITABLE(ID_AA64MMFR3_EL1, (ID_AA64MMFR3_EL1_TCRX | + ID_AA64MMFR3_EL1_SCTLRX | ID_AA64MMFR3_EL1_S1PIE | ID_AA64MMFR3_EL1_S1POE)), ID_WRITABLE(ID_AA64MMFR4_EL1, ID_AA64MMFR4_EL1_NV_frac), -- LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7}